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atavar.h revision 1.33
      1 /*	$NetBSD: atavar.h,v 1.33 2003/12/14 05:10:19 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998, 2001 Manuel Bouyer.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by Manuel Bouyer.
     17  * 4. The name of the author may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _DEV_ATA_ATAVAR_H_
     33 #define	_DEV_ATA_ATAVAR_H_
     34 
     35 /* High-level functions and structures used by both ATA and ATAPI devices */
     36 
     37 struct ataparams;
     38 
     39 /* Datas common to drives and controller drivers */
     40 struct ata_drive_datas {
     41 	u_int8_t drive;		/* drive number */
     42 	int8_t ata_vers;	/* ATA version supported */
     43 	u_int16_t drive_flags;	/* bitmask for drives present/absent and cap */
     44 
     45 #define	DRIVE_ATA	0x0001
     46 #define	DRIVE_ATAPI	0x0002
     47 #define	DRIVE_OLD	0x0004
     48 #define	DRIVE		(DRIVE_ATA|DRIVE_ATAPI|DRIVE_OLD)
     49 #define	DRIVE_CAP32	0x0008
     50 #define	DRIVE_DMA	0x0010
     51 #define	DRIVE_UDMA	0x0020
     52 #define	DRIVE_MODE	0x0040	/* the drive reported its mode */
     53 #define	DRIVE_RESET	0x0080	/* reset the drive state at next xfer */
     54 #define	DRIVE_DMAERR	0x0100	/* Udma transfer had crc error, don't try DMA */
     55 #define	DRIVE_ATAPIST	0x0100	/* device is an ATAPI tape drive */
     56 
     57 	/*
     58 	 * Current setting of drive's PIO, DMA and UDMA modes.
     59 	 * Is initialised by the disks drivers at attach time, and may be
     60 	 * changed later by the controller's code if needed
     61 	 */
     62 	u_int8_t PIO_mode;	/* Current setting of drive's PIO mode */
     63 	u_int8_t DMA_mode;	/* Current setting of drive's DMA mode */
     64 	u_int8_t UDMA_mode;	/* Current setting of drive's UDMA mode */
     65 
     66 	/* Supported modes for this drive */
     67 	u_int8_t PIO_cap;	/* supported drive's PIO mode */
     68 	u_int8_t DMA_cap;	/* supported drive's DMA mode */
     69 	u_int8_t UDMA_cap;	/* supported drive's UDMA mode */
     70 
     71 	/*
     72 	 * Drive state.
     73 	 * This is reset to 0 after a channel reset.
     74 	 */
     75 	u_int8_t state;
     76 
     77 #define RESET          0
     78 #define READY          1
     79 
     80 	/* numbers of xfers and DMA errs. Used by ata_dmaerr() */
     81 	u_int8_t n_dmaerrs;
     82 	u_int32_t n_xfers;
     83 
     84 	/* Downgrade after NERRS_MAX errors in at most NXFER xfers */
     85 #define NERRS_MAX 4
     86 #define NXFER 4000
     87 
     88 	struct device *drv_softc;	/* ATA drives softc, if any */
     89 	void *chnl_softc;		/* channel softc */
     90 };
     91 
     92 /* User config flags that force (or disable) the use of a mode */
     93 #define ATA_CONFIG_PIO_MODES	0x0007
     94 #define ATA_CONFIG_PIO_SET	0x0008
     95 #define ATA_CONFIG_PIO_OFF	0
     96 #define ATA_CONFIG_DMA_MODES	0x0070
     97 #define ATA_CONFIG_DMA_SET	0x0080
     98 #define ATA_CONFIG_DMA_DISABLE	0x0070
     99 #define ATA_CONFIG_DMA_OFF	4
    100 #define ATA_CONFIG_UDMA_MODES	0x0700
    101 #define ATA_CONFIG_UDMA_SET	0x0800
    102 #define ATA_CONFIG_UDMA_DISABLE	0x0700
    103 #define ATA_CONFIG_UDMA_OFF	8
    104 
    105 /*
    106  * Parameters/state needed by the controller to perform an ATA bio.
    107  */
    108 struct ata_bio {
    109 	volatile u_int16_t flags;/* cmd flags */
    110 #define	ATA_NOSLEEP	0x0001	/* Can't sleep */
    111 #define	ATA_POLL	0x0002	/* poll for completion */
    112 #define	ATA_ITSDONE	0x0004	/* the transfer is as done as it gets */
    113 #define	ATA_SINGLE	0x0008	/* transfer must be done in singlesector mode */
    114 #define	ATA_LBA		0x0010	/* transfer uses LBA addressing */
    115 #define	ATA_READ	0x0020	/* transfer is a read (otherwise a write) */
    116 #define	ATA_CORR	0x0040	/* transfer had a corrected error */
    117 #define	ATA_LBA48	0x0080	/* transfer uses 48-bit LBA addressing */
    118 	int		multi;	/* # of blocks to transfer in multi-mode */
    119 	struct disklabel *lp;	/* pointer to drive's label info */
    120 	daddr_t		blkno;	/* block addr */
    121 	daddr_t		blkdone;/* number of blks transferred */
    122 	daddr_t		nblks;	/* number of block currently transferring */
    123 	int		nbytes;	/* number of bytes currently transferring */
    124 	long		bcount;	/* total number of bytes */
    125 	char		*databuf;/* data buffer address */
    126 	volatile int	error;
    127 #define	NOERROR 	0	/* There was no error (r_error invalid) */
    128 #define	ERROR		1	/* check r_error */
    129 #define	ERR_DF		2	/* Drive fault */
    130 #define	ERR_DMA		3	/* DMA error */
    131 #define	TIMEOUT		4	/* device timed out */
    132 #define	ERR_NODEV	5	/* device has been gone */
    133 	u_int8_t	r_error;/* copy of error register */
    134 	daddr_t		badsect[127];/* 126 plus trailing -1 marker */
    135 };
    136 
    137 /*
    138  * ATA/ATAPI commands description
    139  *
    140  * This structure defines the interface between the ATA/ATAPI device driver
    141  * and the controller for short commands. It contains the command's parameter,
    142  * the len of data's to read/write (if any), and a function to call upon
    143  * completion.
    144  * If no sleep is allowed, the driver can poll for command completion.
    145  * Once the command completed, if the error registed is valid, the flag
    146  * AT_ERROR is set and the error register value is copied to r_error .
    147  * A separate interface is needed for read/write or ATAPI packet commands
    148  * (which need multiple interrupts per commands).
    149  */
    150 struct wdc_command {
    151 	u_int8_t r_command;	/* Parameters to upload to registers */
    152 	u_int8_t r_head;
    153 	u_int16_t r_cyl;
    154 	u_int8_t r_sector;
    155 	u_int8_t r_count;
    156 	u_int8_t r_precomp;
    157 	u_int8_t r_st_bmask;	/* status register mask to wait for before
    158 				   command */
    159 	u_int8_t r_st_pmask;	/* status register mask to wait for after
    160 				   command */
    161 	u_int8_t r_error;	/* error register after command done */
    162 	volatile u_int16_t flags;
    163 
    164 #define AT_READ     0x0001 /* There is data to read */
    165 #define AT_WRITE    0x0002 /* There is data to write (excl. with AT_READ) */
    166 #define AT_WAIT     0x0008 /* wait in controller code for command completion */
    167 #define AT_POLL     0x0010 /* poll for command completion (no interrupts) */
    168 #define AT_DONE     0x0020 /* command is done */
    169 #define AT_XFDONE   0x0040 /* data xfer is done */
    170 #define AT_ERROR    0x0080 /* command is done with error */
    171 #define AT_TIMEOU   0x0100 /* command timed out */
    172 #define AT_DF       0x0200 /* Drive fault */
    173 #define AT_READREG  0x0400 /* Read registers on completion */
    174 
    175 	int timeout;		/* timeout (in ms) */
    176 	void *data;		/* Data buffer address */
    177 	int bcount;		/* number of bytes to transfer */
    178 	void (*callback)(void *); /* command to call once command completed */
    179 	void *callback_arg;	/* argument passed to *callback() */
    180 };
    181 
    182 /*
    183  * ata_bustype.  The first field must be compatible with scsipi_bustype,
    184  * as it's used for autoconfig by both ata and atapi drivers.
    185  */
    186 struct ata_bustype {
    187 	int	bustype_type;	/* symbolic name of type */
    188 	int	(*ata_bio)(struct ata_drive_datas *, struct ata_bio *);
    189 	void	(*ata_reset_channel)(struct ata_drive_datas *, int);
    190 	int	(*ata_exec_command)(struct ata_drive_datas *,
    191 				    struct wdc_command *);
    192 
    193 #define	WDC_COMPLETE	0x01
    194 #define	WDC_QUEUED	0x02
    195 #define	WDC_TRY_AGAIN	0x03
    196 
    197 	int	(*ata_get_params)(struct ata_drive_datas *, u_int8_t,
    198 				  struct ataparams *);
    199 	int	(*ata_addref)(struct ata_drive_datas *);
    200 	void	(*ata_delref)(struct ata_drive_datas *);
    201 	void	(*ata_killpending)(struct ata_drive_datas *);
    202 };
    203 
    204 /* bustype_type */	/* XXX XXX XXX */
    205 /* #define SCSIPI_BUSTYPE_SCSI	0 */
    206 /* #define SCSIPI_BUSTYPE_ATAPI	1 */
    207 #define	SCSIPI_BUSTYPE_ATA	2
    208 
    209 /*
    210  * If WDSM_ATTR_ADVISORY, device exceeded intended design life period.
    211  * If not WDSM_ATTR_ADVISORY, imminent data loss predicted.
    212  */
    213 #define WDSM_ATTR_ADVISORY	1
    214 
    215 /*
    216  * If WDSM_ATTR_COLLECTIVE, attribute only updated in off-line testing.
    217  * If not WDSM_ATTR_COLLECTIVE, attribute updated also in on-line testing.
    218  */
    219 #define WDSM_ATTR_COLLECTIVE	2
    220 
    221 struct ata_smart_attr {
    222 	u_int8_t		id;		/* attribute id number */
    223 	u_int16_t		flags;
    224 	u_int8_t		value;		/* attribute value */
    225 	u_int8_t		vendor_specific[8];
    226 } __attribute__((packed));
    227 
    228 struct ata_smart_attributes {
    229 	u_int16_t		data_structure_revision;
    230 	struct ata_smart_attr	attributes[30];
    231 	u_int8_t		offline_data_collection_status;
    232 	u_int8_t		self_test_exec_status;
    233 	u_int16_t		total_time_to_complete_off_line;
    234 	u_int8_t		vendor_specific_366;
    235 	u_int8_t		offline_data_collection_capability;
    236 	u_int16_t		smart_capability;
    237 	u_int8_t		errorlog_capability;
    238 	u_int8_t		vendor_specific_371;
    239 	u_int8_t		short_test_completion_time;
    240 	u_int8_t		extend_test_completion_time;
    241 	u_int8_t		reserved_374_385[12];
    242 	u_int8_t		vendor_specific_386_509[125];
    243 	int8_t			checksum;
    244 } __attribute__((packed));
    245 
    246 struct ata_smart_thresh {
    247 	u_int8_t		id;
    248 	u_int8_t		value;
    249 	u_int8_t		reserved[10];
    250 } __attribute__((packed));
    251 
    252 struct ata_smart_thresholds {
    253 	u_int16_t		data_structure_revision;
    254 	struct ata_smart_thresh	thresholds[30];
    255 	u_int8_t		reserved[18];
    256 	u_int8_t		vendor_specific[131];
    257 	int8_t			checksum;
    258 } __attribute__((packed));
    259 
    260 int	wdc_downgrade_mode(struct ata_drive_datas *, int);
    261 
    262 struct ataparams;
    263 int	ata_get_params(struct ata_drive_datas *, u_int8_t, struct ataparams *);
    264 int	ata_set_mode(struct ata_drive_datas *, u_int8_t, u_int8_t);
    265 /* return code for these cmds */
    266 #define CMD_OK    0
    267 #define CMD_ERR   1
    268 #define CMD_AGAIN 2
    269 
    270 void	ata_dmaerr(struct ata_drive_datas *, int);
    271 
    272 #endif /* _DEV_ATA_ATAVAR_H_ */
    273