atavar.h revision 1.41
1 /* $NetBSD: atavar.h,v 1.41 2004/04/14 05:26:29 minoura Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _DEV_ATA_ATAVAR_H_ 33 #define _DEV_ATA_ATAVAR_H_ 34 35 #include <sys/lock.h> 36 #include <sys/queue.h> 37 38 /* 39 * Description of a command to be handled by an ATA controller. These 40 * commands are queued in a list. 41 */ 42 struct ata_xfer { 43 __volatile u_int c_flags; /* command state flags */ 44 45 /* Channel and drive that are to process the request. */ 46 struct wdc_channel *c_chp; 47 int c_drive; 48 49 void *c_cmd; /* private request structure pointer */ 50 void *c_databuf; /* pointer to data buffer */ 51 int c_bcount; /* byte count left */ 52 int c_skip; /* bytes already transferred */ 53 int c_dscpoll; /* counter for dsc polling (ATAPI) */ 54 55 /* Link on the command queue. */ 56 TAILQ_ENTRY(ata_xfer) c_xferchain; 57 58 /* Low-level protocol handlers. */ 59 void (*c_start)(struct wdc_channel *, struct ata_xfer *); 60 int (*c_intr)(struct wdc_channel *, struct ata_xfer *, int); 61 void (*c_kill_xfer)(struct wdc_channel *, struct ata_xfer *); 62 }; 63 64 #define C_ATAPI 0x0001 /* xfer is ATAPI request */ 65 #define C_TIMEOU 0x0002 /* xfer processing timed out */ 66 #define C_POLL 0x0004 /* command is polled */ 67 #define C_DMA 0x0008 /* command uses DMA */ 68 69 /* Per-channel queue of ata_xfers. May be shared by multiple channels. */ 70 struct ata_queue { 71 TAILQ_HEAD(, ata_xfer) queue_xfer; 72 int queue_freeze; 73 }; 74 75 /* ATA bus instance state information. */ 76 struct atabus_softc { 77 struct device sc_dev; 78 struct wdc_channel *sc_chan; /* XXXwdc */ 79 }; 80 81 /* 82 * A queue of atabus instances, used to ensure the same bus probe order 83 * for a given hardware configuration at each boot. 84 */ 85 struct atabus_initq { 86 TAILQ_ENTRY(atabus_initq) atabus_initq; 87 struct atabus_softc *atabus_sc; 88 }; 89 90 #ifdef _KERNEL 91 TAILQ_HEAD(atabus_initq_head, atabus_initq); 92 extern struct atabus_initq_head atabus_initq_head; 93 extern struct simplelock atabus_interlock; 94 #endif /* _KERNEL */ 95 96 /* High-level functions and structures used by both ATA and ATAPI devices */ 97 struct ataparams; 98 99 /* Datas common to drives and controller drivers */ 100 struct ata_drive_datas { 101 u_int8_t drive; /* drive number */ 102 int8_t ata_vers; /* ATA version supported */ 103 u_int16_t drive_flags; /* bitmask for drives present/absent and cap */ 104 105 #define DRIVE_ATA 0x0001 106 #define DRIVE_ATAPI 0x0002 107 #define DRIVE_OLD 0x0004 108 #define DRIVE (DRIVE_ATA|DRIVE_ATAPI|DRIVE_OLD) 109 #define DRIVE_CAP32 0x0008 110 #define DRIVE_DMA 0x0010 111 #define DRIVE_UDMA 0x0020 112 #define DRIVE_MODE 0x0040 /* the drive reported its mode */ 113 #define DRIVE_RESET 0x0080 /* reset the drive state at next xfer */ 114 #define DRIVE_DMAERR 0x0100 /* Udma transfer had crc error, don't try DMA */ 115 #define DRIVE_ATAPIST 0x0200 /* device is an ATAPI tape drive */ 116 117 /* 118 * Current setting of drive's PIO, DMA and UDMA modes. 119 * Is initialised by the disks drivers at attach time, and may be 120 * changed later by the controller's code if needed 121 */ 122 u_int8_t PIO_mode; /* Current setting of drive's PIO mode */ 123 u_int8_t DMA_mode; /* Current setting of drive's DMA mode */ 124 u_int8_t UDMA_mode; /* Current setting of drive's UDMA mode */ 125 126 /* Supported modes for this drive */ 127 u_int8_t PIO_cap; /* supported drive's PIO mode */ 128 u_int8_t DMA_cap; /* supported drive's DMA mode */ 129 u_int8_t UDMA_cap; /* supported drive's UDMA mode */ 130 131 /* 132 * Drive state. 133 * This is reset to 0 after a channel reset. 134 */ 135 u_int8_t state; 136 137 #define RESET 0 138 #define READY 1 139 140 /* numbers of xfers and DMA errs. Used by ata_dmaerr() */ 141 u_int8_t n_dmaerrs; 142 u_int32_t n_xfers; 143 144 /* Downgrade after NERRS_MAX errors in at most NXFER xfers */ 145 #define NERRS_MAX 4 146 #define NXFER 4000 147 148 /* Callbacks into the drive's driver. */ 149 void (*drv_done)(void *); /* transfer is done */ 150 151 struct device *drv_softc; /* ATA drives softc, if any */ 152 void *chnl_softc; /* channel softc */ 153 }; 154 155 /* User config flags that force (or disable) the use of a mode */ 156 #define ATA_CONFIG_PIO_MODES 0x0007 157 #define ATA_CONFIG_PIO_SET 0x0008 158 #define ATA_CONFIG_PIO_OFF 0 159 #define ATA_CONFIG_DMA_MODES 0x0070 160 #define ATA_CONFIG_DMA_SET 0x0080 161 #define ATA_CONFIG_DMA_DISABLE 0x0070 162 #define ATA_CONFIG_DMA_OFF 4 163 #define ATA_CONFIG_UDMA_MODES 0x0700 164 #define ATA_CONFIG_UDMA_SET 0x0800 165 #define ATA_CONFIG_UDMA_DISABLE 0x0700 166 #define ATA_CONFIG_UDMA_OFF 8 167 168 /* 169 * Parameters/state needed by the controller to perform an ATA bio. 170 */ 171 struct ata_bio { 172 volatile u_int16_t flags;/* cmd flags */ 173 #define ATA_NOSLEEP 0x0001 /* Can't sleep */ 174 #define ATA_POLL 0x0002 /* poll for completion */ 175 #define ATA_ITSDONE 0x0004 /* the transfer is as done as it gets */ 176 #define ATA_SINGLE 0x0008 /* transfer must be done in singlesector mode */ 177 #define ATA_LBA 0x0010 /* transfer uses LBA addressing */ 178 #define ATA_READ 0x0020 /* transfer is a read (otherwise a write) */ 179 #define ATA_CORR 0x0040 /* transfer had a corrected error */ 180 #define ATA_LBA48 0x0080 /* transfer uses 48-bit LBA addressing */ 181 int multi; /* # of blocks to transfer in multi-mode */ 182 struct disklabel *lp; /* pointer to drive's label info */ 183 daddr_t blkno; /* block addr */ 184 daddr_t blkdone;/* number of blks transferred */ 185 daddr_t nblks; /* number of block currently transferring */ 186 int nbytes; /* number of bytes currently transferring */ 187 long bcount; /* total number of bytes */ 188 char *databuf;/* data buffer address */ 189 volatile int error; 190 #define NOERROR 0 /* There was no error (r_error invalid) */ 191 #define ERROR 1 /* check r_error */ 192 #define ERR_DF 2 /* Drive fault */ 193 #define ERR_DMA 3 /* DMA error */ 194 #define TIMEOUT 4 /* device timed out */ 195 #define ERR_NODEV 5 /* device has been gone */ 196 u_int8_t r_error;/* copy of error register */ 197 daddr_t badsect[127];/* 126 plus trailing -1 marker */ 198 }; 199 200 /* 201 * ATA/ATAPI commands description 202 * 203 * This structure defines the interface between the ATA/ATAPI device driver 204 * and the controller for short commands. It contains the command's parameter, 205 * the len of data's to read/write (if any), and a function to call upon 206 * completion. 207 * If no sleep is allowed, the driver can poll for command completion. 208 * Once the command completed, if the error registed is valid, the flag 209 * AT_ERROR is set and the error register value is copied to r_error . 210 * A separate interface is needed for read/write or ATAPI packet commands 211 * (which need multiple interrupts per commands). 212 */ 213 struct wdc_command { 214 u_int8_t r_command; /* Parameters to upload to registers */ 215 u_int8_t r_head; 216 u_int16_t r_cyl; 217 u_int8_t r_sector; 218 u_int8_t r_count; 219 u_int8_t r_precomp; 220 u_int8_t r_st_bmask; /* status register mask to wait for before 221 command */ 222 u_int8_t r_st_pmask; /* status register mask to wait for after 223 command */ 224 u_int8_t r_error; /* error register after command done */ 225 volatile u_int16_t flags; 226 227 #define AT_READ 0x0001 /* There is data to read */ 228 #define AT_WRITE 0x0002 /* There is data to write (excl. with AT_READ) */ 229 #define AT_WAIT 0x0008 /* wait in controller code for command completion */ 230 #define AT_POLL 0x0010 /* poll for command completion (no interrupts) */ 231 #define AT_DONE 0x0020 /* command is done */ 232 #define AT_XFDONE 0x0040 /* data xfer is done */ 233 #define AT_ERROR 0x0080 /* command is done with error */ 234 #define AT_TIMEOU 0x0100 /* command timed out */ 235 #define AT_DF 0x0200 /* Drive fault */ 236 #define AT_READREG 0x0400 /* Read registers on completion */ 237 238 int timeout; /* timeout (in ms) */ 239 void *data; /* Data buffer address */ 240 int bcount; /* number of bytes to transfer */ 241 void (*callback)(void *); /* command to call once command completed */ 242 void *callback_arg; /* argument passed to *callback() */ 243 }; 244 245 /* 246 * ata_bustype. The first field must be compatible with scsipi_bustype, 247 * as it's used for autoconfig by both ata and atapi drivers. 248 */ 249 struct ata_bustype { 250 int bustype_type; /* symbolic name of type */ 251 int (*ata_bio)(struct ata_drive_datas *, struct ata_bio *); 252 void (*ata_reset_channel)(struct ata_drive_datas *, int); 253 int (*ata_exec_command)(struct ata_drive_datas *, 254 struct wdc_command *); 255 256 #define WDC_COMPLETE 0x01 257 #define WDC_QUEUED 0x02 258 #define WDC_TRY_AGAIN 0x03 259 260 int (*ata_get_params)(struct ata_drive_datas *, u_int8_t, 261 struct ataparams *); 262 int (*ata_addref)(struct ata_drive_datas *); 263 void (*ata_delref)(struct ata_drive_datas *); 264 void (*ata_killpending)(struct ata_drive_datas *); 265 }; 266 267 /* bustype_type */ /* XXX XXX XXX */ 268 /* #define SCSIPI_BUSTYPE_SCSI 0 */ 269 /* #define SCSIPI_BUSTYPE_ATAPI 1 */ 270 #define SCSIPI_BUSTYPE_ATA 2 271 272 /* 273 * Describe an ATA device. Has to be compatible with scsipi_channel, so 274 * start with a pointer to ata_bustype. 275 */ 276 struct ata_device { 277 const struct ata_bustype *adev_bustype; 278 int adev_channel; 279 int adev_openings; 280 struct ata_drive_datas *adev_drv_data; 281 }; 282 283 #ifdef _KERNEL 284 int atabusprint(void *aux, const char *); 285 int ataprint(void *aux, const char *); 286 287 int wdc_downgrade_mode(struct ata_drive_datas *, int); 288 289 struct ataparams; 290 int ata_get_params(struct ata_drive_datas *, u_int8_t, struct ataparams *); 291 int ata_set_mode(struct ata_drive_datas *, u_int8_t, u_int8_t); 292 /* return code for these cmds */ 293 #define CMD_OK 0 294 #define CMD_ERR 1 295 #define CMD_AGAIN 2 296 297 void ata_dmaerr(struct ata_drive_datas *, int); 298 #endif /* _KERNEL */ 299 300 #endif /* _DEV_ATA_ATAVAR_H_ */ 301
Indexes created Mon Sep 29 15:09:53 GMT 2025