atavar.h revision 1.44
1 /* $NetBSD: atavar.h,v 1.44 2004/07/31 21:26:43 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _DEV_ATA_ATAVAR_H_ 33 #define _DEV_ATA_ATAVAR_H_ 34 35 #include <sys/lock.h> 36 #include <sys/queue.h> 37 38 /* 39 * Description of a command to be handled by an ATA controller. These 40 * commands are queued in a list. 41 */ 42 struct ata_xfer { 43 __volatile u_int c_flags; /* command state flags */ 44 45 /* Channel and drive that are to process the request. */ 46 struct wdc_channel *c_chp; 47 int c_drive; 48 49 void *c_cmd; /* private request structure pointer */ 50 void *c_databuf; /* pointer to data buffer */ 51 int c_bcount; /* byte count left */ 52 int c_skip; /* bytes already transferred */ 53 int c_dscpoll; /* counter for dsc polling (ATAPI) */ 54 55 /* Link on the command queue. */ 56 TAILQ_ENTRY(ata_xfer) c_xferchain; 57 58 /* Low-level protocol handlers. */ 59 void (*c_start)(struct wdc_channel *, struct ata_xfer *); 60 int (*c_intr)(struct wdc_channel *, struct ata_xfer *, int); 61 void (*c_kill_xfer)(struct wdc_channel *, struct ata_xfer *, int); 62 }; 63 64 /* vlags in c_flags */ 65 #define C_ATAPI 0x0001 /* xfer is ATAPI request */ 66 #define C_TIMEOU 0x0002 /* xfer processing timed out */ 67 #define C_POLL 0x0004 /* command is polled */ 68 #define C_DMA 0x0008 /* command uses DMA */ 69 70 /* reasons for c_kill_xfer() */ 71 #define KILL_GONE 1 /* device is gone */ 72 #define KILL_RESET 2 /* xfer was reset */ 73 74 /* Per-channel queue of ata_xfers. May be shared by multiple channels. */ 75 struct ata_queue { 76 TAILQ_HEAD(, ata_xfer) queue_xfer; 77 int queue_freeze; 78 }; 79 80 /* ATA bus instance state information. */ 81 struct atabus_softc { 82 struct device sc_dev; 83 struct wdc_channel *sc_chan; /* XXXwdc */ 84 }; 85 86 /* 87 * A queue of atabus instances, used to ensure the same bus probe order 88 * for a given hardware configuration at each boot. 89 */ 90 struct atabus_initq { 91 TAILQ_ENTRY(atabus_initq) atabus_initq; 92 struct atabus_softc *atabus_sc; 93 }; 94 95 #ifdef _KERNEL 96 TAILQ_HEAD(atabus_initq_head, atabus_initq); 97 extern struct atabus_initq_head atabus_initq_head; 98 extern struct simplelock atabus_interlock; 99 #endif /* _KERNEL */ 100 101 /* High-level functions and structures used by both ATA and ATAPI devices */ 102 struct ataparams; 103 104 /* Datas common to drives and controller drivers */ 105 struct ata_drive_datas { 106 u_int8_t drive; /* drive number */ 107 int8_t ata_vers; /* ATA version supported */ 108 u_int16_t drive_flags; /* bitmask for drives present/absent and cap */ 109 110 #define DRIVE_ATA 0x0001 111 #define DRIVE_ATAPI 0x0002 112 #define DRIVE_OLD 0x0004 113 #define DRIVE (DRIVE_ATA|DRIVE_ATAPI|DRIVE_OLD) 114 #define DRIVE_CAP32 0x0008 115 #define DRIVE_DMA 0x0010 116 #define DRIVE_UDMA 0x0020 117 #define DRIVE_MODE 0x0040 /* the drive reported its mode */ 118 #define DRIVE_RESET 0x0080 /* reset the drive state at next xfer */ 119 #define DRIVE_ATAPIST 0x0200 /* device is an ATAPI tape drive */ 120 121 /* 122 * Current setting of drive's PIO, DMA and UDMA modes. 123 * Is initialised by the disks drivers at attach time, and may be 124 * changed later by the controller's code if needed 125 */ 126 u_int8_t PIO_mode; /* Current setting of drive's PIO mode */ 127 u_int8_t DMA_mode; /* Current setting of drive's DMA mode */ 128 u_int8_t UDMA_mode; /* Current setting of drive's UDMA mode */ 129 130 /* Supported modes for this drive */ 131 u_int8_t PIO_cap; /* supported drive's PIO mode */ 132 u_int8_t DMA_cap; /* supported drive's DMA mode */ 133 u_int8_t UDMA_cap; /* supported drive's UDMA mode */ 134 135 /* 136 * Drive state. 137 * This is reset to 0 after a channel reset. 138 */ 139 u_int8_t state; 140 141 #define RESET 0 142 #define READY 1 143 144 /* numbers of xfers and DMA errs. Used by ata_dmaerr() */ 145 u_int8_t n_dmaerrs; 146 u_int32_t n_xfers; 147 148 /* Downgrade after NERRS_MAX errors in at most NXFER xfers */ 149 #define NERRS_MAX 4 150 #define NXFER 4000 151 152 /* Callbacks into the drive's driver. */ 153 void (*drv_done)(void *); /* transfer is done */ 154 155 struct device *drv_softc; /* ATA drives softc, if any */ 156 void *chnl_softc; /* channel softc */ 157 }; 158 159 /* User config flags that force (or disable) the use of a mode */ 160 #define ATA_CONFIG_PIO_MODES 0x0007 161 #define ATA_CONFIG_PIO_SET 0x0008 162 #define ATA_CONFIG_PIO_OFF 0 163 #define ATA_CONFIG_DMA_MODES 0x0070 164 #define ATA_CONFIG_DMA_SET 0x0080 165 #define ATA_CONFIG_DMA_DISABLE 0x0070 166 #define ATA_CONFIG_DMA_OFF 4 167 #define ATA_CONFIG_UDMA_MODES 0x0700 168 #define ATA_CONFIG_UDMA_SET 0x0800 169 #define ATA_CONFIG_UDMA_DISABLE 0x0700 170 #define ATA_CONFIG_UDMA_OFF 8 171 172 /* 173 * Parameters/state needed by the controller to perform an ATA bio. 174 */ 175 struct ata_bio { 176 volatile u_int16_t flags;/* cmd flags */ 177 #define ATA_NOSLEEP 0x0001 /* Can't sleep */ 178 #define ATA_POLL 0x0002 /* poll for completion */ 179 #define ATA_ITSDONE 0x0004 /* the transfer is as done as it gets */ 180 #define ATA_SINGLE 0x0008 /* transfer must be done in singlesector mode */ 181 #define ATA_LBA 0x0010 /* transfer uses LBA addressing */ 182 #define ATA_READ 0x0020 /* transfer is a read (otherwise a write) */ 183 #define ATA_CORR 0x0040 /* transfer had a corrected error */ 184 #define ATA_LBA48 0x0080 /* transfer uses 48-bit LBA addressing */ 185 int multi; /* # of blocks to transfer in multi-mode */ 186 struct disklabel *lp; /* pointer to drive's label info */ 187 daddr_t blkno; /* block addr */ 188 daddr_t blkdone;/* number of blks transferred */ 189 daddr_t nblks; /* number of block currently transferring */ 190 int nbytes; /* number of bytes currently transferring */ 191 long bcount; /* total number of bytes */ 192 char *databuf;/* data buffer address */ 193 volatile int error; 194 #define NOERROR 0 /* There was no error (r_error invalid) */ 195 #define ERROR 1 /* check r_error */ 196 #define ERR_DF 2 /* Drive fault */ 197 #define ERR_DMA 3 /* DMA error */ 198 #define TIMEOUT 4 /* device timed out */ 199 #define ERR_NODEV 5 /* device has been gone */ 200 #define ERR_RESET 6 /* command was terminated by channel reset */ 201 u_int8_t r_error;/* copy of error register */ 202 daddr_t badsect[127];/* 126 plus trailing -1 marker */ 203 }; 204 205 /* 206 * ATA/ATAPI commands description 207 * 208 * This structure defines the interface between the ATA/ATAPI device driver 209 * and the controller for short commands. It contains the command's parameter, 210 * the len of data's to read/write (if any), and a function to call upon 211 * completion. 212 * If no sleep is allowed, the driver can poll for command completion. 213 * Once the command completed, if the error registed is valid, the flag 214 * AT_ERROR is set and the error register value is copied to r_error . 215 * A separate interface is needed for read/write or ATAPI packet commands 216 * (which need multiple interrupts per commands). 217 */ 218 struct wdc_command { 219 u_int8_t r_command; /* Parameters to upload to registers */ 220 u_int8_t r_head; 221 u_int16_t r_cyl; 222 u_int8_t r_sector; 223 u_int8_t r_count; 224 u_int8_t r_features; 225 u_int8_t r_st_bmask; /* status register mask to wait for before 226 command */ 227 u_int8_t r_st_pmask; /* status register mask to wait for after 228 command */ 229 u_int8_t r_error; /* error register after command done */ 230 volatile u_int16_t flags; 231 232 #define AT_READ 0x0001 /* There is data to read */ 233 #define AT_WRITE 0x0002 /* There is data to write (excl. with AT_READ) */ 234 #define AT_WAIT 0x0008 /* wait in controller code for command completion */ 235 #define AT_POLL 0x0010 /* poll for command completion (no interrupts) */ 236 #define AT_DONE 0x0020 /* command is done */ 237 #define AT_XFDONE 0x0040 /* data xfer is done */ 238 #define AT_ERROR 0x0080 /* command is done with error */ 239 #define AT_TIMEOU 0x0100 /* command timed out */ 240 #define AT_DF 0x0200 /* Drive fault */ 241 #define AT_RESET 0x0400 /* command terminated by channel reset */ 242 #define AT_GONE 0x0800 /* command terminated because device is gone */ 243 #define AT_READREG 0x1000 /* Read registers on completion */ 244 245 int timeout; /* timeout (in ms) */ 246 void *data; /* Data buffer address */ 247 int bcount; /* number of bytes to transfer */ 248 void (*callback)(void *); /* command to call once command completed */ 249 void *callback_arg; /* argument passed to *callback() */ 250 }; 251 252 /* 253 * ata_bustype. The first field must be compatible with scsipi_bustype, 254 * as it's used for autoconfig by both ata and atapi drivers. 255 */ 256 struct ata_bustype { 257 int bustype_type; /* symbolic name of type */ 258 int (*ata_bio)(struct ata_drive_datas *, struct ata_bio *); 259 void (*ata_reset_channel)(struct ata_drive_datas *, int); 260 /* extra flags for ata_reset_channel(), in addition to AT_* */ 261 #define AT_RST_EMERG 0x10000 /* emergency - e.g. for a dump */ 262 #define AT_RST_NOCMD 0x20000 /* XXX has to go - temporary until we have tagged queuing */ 263 264 int (*ata_exec_command)(struct ata_drive_datas *, 265 struct wdc_command *); 266 267 #define WDC_COMPLETE 0x01 268 #define WDC_QUEUED 0x02 269 #define WDC_TRY_AGAIN 0x03 270 271 int (*ata_get_params)(struct ata_drive_datas *, u_int8_t, 272 struct ataparams *); 273 int (*ata_addref)(struct ata_drive_datas *); 274 void (*ata_delref)(struct ata_drive_datas *); 275 void (*ata_killpending)(struct ata_drive_datas *); 276 }; 277 278 /* bustype_type */ /* XXX XXX XXX */ 279 /* #define SCSIPI_BUSTYPE_SCSI 0 */ 280 /* #define SCSIPI_BUSTYPE_ATAPI 1 */ 281 #define SCSIPI_BUSTYPE_ATA 2 282 283 /* 284 * Describe an ATA device. Has to be compatible with scsipi_channel, so 285 * start with a pointer to ata_bustype. 286 */ 287 struct ata_device { 288 const struct ata_bustype *adev_bustype; 289 int adev_channel; 290 int adev_openings; 291 struct ata_drive_datas *adev_drv_data; 292 }; 293 294 #ifdef _KERNEL 295 int atabusprint(void *aux, const char *); 296 int ataprint(void *aux, const char *); 297 298 int wdc_downgrade_mode(struct ata_drive_datas *, int); 299 300 struct ataparams; 301 int ata_get_params(struct ata_drive_datas *, u_int8_t, struct ataparams *); 302 int ata_set_mode(struct ata_drive_datas *, u_int8_t, u_int8_t); 303 /* return code for these cmds */ 304 #define CMD_OK 0 305 #define CMD_ERR 1 306 #define CMD_AGAIN 2 307 308 void ata_dmaerr(struct ata_drive_datas *, int); 309 #endif /* _KERNEL */ 310 311 #endif /* _DEV_ATA_ATAVAR_H_ */ 312
Indexes created Tue Sep 30 10:09:55 GMT 2025