atavar.h revision 1.46
1 /* $NetBSD: atavar.h,v 1.46 2004/08/04 18:24:11 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _DEV_ATA_ATAVAR_H_ 33 #define _DEV_ATA_ATAVAR_H_ 34 35 #include <sys/lock.h> 36 #include <sys/queue.h> 37 38 /* 39 * Description of a command to be handled by an ATA controller. These 40 * commands are queued in a list. 41 */ 42 struct ata_xfer { 43 __volatile u_int c_flags; /* command state flags */ 44 45 /* Channel and drive that are to process the request. */ 46 struct wdc_channel *c_chp; 47 int c_drive; 48 49 void *c_cmd; /* private request structure pointer */ 50 void *c_databuf; /* pointer to data buffer */ 51 int c_bcount; /* byte count left */ 52 int c_skip; /* bytes already transferred */ 53 int c_dscpoll; /* counter for dsc polling (ATAPI) */ 54 55 /* Link on the command queue. */ 56 TAILQ_ENTRY(ata_xfer) c_xferchain; 57 58 /* Low-level protocol handlers. */ 59 void (*c_start)(struct wdc_channel *, struct ata_xfer *); 60 int (*c_intr)(struct wdc_channel *, struct ata_xfer *, int); 61 void (*c_kill_xfer)(struct wdc_channel *, struct ata_xfer *, int); 62 }; 63 64 /* vlags in c_flags */ 65 #define C_ATAPI 0x0001 /* xfer is ATAPI request */ 66 #define C_TIMEOU 0x0002 /* xfer processing timed out */ 67 #define C_POLL 0x0004 /* command is polled */ 68 #define C_DMA 0x0008 /* command uses DMA */ 69 70 /* reasons for c_kill_xfer() */ 71 #define KILL_GONE 1 /* device is gone */ 72 #define KILL_RESET 2 /* xfer was reset */ 73 74 /* Per-channel queue of ata_xfers. May be shared by multiple channels. */ 75 struct ata_queue { 76 TAILQ_HEAD(, ata_xfer) queue_xfer; /* queue of pending commands */ 77 int queue_freeze; /* freeze count for the queue */ 78 struct ata_xfer *active_xfer; /* active command */ 79 }; 80 81 /* ATA bus instance state information. */ 82 struct atabus_softc { 83 struct device sc_dev; 84 struct wdc_channel *sc_chan; /* XXXwdc */ 85 int sc_flags; 86 #define ATABUSCF_OPEN 0x01 87 }; 88 89 /* 90 * A queue of atabus instances, used to ensure the same bus probe order 91 * for a given hardware configuration at each boot. 92 */ 93 struct atabus_initq { 94 TAILQ_ENTRY(atabus_initq) atabus_initq; 95 struct atabus_softc *atabus_sc; 96 }; 97 98 #ifdef _KERNEL 99 TAILQ_HEAD(atabus_initq_head, atabus_initq); 100 extern struct atabus_initq_head atabus_initq_head; 101 extern struct simplelock atabus_interlock; 102 #endif /* _KERNEL */ 103 104 /* High-level functions and structures used by both ATA and ATAPI devices */ 105 struct ataparams; 106 107 /* Datas common to drives and controller drivers */ 108 struct ata_drive_datas { 109 u_int8_t drive; /* drive number */ 110 int8_t ata_vers; /* ATA version supported */ 111 u_int16_t drive_flags; /* bitmask for drives present/absent and cap */ 112 113 #define DRIVE_ATA 0x0001 114 #define DRIVE_ATAPI 0x0002 115 #define DRIVE_OLD 0x0004 116 #define DRIVE (DRIVE_ATA|DRIVE_ATAPI|DRIVE_OLD) 117 #define DRIVE_CAP32 0x0008 118 #define DRIVE_DMA 0x0010 119 #define DRIVE_UDMA 0x0020 120 #define DRIVE_MODE 0x0040 /* the drive reported its mode */ 121 #define DRIVE_RESET 0x0080 /* reset the drive state at next xfer */ 122 #define DRIVE_ATAPIST 0x0200 /* device is an ATAPI tape drive */ 123 124 /* 125 * Current setting of drive's PIO, DMA and UDMA modes. 126 * Is initialised by the disks drivers at attach time, and may be 127 * changed later by the controller's code if needed 128 */ 129 u_int8_t PIO_mode; /* Current setting of drive's PIO mode */ 130 u_int8_t DMA_mode; /* Current setting of drive's DMA mode */ 131 u_int8_t UDMA_mode; /* Current setting of drive's UDMA mode */ 132 133 /* Supported modes for this drive */ 134 u_int8_t PIO_cap; /* supported drive's PIO mode */ 135 u_int8_t DMA_cap; /* supported drive's DMA mode */ 136 u_int8_t UDMA_cap; /* supported drive's UDMA mode */ 137 138 /* 139 * Drive state. 140 * This is reset to 0 after a channel reset. 141 */ 142 u_int8_t state; 143 144 #define RESET 0 145 #define READY 1 146 147 /* numbers of xfers and DMA errs. Used by ata_dmaerr() */ 148 u_int8_t n_dmaerrs; 149 u_int32_t n_xfers; 150 151 /* Downgrade after NERRS_MAX errors in at most NXFER xfers */ 152 #define NERRS_MAX 4 153 #define NXFER 4000 154 155 /* Callbacks into the drive's driver. */ 156 void (*drv_done)(void *); /* transfer is done */ 157 158 struct device *drv_softc; /* ATA drives softc, if any */ 159 void *chnl_softc; /* channel softc */ 160 }; 161 162 /* User config flags that force (or disable) the use of a mode */ 163 #define ATA_CONFIG_PIO_MODES 0x0007 164 #define ATA_CONFIG_PIO_SET 0x0008 165 #define ATA_CONFIG_PIO_OFF 0 166 #define ATA_CONFIG_DMA_MODES 0x0070 167 #define ATA_CONFIG_DMA_SET 0x0080 168 #define ATA_CONFIG_DMA_DISABLE 0x0070 169 #define ATA_CONFIG_DMA_OFF 4 170 #define ATA_CONFIG_UDMA_MODES 0x0700 171 #define ATA_CONFIG_UDMA_SET 0x0800 172 #define ATA_CONFIG_UDMA_DISABLE 0x0700 173 #define ATA_CONFIG_UDMA_OFF 8 174 175 /* 176 * Parameters/state needed by the controller to perform an ATA bio. 177 */ 178 struct ata_bio { 179 volatile u_int16_t flags;/* cmd flags */ 180 #define ATA_NOSLEEP 0x0001 /* Can't sleep */ 181 #define ATA_POLL 0x0002 /* poll for completion */ 182 #define ATA_ITSDONE 0x0004 /* the transfer is as done as it gets */ 183 #define ATA_SINGLE 0x0008 /* transfer must be done in singlesector mode */ 184 #define ATA_LBA 0x0010 /* transfer uses LBA addressing */ 185 #define ATA_READ 0x0020 /* transfer is a read (otherwise a write) */ 186 #define ATA_CORR 0x0040 /* transfer had a corrected error */ 187 #define ATA_LBA48 0x0080 /* transfer uses 48-bit LBA addressing */ 188 int multi; /* # of blocks to transfer in multi-mode */ 189 struct disklabel *lp; /* pointer to drive's label info */ 190 daddr_t blkno; /* block addr */ 191 daddr_t blkdone;/* number of blks transferred */ 192 daddr_t nblks; /* number of block currently transferring */ 193 int nbytes; /* number of bytes currently transferring */ 194 long bcount; /* total number of bytes */ 195 char *databuf;/* data buffer address */ 196 volatile int error; 197 #define NOERROR 0 /* There was no error (r_error invalid) */ 198 #define ERROR 1 /* check r_error */ 199 #define ERR_DF 2 /* Drive fault */ 200 #define ERR_DMA 3 /* DMA error */ 201 #define TIMEOUT 4 /* device timed out */ 202 #define ERR_NODEV 5 /* device has been gone */ 203 #define ERR_RESET 6 /* command was terminated by channel reset */ 204 u_int8_t r_error;/* copy of error register */ 205 daddr_t badsect[127];/* 126 plus trailing -1 marker */ 206 }; 207 208 /* 209 * ATA/ATAPI commands description 210 * 211 * This structure defines the interface between the ATA/ATAPI device driver 212 * and the controller for short commands. It contains the command's parameter, 213 * the len of data's to read/write (if any), and a function to call upon 214 * completion. 215 * If no sleep is allowed, the driver can poll for command completion. 216 * Once the command completed, if the error registed is valid, the flag 217 * AT_ERROR is set and the error register value is copied to r_error . 218 * A separate interface is needed for read/write or ATAPI packet commands 219 * (which need multiple interrupts per commands). 220 */ 221 struct wdc_command { 222 u_int8_t r_command; /* Parameters to upload to registers */ 223 u_int8_t r_head; 224 u_int16_t r_cyl; 225 u_int8_t r_sector; 226 u_int8_t r_count; 227 u_int8_t r_features; 228 u_int8_t r_st_bmask; /* status register mask to wait for before 229 command */ 230 u_int8_t r_st_pmask; /* status register mask to wait for after 231 command */ 232 u_int8_t r_error; /* error register after command done */ 233 volatile u_int16_t flags; 234 235 #define AT_READ 0x0001 /* There is data to read */ 236 #define AT_WRITE 0x0002 /* There is data to write (excl. with AT_READ) */ 237 #define AT_WAIT 0x0008 /* wait in controller code for command completion */ 238 #define AT_POLL 0x0010 /* poll for command completion (no interrupts) */ 239 #define AT_DONE 0x0020 /* command is done */ 240 #define AT_XFDONE 0x0040 /* data xfer is done */ 241 #define AT_ERROR 0x0080 /* command is done with error */ 242 #define AT_TIMEOU 0x0100 /* command timed out */ 243 #define AT_DF 0x0200 /* Drive fault */ 244 #define AT_RESET 0x0400 /* command terminated by channel reset */ 245 #define AT_GONE 0x0800 /* command terminated because device is gone */ 246 #define AT_READREG 0x1000 /* Read registers on completion */ 247 248 int timeout; /* timeout (in ms) */ 249 void *data; /* Data buffer address */ 250 int bcount; /* number of bytes to transfer */ 251 void (*callback)(void *); /* command to call once command completed */ 252 void *callback_arg; /* argument passed to *callback() */ 253 }; 254 255 /* 256 * ata_bustype. The first field must be compatible with scsipi_bustype, 257 * as it's used for autoconfig by both ata and atapi drivers. 258 */ 259 struct ata_bustype { 260 int bustype_type; /* symbolic name of type */ 261 int (*ata_bio)(struct ata_drive_datas *, struct ata_bio *); 262 void (*ata_reset_channel)(struct ata_drive_datas *, int); 263 /* extra flags for ata_reset_channel(), in addition to AT_* */ 264 #define AT_RST_EMERG 0x10000 /* emergency - e.g. for a dump */ 265 #define AT_RST_NOCMD 0x20000 /* XXX has to go - temporary until we have tagged queuing */ 266 267 int (*ata_exec_command)(struct ata_drive_datas *, 268 struct wdc_command *); 269 270 #define WDC_COMPLETE 0x01 271 #define WDC_QUEUED 0x02 272 #define WDC_TRY_AGAIN 0x03 273 274 int (*ata_get_params)(struct ata_drive_datas *, u_int8_t, 275 struct ataparams *); 276 int (*ata_addref)(struct ata_drive_datas *); 277 void (*ata_delref)(struct ata_drive_datas *); 278 void (*ata_killpending)(struct ata_drive_datas *); 279 }; 280 281 /* bustype_type */ /* XXX XXX XXX */ 282 /* #define SCSIPI_BUSTYPE_SCSI 0 */ 283 /* #define SCSIPI_BUSTYPE_ATAPI 1 */ 284 #define SCSIPI_BUSTYPE_ATA 2 285 286 /* 287 * Describe an ATA device. Has to be compatible with scsipi_channel, so 288 * start with a pointer to ata_bustype. 289 */ 290 struct ata_device { 291 const struct ata_bustype *adev_bustype; 292 int adev_channel; 293 int adev_openings; 294 struct ata_drive_datas *adev_drv_data; 295 }; 296 297 #ifdef _KERNEL 298 int atabusprint(void *aux, const char *); 299 int ataprint(void *aux, const char *); 300 301 int wdc_downgrade_mode(struct ata_drive_datas *, int); 302 303 struct ataparams; 304 int ata_get_params(struct ata_drive_datas *, u_int8_t, struct ataparams *); 305 int ata_set_mode(struct ata_drive_datas *, u_int8_t, u_int8_t); 306 /* return code for these cmds */ 307 #define CMD_OK 0 308 #define CMD_ERR 1 309 #define CMD_AGAIN 2 310 311 void ata_dmaerr(struct ata_drive_datas *, int); 312 #endif /* _KERNEL */ 313 314 #endif /* _DEV_ATA_ATAVAR_H_ */ 315
Indexes created Mon Sep 29 21:09:56 GMT 2025