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atavar.h revision 1.62
      1 /*	$NetBSD: atavar.h,v 1.62 2004/08/20 20:52:31 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998, 2001 Manuel Bouyer.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by Manuel Bouyer.
     17  * 4. The name of the author may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _DEV_ATA_ATAVAR_H_
     33 #define	_DEV_ATA_ATAVAR_H_
     34 
     35 #include <sys/lock.h>
     36 #include <sys/queue.h>
     37 
     38 /* XXX For scsipi_adapter and scsipi_channel. */
     39 #include <dev/scsipi/scsipi_all.h>
     40 #include <dev/scsipi/atapiconf.h>
     41 
     42 /*
     43  * Max number of drives per channel.
     44  */
     45 #define	ATA_MAXDRIVES		2
     46 
     47 /*
     48  * Description of a command to be handled by an ATA controller.  These
     49  * commands are queued in a list.
     50  */
     51 struct ata_xfer {
     52 	__volatile u_int c_flags;	/* command state flags */
     53 
     54 	/* Channel and drive that are to process the request. */
     55 	struct ata_channel *c_chp;
     56 	int	c_drive;
     57 
     58 	void	*c_cmd;			/* private request structure pointer */
     59 	void	*c_databuf;		/* pointer to data buffer */
     60 	int	c_bcount;		/* byte count left */
     61 	int	c_skip;			/* bytes already transferred */
     62 	int	c_dscpoll;		/* counter for dsc polling (ATAPI) */
     63 
     64 	/* Link on the command queue. */
     65 	TAILQ_ENTRY(ata_xfer) c_xferchain;
     66 
     67 	/* Low-level protocol handlers. */
     68 	void	(*c_start)(struct ata_channel *, struct ata_xfer *);
     69 	int	(*c_intr)(struct ata_channel *, struct ata_xfer *, int);
     70 	void	(*c_kill_xfer)(struct ata_channel *, struct ata_xfer *, int);
     71 };
     72 
     73 /* vlags in c_flags */
     74 #define	C_ATAPI		0x0001		/* xfer is ATAPI request */
     75 #define	C_TIMEOU	0x0002		/* xfer processing timed out */
     76 #define	C_POLL		0x0004		/* command is polled */
     77 #define	C_DMA		0x0008		/* command uses DMA */
     78 
     79 /* reasons for c_kill_xfer() */
     80 #define KILL_GONE 1 /* device is gone */
     81 #define KILL_RESET 2 /* xfer was reset */
     82 
     83 /* Per-channel queue of ata_xfers.  May be shared by multiple channels. */
     84 struct ata_queue {
     85 	TAILQ_HEAD(, ata_xfer) queue_xfer; /* queue of pending commands */
     86 	int queue_freeze; /* freeze count for the queue */
     87 	struct ata_xfer *active_xfer; /* active command */
     88 };
     89 
     90 /* ATA bus instance state information. */
     91 struct atabus_softc {
     92 	struct device sc_dev;
     93 	struct ata_channel *sc_chan;
     94 	int sc_flags;
     95 #define ATABUSCF_OPEN	0x01
     96 };
     97 
     98 /*
     99  * A queue of atabus instances, used to ensure the same bus probe order
    100  * for a given hardware configuration at each boot.
    101  */
    102 struct atabus_initq {
    103 	TAILQ_ENTRY(atabus_initq) atabus_initq;
    104 	struct atabus_softc *atabus_sc;
    105 };
    106 
    107 #ifdef _KERNEL
    108 TAILQ_HEAD(atabus_initq_head, atabus_initq);
    109 extern struct atabus_initq_head atabus_initq_head;
    110 extern struct simplelock atabus_interlock;
    111 #endif /* _KERNEL */
    112 
    113 /* High-level functions and structures used by both ATA and ATAPI devices */
    114 struct ataparams;
    115 
    116 /* Datas common to drives and controller drivers */
    117 struct ata_drive_datas {
    118 	u_int8_t drive;		/* drive number */
    119 	int8_t ata_vers;	/* ATA version supported */
    120 	u_int16_t drive_flags;	/* bitmask for drives present/absent and cap */
    121 
    122 #define	DRIVE_ATA	0x0001
    123 #define	DRIVE_ATAPI	0x0002
    124 #define	DRIVE_OLD	0x0004
    125 #define	DRIVE		(DRIVE_ATA|DRIVE_ATAPI|DRIVE_OLD)
    126 #define	DRIVE_CAP32	0x0008
    127 #define	DRIVE_DMA	0x0010
    128 #define	DRIVE_UDMA	0x0020
    129 #define	DRIVE_MODE	0x0040	/* the drive reported its mode */
    130 #define	DRIVE_RESET	0x0080	/* reset the drive state at next xfer */
    131 #define	DRIVE_WAITDRAIN	0x0100	/* device is waiting for the queue to drain */
    132 #define	DRIVE_ATAPIST	0x0200	/* device is an ATAPI tape drive */
    133 #define	DRIVE_NOSTREAM	0x0400	/* no stream methods on this drive */
    134 
    135 	/*
    136 	 * Current setting of drive's PIO, DMA and UDMA modes.
    137 	 * Is initialised by the disks drivers at attach time, and may be
    138 	 * changed later by the controller's code if needed
    139 	 */
    140 	u_int8_t PIO_mode;	/* Current setting of drive's PIO mode */
    141 	u_int8_t DMA_mode;	/* Current setting of drive's DMA mode */
    142 	u_int8_t UDMA_mode;	/* Current setting of drive's UDMA mode */
    143 
    144 	/* Supported modes for this drive */
    145 	u_int8_t PIO_cap;	/* supported drive's PIO mode */
    146 	u_int8_t DMA_cap;	/* supported drive's DMA mode */
    147 	u_int8_t UDMA_cap;	/* supported drive's UDMA mode */
    148 
    149 	/*
    150 	 * Drive state.
    151 	 * This is reset to 0 after a channel reset.
    152 	 */
    153 	u_int8_t state;
    154 
    155 #define RESET          0
    156 #define READY          1
    157 
    158 	/* numbers of xfers and DMA errs. Used by ata_dmaerr() */
    159 	u_int8_t n_dmaerrs;
    160 	u_int32_t n_xfers;
    161 
    162 	/* Downgrade after NERRS_MAX errors in at most NXFER xfers */
    163 #define NERRS_MAX 4
    164 #define NXFER 4000
    165 
    166 	/* Callbacks into the drive's driver. */
    167 	void	(*drv_done)(void *);	/* transfer is done */
    168 
    169 	struct device *drv_softc;	/* ATA drives softc, if any */
    170 	void *chnl_softc;		/* channel softc */
    171 };
    172 
    173 /* User config flags that force (or disable) the use of a mode */
    174 #define ATA_CONFIG_PIO_MODES	0x0007
    175 #define ATA_CONFIG_PIO_SET	0x0008
    176 #define ATA_CONFIG_PIO_OFF	0
    177 #define ATA_CONFIG_DMA_MODES	0x0070
    178 #define ATA_CONFIG_DMA_SET	0x0080
    179 #define ATA_CONFIG_DMA_DISABLE	0x0070
    180 #define ATA_CONFIG_DMA_OFF	4
    181 #define ATA_CONFIG_UDMA_MODES	0x0700
    182 #define ATA_CONFIG_UDMA_SET	0x0800
    183 #define ATA_CONFIG_UDMA_DISABLE	0x0700
    184 #define ATA_CONFIG_UDMA_OFF	8
    185 
    186 /*
    187  * Parameters/state needed by the controller to perform an ATA bio.
    188  */
    189 struct ata_bio {
    190 	volatile u_int16_t flags;/* cmd flags */
    191 #define	ATA_NOSLEEP	0x0001	/* Can't sleep */
    192 #define	ATA_POLL	0x0002	/* poll for completion */
    193 #define	ATA_ITSDONE	0x0004	/* the transfer is as done as it gets */
    194 #define	ATA_SINGLE	0x0008	/* transfer must be done in singlesector mode */
    195 #define	ATA_LBA		0x0010	/* transfer uses LBA addressing */
    196 #define	ATA_READ	0x0020	/* transfer is a read (otherwise a write) */
    197 #define	ATA_CORR	0x0040	/* transfer had a corrected error */
    198 #define	ATA_LBA48	0x0080	/* transfer uses 48-bit LBA addressing */
    199 	int		multi;	/* # of blocks to transfer in multi-mode */
    200 	struct disklabel *lp;	/* pointer to drive's label info */
    201 	daddr_t		blkno;	/* block addr */
    202 	daddr_t		blkdone;/* number of blks transferred */
    203 	daddr_t		nblks;	/* number of block currently transferring */
    204 	int		nbytes;	/* number of bytes currently transferring */
    205 	long		bcount;	/* total number of bytes */
    206 	char		*databuf;/* data buffer address */
    207 	volatile int	error;
    208 #define	NOERROR 	0	/* There was no error (r_error invalid) */
    209 #define	ERROR		1	/* check r_error */
    210 #define	ERR_DF		2	/* Drive fault */
    211 #define	ERR_DMA		3	/* DMA error */
    212 #define	TIMEOUT		4	/* device timed out */
    213 #define	ERR_NODEV	5	/* device has been gone */
    214 #define ERR_RESET	6	/* command was terminated by channel reset */
    215 	u_int8_t	r_error;/* copy of error register */
    216 	daddr_t		badsect[127];/* 126 plus trailing -1 marker */
    217 };
    218 
    219 /*
    220  * ATA/ATAPI commands description
    221  *
    222  * This structure defines the interface between the ATA/ATAPI device driver
    223  * and the controller for short commands. It contains the command's parameter,
    224  * the len of data's to read/write (if any), and a function to call upon
    225  * completion.
    226  * If no sleep is allowed, the driver can poll for command completion.
    227  * Once the command completed, if the error registed is valid, the flag
    228  * AT_ERROR is set and the error register value is copied to r_error .
    229  * A separate interface is needed for read/write or ATAPI packet commands
    230  * (which need multiple interrupts per commands).
    231  */
    232 struct ata_command {
    233 	u_int8_t r_command;	/* Parameters to upload to registers */
    234 	u_int8_t r_head;
    235 	u_int16_t r_cyl;
    236 	u_int8_t r_sector;
    237 	u_int8_t r_count;
    238 	u_int8_t r_features;
    239 	u_int8_t r_st_bmask;	/* status register mask to wait for before
    240 				   command */
    241 	u_int8_t r_st_pmask;	/* status register mask to wait for after
    242 				   command */
    243 	u_int8_t r_error;	/* error register after command done */
    244 	volatile u_int16_t flags;
    245 
    246 #define AT_READ     0x0001 /* There is data to read */
    247 #define AT_WRITE    0x0002 /* There is data to write (excl. with AT_READ) */
    248 #define AT_WAIT     0x0008 /* wait in controller code for command completion */
    249 #define AT_POLL     0x0010 /* poll for command completion (no interrupts) */
    250 #define AT_DONE     0x0020 /* command is done */
    251 #define AT_XFDONE   0x0040 /* data xfer is done */
    252 #define AT_ERROR    0x0080 /* command is done with error */
    253 #define AT_TIMEOU   0x0100 /* command timed out */
    254 #define AT_DF       0x0200 /* Drive fault */
    255 #define AT_RESET    0x0400 /* command terminated by channel reset */
    256 #define AT_GONE     0x0800 /* command terminated because device is gone */
    257 #define AT_READREG  0x1000 /* Read registers on completion */
    258 
    259 	int timeout;		/* timeout (in ms) */
    260 	void *data;		/* Data buffer address */
    261 	int bcount;		/* number of bytes to transfer */
    262 	void (*callback)(void *); /* command to call once command completed */
    263 	void *callback_arg;	/* argument passed to *callback() */
    264 };
    265 
    266 /*
    267  * ata_bustype.  The first field must be compatible with scsipi_bustype,
    268  * as it's used for autoconfig by both ata and atapi drivers.
    269  */
    270 struct ata_bustype {
    271 	int	bustype_type;	/* symbolic name of type */
    272 	int	(*ata_bio)(struct ata_drive_datas *, struct ata_bio *);
    273 	void	(*ata_reset_drive)(struct ata_drive_datas *, int);
    274 /* extra flags for ata_reset_drive(), in addition to AT_* */
    275 #define AT_RST_EMERG 0x10000 /* emergency - e.g. for a dump */
    276 #define	AT_RST_NOCMD 0x20000 /* XXX has to go - temporary until we have tagged queuing */
    277 
    278 	int	(*ata_exec_command)(struct ata_drive_datas *,
    279 				    struct ata_command *);
    280 
    281 #define	ATACMD_COMPLETE		0x01
    282 #define	ATACMD_QUEUED		0x02
    283 #define	ATACMD_TRY_AGAIN	0x03
    284 
    285 	int	(*ata_get_params)(struct ata_drive_datas *, u_int8_t,
    286 				  struct ataparams *);
    287 	int	(*ata_addref)(struct ata_drive_datas *);
    288 	void	(*ata_delref)(struct ata_drive_datas *);
    289 	void	(*ata_killpending)(struct ata_drive_datas *);
    290 };
    291 
    292 /* bustype_type */	/* XXX XXX XXX */
    293 /* #define SCSIPI_BUSTYPE_SCSI	0 */
    294 /* #define SCSIPI_BUSTYPE_ATAPI	1 */
    295 #define	SCSIPI_BUSTYPE_ATA	2
    296 
    297 /*
    298  * Describe an ATA device.  Has to be compatible with scsipi_channel, so
    299  * start with a pointer to ata_bustype.
    300  */
    301 struct ata_device {
    302 	const struct ata_bustype *adev_bustype;
    303 	int adev_channel;
    304 	int adev_openings;
    305 	struct ata_drive_datas *adev_drv_data;
    306 };
    307 
    308 /*
    309  * Per-channel data
    310  */
    311 struct ata_channel {
    312 	struct callout ch_callout;	/* callout handle */
    313 	int ch_channel;			/* location */
    314 	struct atac_softc *ch_atac;	/* ATA controller softc */
    315 
    316 	/* Our state */
    317 	volatile int ch_flags;
    318 #define ATACH_SHUTDOWN 0x02	/* channel is shutting down */
    319 #define ATACH_IRQ_WAIT 0x10	/* controller is waiting for irq */
    320 #define ATACH_DMA_WAIT 0x20	/* controller is waiting for DMA */
    321 #define	ATACH_DISABLED 0x80	/* channel is disabled */
    322 #define ATACH_TH_RUN   0x100	/* the kenrel thread is working */
    323 #define ATACH_TH_RESET 0x200	/* someone ask the thread to reset */
    324 	u_int8_t ch_status;	/* copy of status register */
    325 	u_int8_t ch_error;	/* copy of error register */
    326 
    327 	/* for the reset callback */
    328 	int ch_reset_flags;
    329 
    330 	/* per-drive info */
    331 	int ch_ndrive;
    332 	struct ata_drive_datas ch_drive[ATA_MAXDRIVES];
    333 
    334 	struct device *atabus;	/* self */
    335 
    336 	/* ATAPI children */
    337 	struct device *atapibus;
    338 	struct scsipi_channel ch_atapi_channel;
    339 
    340 	/* ATA children */
    341 	struct device *ata_drives[ATA_MAXDRIVES];
    342 
    343 	/*
    344 	 * Channel queues.  May be the same for all channels, if hw
    345 	 * channels are not independent.
    346 	 */
    347 	struct ata_queue *ch_queue;
    348 
    349 	/* The channel kernel thread */
    350 	struct proc *ch_thread;
    351 };
    352 
    353 /*
    354  * ATA controller softc.
    355  *
    356  * This contains a bunch of generic info that all ATA controllers need
    357  * to have.
    358  *
    359  * XXX There is still some lingering wdc-centricity here.
    360  */
    361 struct atac_softc {
    362 	struct device atac_dev;		/* generic device info */
    363 
    364 	int	atac_cap;		/* controller capabilities */
    365 
    366 #define	ATAC_CAP_DATA16	0x0001		/* can do 16-bit data access */
    367 #define	ATAC_CAP_DATA32	0x0002		/* can do 32-bit data access */
    368 #define	ATAC_CAP_DMA	0x0008		/* can do ATA DMA modes */
    369 #define	ATAC_CAP_UDMA	0x0010		/* can do ATA Ultra DMA modes */
    370 #define	ATAC_CAP_ATA_NOSTREAM 0x0040	/* don't use stream funcs on ATA */
    371 #define	ATAC_CAP_ATAPI_NOSTREAM 0x0080	/* don't use stream funcs on ATAPI */
    372 #define	ATAC_CAP_NOIRQ	0x1000		/* controller never interrupts */
    373 #define	ATAC_CAP_RAID	0x4000		/* controller "supports" RAID */
    374 
    375 	uint8_t	atac_pio_cap;		/* highest PIO mode supported */
    376 	uint8_t	atac_dma_cap;		/* highest DMA mode supported */
    377 	uint8_t	atac_udma_cap;		/* highest UDMA mode supported */
    378 
    379 	/* Array of pointers to channel-specific data. */
    380 	struct ata_channel **atac_channels;
    381 	int		     atac_nchannels;
    382 
    383 	const struct ata_bustype *atac_bustype_ata;
    384 
    385 	/*
    386 	 * Glue between ATA and SCSIPI for the benefit of ATAPI.
    387 	 *
    388 	 * Note: The reference count here is used for both ATA and ATAPI
    389 	 * devices.
    390 	 */
    391 	struct atapi_adapter atac_atapi_adapter;
    392 	void (*atac_atapibus_attach)(struct atabus_softc *);
    393 
    394 	/* Driver callback to probe for drives. */
    395 	void (*atac_probe)(struct ata_channel *);
    396 
    397 	/* Optional callbacks to lock/unlock hardware. */
    398 	int  (*atac_claim_hw)(struct ata_channel *, int);
    399 	void (*atac_free_hw)(struct ata_channel *);
    400 
    401 	/*
    402 	 * Optional callbacks to set drive mode.  Required for anything
    403 	 * but basic PIO operation.
    404 	 */
    405 	void (*atac_set_modes)(struct ata_channel *);
    406 };
    407 
    408 #ifdef _KERNEL
    409 int	atabusprint(void *aux, const char *);
    410 int	ataprint(void *aux, const char *);
    411 
    412 struct ataparams;
    413 int	ata_get_params(struct ata_drive_datas *, u_int8_t, struct ataparams *);
    414 int	ata_set_mode(struct ata_drive_datas *, u_int8_t, u_int8_t);
    415 /* return code for these cmds */
    416 #define CMD_OK    0
    417 #define CMD_ERR   1
    418 #define CMD_AGAIN 2
    419 
    420 struct ata_xfer *ata_get_xfer(int);
    421 void	ata_free_xfer(struct ata_channel *, struct ata_xfer *);
    422 #define	ATAXF_CANSLEEP	0x00
    423 #define	ATAXF_NOSLEEP	0x01
    424 
    425 void	ata_exec_xfer(struct ata_channel *, struct ata_xfer *);
    426 void	ata_kill_pending(struct ata_drive_datas *);
    427 
    428 int	ata_addref(struct ata_channel *);
    429 void	ata_delref(struct ata_channel *);
    430 void	atastart(struct ata_channel *);
    431 void	ata_print_modes(struct ata_channel *);
    432 int	ata_downgrade_mode(struct ata_drive_datas *, int);
    433 void	ata_probe_caps(struct ata_drive_datas *);
    434 
    435 void	ata_dmaerr(struct ata_drive_datas *, int);
    436 #endif /* _KERNEL */
    437 
    438 #endif /* _DEV_ATA_ATAVAR_H_ */
    439