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atavar.h revision 1.72
      1 /*	$NetBSD: atavar.h,v 1.72 2006/09/07 12:34:42 itohy Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998, 2001 Manuel Bouyer.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by Manuel Bouyer.
     17  * 4. The name of the author may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _DEV_ATA_ATAVAR_H_
     33 #define	_DEV_ATA_ATAVAR_H_
     34 
     35 #include <sys/lock.h>
     36 #include <sys/queue.h>
     37 
     38 /* XXX For scsipi_adapter and scsipi_channel. */
     39 #include <dev/scsipi/scsipi_all.h>
     40 #include <dev/scsipi/atapiconf.h>
     41 
     42 /*
     43  * Max number of drives per channel.
     44  */
     45 #define	ATA_MAXDRIVES		2
     46 
     47 /*
     48  * Description of a command to be handled by an ATA controller.  These
     49  * commands are queued in a list.
     50  */
     51 struct ata_xfer {
     52 	volatile u_int c_flags;	/* command state flags */
     53 
     54 	/* Channel and drive that are to process the request. */
     55 	struct ata_channel *c_chp;
     56 	int	c_drive;
     57 
     58 	void	*c_cmd;			/* private request structure pointer */
     59 	void	*c_databuf;		/* pointer to data buffer */
     60 	int	c_bcount;		/* byte count left */
     61 	int	c_skip;			/* bytes already transferred */
     62 	int	c_dscpoll;		/* counter for dsc polling (ATAPI) */
     63 	int	c_lenoff;		/* offset to c_bcount (ATAPI) */
     64 
     65 	/* Link on the command queue. */
     66 	TAILQ_ENTRY(ata_xfer) c_xferchain;
     67 
     68 	/* Low-level protocol handlers. */
     69 	void	(*c_start)(struct ata_channel *, struct ata_xfer *);
     70 	int	(*c_intr)(struct ata_channel *, struct ata_xfer *, int);
     71 	void	(*c_kill_xfer)(struct ata_channel *, struct ata_xfer *, int);
     72 };
     73 
     74 /* flags in c_flags */
     75 #define	C_ATAPI		0x0001		/* xfer is ATAPI request */
     76 #define	C_TIMEOU	0x0002		/* xfer processing timed out */
     77 #define	C_POLL		0x0004		/* command is polled */
     78 #define	C_DMA		0x0008		/* command uses DMA */
     79 #define C_WAIT		0x0010		/* can use tsleep */
     80 #define C_WAITACT	0x0020		/* wakeup when active */
     81 #define C_FREE		0x0040		/* call ata_free_xfer() asap */
     82 #define C_PIOBM		0x0080		/* command uses busmastering PIO */
     83 
     84 /* reasons for c_kill_xfer() */
     85 #define KILL_GONE 1 /* device is gone */
     86 #define KILL_RESET 2 /* xfer was reset */
     87 
     88 /* Per-channel queue of ata_xfers.  May be shared by multiple channels. */
     89 struct ata_queue {
     90 	TAILQ_HEAD(, ata_xfer) queue_xfer; /* queue of pending commands */
     91 	int queue_freeze; /* freeze count for the queue */
     92 	struct ata_xfer *active_xfer; /* active command */
     93 	int queue_flags;	/* flags for this queue */
     94 #define QF_IDLE_WAIT   0x01    /* someone is wants the controller idle */
     95 };
     96 
     97 /* ATA bus instance state information. */
     98 struct atabus_softc {
     99 	struct device sc_dev;
    100 	struct ata_channel *sc_chan;
    101 	int sc_flags;
    102 #define ATABUSCF_OPEN	0x01
    103 	void *sc_powerhook;
    104 };
    105 
    106 /*
    107  * A queue of atabus instances, used to ensure the same bus probe order
    108  * for a given hardware configuration at each boot.
    109  */
    110 struct atabus_initq {
    111 	TAILQ_ENTRY(atabus_initq) atabus_initq;
    112 	struct atabus_softc *atabus_sc;
    113 };
    114 
    115 #ifdef _KERNEL
    116 TAILQ_HEAD(atabus_initq_head, atabus_initq);
    117 extern struct atabus_initq_head atabus_initq_head;
    118 extern struct simplelock atabus_interlock;
    119 #endif /* _KERNEL */
    120 
    121 /* High-level functions and structures used by both ATA and ATAPI devices */
    122 struct ataparams;
    123 
    124 /* Datas common to drives and controller drivers */
    125 struct ata_drive_datas {
    126 	u_int8_t drive;		/* drive number */
    127 	int8_t ata_vers;	/* ATA version supported */
    128 	u_int16_t drive_flags;	/* bitmask for drives present/absent and cap */
    129 
    130 #define	DRIVE_ATA	0x0001
    131 #define	DRIVE_ATAPI	0x0002
    132 #define	DRIVE_OLD	0x0004
    133 #define	DRIVE		(DRIVE_ATA|DRIVE_ATAPI|DRIVE_OLD)
    134 #define	DRIVE_CAP32	0x0008
    135 #define	DRIVE_DMA	0x0010
    136 #define	DRIVE_UDMA	0x0020
    137 #define	DRIVE_MODE	0x0040	/* the drive reported its mode */
    138 #define	DRIVE_RESET	0x0080	/* reset the drive state at next xfer */
    139 #define	DRIVE_WAITDRAIN	0x0100	/* device is waiting for the queue to drain */
    140 #define	DRIVE_ATAPIST	0x0200	/* device is an ATAPI tape drive */
    141 #define	DRIVE_NOSTREAM	0x0400	/* no stream methods on this drive */
    142 
    143 	/*
    144 	 * Current setting of drive's PIO, DMA and UDMA modes.
    145 	 * Is initialised by the disks drivers at attach time, and may be
    146 	 * changed later by the controller's code if needed
    147 	 */
    148 	u_int8_t PIO_mode;	/* Current setting of drive's PIO mode */
    149 	u_int8_t DMA_mode;	/* Current setting of drive's DMA mode */
    150 	u_int8_t UDMA_mode;	/* Current setting of drive's UDMA mode */
    151 
    152 	/* Supported modes for this drive */
    153 	u_int8_t PIO_cap;	/* supported drive's PIO mode */
    154 	u_int8_t DMA_cap;	/* supported drive's DMA mode */
    155 	u_int8_t UDMA_cap;	/* supported drive's UDMA mode */
    156 
    157 	/*
    158 	 * Drive state.
    159 	 * This is reset to 0 after a channel reset.
    160 	 */
    161 	u_int8_t state;
    162 
    163 #define RESET          0
    164 #define READY          1
    165 
    166 	/* numbers of xfers and DMA errs. Used by ata_dmaerr() */
    167 	u_int8_t n_dmaerrs;
    168 	u_int32_t n_xfers;
    169 
    170 	/* Downgrade after NERRS_MAX errors in at most NXFER xfers */
    171 #define NERRS_MAX 4
    172 #define NXFER 4000
    173 
    174 	/* Callbacks into the drive's driver. */
    175 	void	(*drv_done)(void *);	/* transfer is done */
    176 
    177 	struct device *drv_softc;	/* ATA drives softc, if any */
    178 	void *chnl_softc;		/* channel softc */
    179 };
    180 
    181 /* User config flags that force (or disable) the use of a mode */
    182 #define ATA_CONFIG_PIO_MODES	0x0007
    183 #define ATA_CONFIG_PIO_SET	0x0008
    184 #define ATA_CONFIG_PIO_OFF	0
    185 #define ATA_CONFIG_DMA_MODES	0x0070
    186 #define ATA_CONFIG_DMA_SET	0x0080
    187 #define ATA_CONFIG_DMA_DISABLE	0x0070
    188 #define ATA_CONFIG_DMA_OFF	4
    189 #define ATA_CONFIG_UDMA_MODES	0x0700
    190 #define ATA_CONFIG_UDMA_SET	0x0800
    191 #define ATA_CONFIG_UDMA_DISABLE	0x0700
    192 #define ATA_CONFIG_UDMA_OFF	8
    193 
    194 /*
    195  * Parameters/state needed by the controller to perform an ATA bio.
    196  */
    197 struct ata_bio {
    198 	volatile u_int16_t flags;/* cmd flags */
    199 #define	ATA_NOSLEEP	0x0001	/* Can't sleep */
    200 #define	ATA_POLL	0x0002	/* poll for completion */
    201 #define	ATA_ITSDONE	0x0004	/* the transfer is as done as it gets */
    202 #define	ATA_SINGLE	0x0008	/* transfer must be done in singlesector mode */
    203 #define	ATA_LBA		0x0010	/* transfer uses LBA addressing */
    204 #define	ATA_READ	0x0020	/* transfer is a read (otherwise a write) */
    205 #define	ATA_CORR	0x0040	/* transfer had a corrected error */
    206 #define	ATA_LBA48	0x0080	/* transfer uses 48-bit LBA addressing */
    207 	int		multi;	/* # of blocks to transfer in multi-mode */
    208 	struct disklabel *lp;	/* pointer to drive's label info */
    209 	daddr_t		blkno;	/* block addr */
    210 	daddr_t		blkdone;/* number of blks transferred */
    211 	daddr_t		nblks;	/* number of block currently transferring */
    212 	int		nbytes;	/* number of bytes currently transferring */
    213 	long		bcount;	/* total number of bytes */
    214 	char		*databuf;/* data buffer address */
    215 	volatile int	error;
    216 #define	NOERROR 	0	/* There was no error (r_error invalid) */
    217 #define	ERROR		1	/* check r_error */
    218 #define	ERR_DF		2	/* Drive fault */
    219 #define	ERR_DMA		3	/* DMA error */
    220 #define	TIMEOUT		4	/* device timed out */
    221 #define	ERR_NODEV	5	/* device has been gone */
    222 #define ERR_RESET	6	/* command was terminated by channel reset */
    223 	u_int8_t	r_error;/* copy of error register */
    224 	daddr_t		badsect[127];/* 126 plus trailing -1 marker */
    225 };
    226 
    227 /*
    228  * ATA/ATAPI commands description
    229  *
    230  * This structure defines the interface between the ATA/ATAPI device driver
    231  * and the controller for short commands. It contains the command's parameter,
    232  * the len of data's to read/write (if any), and a function to call upon
    233  * completion.
    234  * If no sleep is allowed, the driver can poll for command completion.
    235  * Once the command completed, if the error registed is valid, the flag
    236  * AT_ERROR is set and the error register value is copied to r_error .
    237  * A separate interface is needed for read/write or ATAPI packet commands
    238  * (which need multiple interrupts per commands).
    239  */
    240 struct ata_command {
    241 	u_int8_t r_command;	/* Parameters to upload to registers */
    242 	u_int8_t r_head;
    243 	u_int16_t r_cyl;
    244 	u_int8_t r_sector;
    245 	u_int8_t r_count;
    246 	u_int8_t r_features;
    247 	u_int8_t r_st_bmask;	/* status register mask to wait for before
    248 				   command */
    249 	u_int8_t r_st_pmask;	/* status register mask to wait for after
    250 				   command */
    251 	u_int8_t r_error;	/* error register after command done */
    252 	volatile u_int16_t flags;
    253 
    254 #define AT_READ     0x0001 /* There is data to read */
    255 #define AT_WRITE    0x0002 /* There is data to write (excl. with AT_READ) */
    256 #define AT_WAIT     0x0008 /* wait in controller code for command completion */
    257 #define AT_POLL     0x0010 /* poll for command completion (no interrupts) */
    258 #define AT_DONE     0x0020 /* command is done */
    259 #define AT_XFDONE   0x0040 /* data xfer is done */
    260 #define AT_ERROR    0x0080 /* command is done with error */
    261 #define AT_TIMEOU   0x0100 /* command timed out */
    262 #define AT_DF       0x0200 /* Drive fault */
    263 #define AT_RESET    0x0400 /* command terminated by channel reset */
    264 #define AT_GONE     0x0800 /* command terminated because device is gone */
    265 #define AT_READREG  0x1000 /* Read registers on completion */
    266 
    267 	int timeout;		/* timeout (in ms) */
    268 	void *data;		/* Data buffer address */
    269 	int bcount;		/* number of bytes to transfer */
    270 	void (*callback)(void *); /* command to call once command completed */
    271 	void *callback_arg;	/* argument passed to *callback() */
    272 };
    273 
    274 /*
    275  * ata_bustype.  The first field must be compatible with scsipi_bustype,
    276  * as it's used for autoconfig by both ata and atapi drivers.
    277  */
    278 struct ata_bustype {
    279 	int	bustype_type;	/* symbolic name of type */
    280 	int	(*ata_bio)(struct ata_drive_datas *, struct ata_bio *);
    281 	void	(*ata_reset_drive)(struct ata_drive_datas *, int);
    282 	void	(*ata_reset_channel)(struct ata_channel *, int);
    283 /* extra flags for ata_reset_*(), in addition to AT_* */
    284 #define AT_RST_EMERG 0x10000 /* emergency - e.g. for a dump */
    285 #define	AT_RST_NOCMD 0x20000 /* XXX has to go - temporary until we have tagged queuing */
    286 
    287 	int	(*ata_exec_command)(struct ata_drive_datas *,
    288 				    struct ata_command *);
    289 
    290 #define	ATACMD_COMPLETE		0x01
    291 #define	ATACMD_QUEUED		0x02
    292 #define	ATACMD_TRY_AGAIN	0x03
    293 
    294 	int	(*ata_get_params)(struct ata_drive_datas *, u_int8_t,
    295 				  struct ataparams *);
    296 	int	(*ata_addref)(struct ata_drive_datas *);
    297 	void	(*ata_delref)(struct ata_drive_datas *);
    298 	void	(*ata_killpending)(struct ata_drive_datas *);
    299 };
    300 
    301 /* bustype_type */	/* XXX XXX XXX */
    302 /* #define SCSIPI_BUSTYPE_SCSI	0 */
    303 /* #define SCSIPI_BUSTYPE_ATAPI	1 */
    304 #define	SCSIPI_BUSTYPE_ATA	2
    305 
    306 /*
    307  * Describe an ATA device.  Has to be compatible with scsipi_channel, so
    308  * start with a pointer to ata_bustype.
    309  */
    310 struct ata_device {
    311 	const struct ata_bustype *adev_bustype;
    312 	int adev_channel;
    313 	int adev_openings;
    314 	struct ata_drive_datas *adev_drv_data;
    315 };
    316 
    317 /*
    318  * Per-channel data
    319  */
    320 struct ata_channel {
    321 	struct callout ch_callout;	/* callout handle */
    322 	int ch_channel;			/* location */
    323 	struct atac_softc *ch_atac;	/* ATA controller softc */
    324 
    325 	/* Our state */
    326 	volatile int ch_flags;
    327 #define ATACH_SHUTDOWN 0x02	/* channel is shutting down */
    328 #define ATACH_IRQ_WAIT 0x10	/* controller is waiting for irq */
    329 #define ATACH_DMA_WAIT 0x20	/* controller is waiting for DMA */
    330 #define ATACH_PIOBM_WAIT 0x40	/* controller is waiting for busmastering PIO */
    331 #define	ATACH_DISABLED 0x80	/* channel is disabled */
    332 #define ATACH_TH_RUN   0x100	/* the kernel thread is working */
    333 #define ATACH_TH_RESET 0x200	/* someone ask the thread to reset */
    334 	u_int8_t ch_status;	/* copy of status register */
    335 	u_int8_t ch_error;	/* copy of error register */
    336 
    337 	/* for the reset callback */
    338 	int ch_reset_flags;
    339 
    340 	/* per-drive info */
    341 	int ch_ndrive;
    342 	struct ata_drive_datas ch_drive[ATA_MAXDRIVES];
    343 
    344 	struct device *atabus;	/* self */
    345 
    346 	/* ATAPI children */
    347 	struct device *atapibus;
    348 	struct scsipi_channel ch_atapi_channel;
    349 
    350 	/* ATA children */
    351 	struct device *ata_drives[ATA_MAXDRIVES];
    352 
    353 	/*
    354 	 * Channel queues.  May be the same for all channels, if hw
    355 	 * channels are not independent.
    356 	 */
    357 	struct ata_queue *ch_queue;
    358 
    359 	/* The channel kernel thread */
    360 	struct proc *ch_thread;
    361 };
    362 
    363 /*
    364  * ATA controller softc.
    365  *
    366  * This contains a bunch of generic info that all ATA controllers need
    367  * to have.
    368  *
    369  * XXX There is still some lingering wdc-centricity here.
    370  */
    371 struct atac_softc {
    372 	struct device atac_dev;		/* generic device info */
    373 
    374 	int	atac_cap;		/* controller capabilities */
    375 
    376 #define	ATAC_CAP_DATA16	0x0001		/* can do 16-bit data access */
    377 #define	ATAC_CAP_DATA32	0x0002		/* can do 32-bit data access */
    378 #define	ATAC_CAP_DMA	0x0008		/* can do ATA DMA modes */
    379 #define	ATAC_CAP_UDMA	0x0010		/* can do ATA Ultra DMA modes */
    380 #define	ATAC_CAP_PIOBM	0x0020		/* can do busmastering PIO transfer */
    381 #define	ATAC_CAP_ATA_NOSTREAM 0x0040	/* don't use stream funcs on ATA */
    382 #define	ATAC_CAP_ATAPI_NOSTREAM 0x0080	/* don't use stream funcs on ATAPI */
    383 #define	ATAC_CAP_NOIRQ	0x1000		/* controller never interrupts */
    384 #define	ATAC_CAP_RAID	0x4000		/* controller "supports" RAID */
    385 
    386 	uint8_t	atac_pio_cap;		/* highest PIO mode supported */
    387 	uint8_t	atac_dma_cap;		/* highest DMA mode supported */
    388 	uint8_t	atac_udma_cap;		/* highest UDMA mode supported */
    389 
    390 	/* Array of pointers to channel-specific data. */
    391 	struct ata_channel **atac_channels;
    392 	int		     atac_nchannels;
    393 
    394 	const struct ata_bustype *atac_bustype_ata;
    395 
    396 	/*
    397 	 * Glue between ATA and SCSIPI for the benefit of ATAPI.
    398 	 *
    399 	 * Note: The reference count here is used for both ATA and ATAPI
    400 	 * devices.
    401 	 */
    402 	struct atapi_adapter atac_atapi_adapter;
    403 	void (*atac_atapibus_attach)(struct atabus_softc *);
    404 
    405 	/* Driver callback to probe for drives. */
    406 	void (*atac_probe)(struct ata_channel *);
    407 
    408 	/* Optional callbacks to lock/unlock hardware. */
    409 	int  (*atac_claim_hw)(struct ata_channel *, int);
    410 	void (*atac_free_hw)(struct ata_channel *);
    411 
    412 	/*
    413 	 * Optional callbacks to set drive mode.  Required for anything
    414 	 * but basic PIO operation.
    415 	 */
    416 	void (*atac_set_modes)(struct ata_channel *);
    417 };
    418 
    419 #ifdef _KERNEL
    420 void	ata_channel_attach(struct ata_channel *);
    421 int	atabusprint(void *aux, const char *);
    422 int	ataprint(void *aux, const char *);
    423 
    424 struct ataparams;
    425 int	ata_get_params(struct ata_drive_datas *, u_int8_t, struct ataparams *);
    426 int	ata_set_mode(struct ata_drive_datas *, u_int8_t, u_int8_t);
    427 /* return code for these cmds */
    428 #define CMD_OK    0
    429 #define CMD_ERR   1
    430 #define CMD_AGAIN 2
    431 
    432 struct ata_xfer *ata_get_xfer(int);
    433 void	ata_free_xfer(struct ata_channel *, struct ata_xfer *);
    434 #define	ATAXF_CANSLEEP	0x00
    435 #define	ATAXF_NOSLEEP	0x01
    436 
    437 void	ata_exec_xfer(struct ata_channel *, struct ata_xfer *);
    438 void	ata_kill_pending(struct ata_drive_datas *);
    439 void	ata_reset_channel(struct ata_channel *, int);
    440 
    441 int	ata_addref(struct ata_channel *);
    442 void	ata_delref(struct ata_channel *);
    443 void	atastart(struct ata_channel *);
    444 void	ata_print_modes(struct ata_channel *);
    445 int	ata_downgrade_mode(struct ata_drive_datas *, int);
    446 void	ata_probe_caps(struct ata_drive_datas *);
    447 
    448 void	ata_dmaerr(struct ata_drive_datas *, int);
    449 void	ata_queue_idle(struct ata_queue *);
    450 #endif /* _KERNEL */
    451 
    452 #endif /* _DEV_ATA_ATAVAR_H_ */
    453