atavar.h revision 1.73
1 /* $NetBSD: atavar.h,v 1.73 2006/09/30 15:56:18 itohy Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _DEV_ATA_ATAVAR_H_ 33 #define _DEV_ATA_ATAVAR_H_ 34 35 #include <sys/lock.h> 36 #include <sys/queue.h> 37 38 #include <dev/ata/ataconf.h> 39 40 /* XXX For scsipi_adapter and scsipi_channel. */ 41 #include <dev/scsipi/scsipi_all.h> 42 #include <dev/scsipi/atapiconf.h> 43 44 /* 45 * Max number of drives per channel. 46 */ 47 #define ATA_MAXDRIVES 2 48 49 /* 50 * Description of a command to be handled by an ATA controller. These 51 * commands are queued in a list. 52 */ 53 struct ata_xfer { 54 volatile u_int c_flags; /* command state flags */ 55 56 /* Channel and drive that are to process the request. */ 57 struct ata_channel *c_chp; 58 int c_drive; 59 60 void *c_cmd; /* private request structure pointer */ 61 void *c_databuf; /* pointer to data buffer */ 62 int c_bcount; /* byte count left */ 63 int c_skip; /* bytes already transferred */ 64 int c_dscpoll; /* counter for dsc polling (ATAPI) */ 65 int c_lenoff; /* offset to c_bcount (ATAPI) */ 66 67 /* Link on the command queue. */ 68 TAILQ_ENTRY(ata_xfer) c_xferchain; 69 70 /* Low-level protocol handlers. */ 71 void (*c_start)(struct ata_channel *, struct ata_xfer *); 72 int (*c_intr)(struct ata_channel *, struct ata_xfer *, int); 73 void (*c_kill_xfer)(struct ata_channel *, struct ata_xfer *, int); 74 }; 75 76 /* flags in c_flags */ 77 #define C_ATAPI 0x0001 /* xfer is ATAPI request */ 78 #define C_TIMEOU 0x0002 /* xfer processing timed out */ 79 #define C_POLL 0x0004 /* command is polled */ 80 #define C_DMA 0x0008 /* command uses DMA */ 81 #define C_WAIT 0x0010 /* can use tsleep */ 82 #define C_WAITACT 0x0020 /* wakeup when active */ 83 #define C_FREE 0x0040 /* call ata_free_xfer() asap */ 84 #define C_PIOBM 0x0080 /* command uses busmastering PIO */ 85 86 /* reasons for c_kill_xfer() */ 87 #define KILL_GONE 1 /* device is gone */ 88 #define KILL_RESET 2 /* xfer was reset */ 89 90 /* Per-channel queue of ata_xfers. May be shared by multiple channels. */ 91 struct ata_queue { 92 TAILQ_HEAD(, ata_xfer) queue_xfer; /* queue of pending commands */ 93 int queue_freeze; /* freeze count for the queue */ 94 struct ata_xfer *active_xfer; /* active command */ 95 int queue_flags; /* flags for this queue */ 96 #define QF_IDLE_WAIT 0x01 /* someone is wants the controller idle */ 97 }; 98 99 /* ATA bus instance state information. */ 100 struct atabus_softc { 101 struct device sc_dev; 102 struct ata_channel *sc_chan; 103 int sc_flags; 104 #define ATABUSCF_OPEN 0x01 105 void *sc_powerhook; 106 }; 107 108 /* 109 * A queue of atabus instances, used to ensure the same bus probe order 110 * for a given hardware configuration at each boot. 111 */ 112 struct atabus_initq { 113 TAILQ_ENTRY(atabus_initq) atabus_initq; 114 struct atabus_softc *atabus_sc; 115 }; 116 117 #ifdef _KERNEL 118 TAILQ_HEAD(atabus_initq_head, atabus_initq); 119 extern struct atabus_initq_head atabus_initq_head; 120 extern struct simplelock atabus_interlock; 121 #endif /* _KERNEL */ 122 123 /* High-level functions and structures used by both ATA and ATAPI devices */ 124 struct ataparams; 125 126 /* Datas common to drives and controller drivers */ 127 struct ata_drive_datas { 128 u_int8_t drive; /* drive number */ 129 int8_t ata_vers; /* ATA version supported */ 130 u_int16_t drive_flags; /* bitmask for drives present/absent and cap */ 131 132 #define DRIVE_ATA 0x0001 133 #define DRIVE_ATAPI 0x0002 134 #define DRIVE_OLD 0x0004 135 #define DRIVE (DRIVE_ATA|DRIVE_ATAPI|DRIVE_OLD) 136 #define DRIVE_CAP32 0x0008 137 #define DRIVE_DMA 0x0010 138 #define DRIVE_UDMA 0x0020 139 #define DRIVE_MODE 0x0040 /* the drive reported its mode */ 140 #define DRIVE_RESET 0x0080 /* reset the drive state at next xfer */ 141 #define DRIVE_WAITDRAIN 0x0100 /* device is waiting for the queue to drain */ 142 #define DRIVE_ATAPIST 0x0200 /* device is an ATAPI tape drive */ 143 #define DRIVE_NOSTREAM 0x0400 /* no stream methods on this drive */ 144 145 /* 146 * Current setting of drive's PIO, DMA and UDMA modes. 147 * Is initialised by the disks drivers at attach time, and may be 148 * changed later by the controller's code if needed 149 */ 150 u_int8_t PIO_mode; /* Current setting of drive's PIO mode */ 151 #if NATA_DMA 152 u_int8_t DMA_mode; /* Current setting of drive's DMA mode */ 153 #if NATA_UDMA 154 u_int8_t UDMA_mode; /* Current setting of drive's UDMA mode */ 155 #endif 156 #endif 157 158 /* Supported modes for this drive */ 159 u_int8_t PIO_cap; /* supported drive's PIO mode */ 160 #if NATA_DMA 161 u_int8_t DMA_cap; /* supported drive's DMA mode */ 162 #if NATA_UDMA 163 u_int8_t UDMA_cap; /* supported drive's UDMA mode */ 164 #endif 165 #endif 166 167 /* 168 * Drive state. 169 * This is reset to 0 after a channel reset. 170 */ 171 u_int8_t state; 172 173 #define RESET 0 174 #define READY 1 175 176 #if NATA_DMA 177 /* numbers of xfers and DMA errs. Used by ata_dmaerr() */ 178 u_int8_t n_dmaerrs; 179 u_int32_t n_xfers; 180 181 /* Downgrade after NERRS_MAX errors in at most NXFER xfers */ 182 #define NERRS_MAX 4 183 #define NXFER 4000 184 #endif 185 186 /* Callbacks into the drive's driver. */ 187 void (*drv_done)(void *); /* transfer is done */ 188 189 struct device *drv_softc; /* ATA drives softc, if any */ 190 void *chnl_softc; /* channel softc */ 191 }; 192 193 /* User config flags that force (or disable) the use of a mode */ 194 #define ATA_CONFIG_PIO_MODES 0x0007 195 #define ATA_CONFIG_PIO_SET 0x0008 196 #define ATA_CONFIG_PIO_OFF 0 197 #define ATA_CONFIG_DMA_MODES 0x0070 198 #define ATA_CONFIG_DMA_SET 0x0080 199 #define ATA_CONFIG_DMA_DISABLE 0x0070 200 #define ATA_CONFIG_DMA_OFF 4 201 #define ATA_CONFIG_UDMA_MODES 0x0700 202 #define ATA_CONFIG_UDMA_SET 0x0800 203 #define ATA_CONFIG_UDMA_DISABLE 0x0700 204 #define ATA_CONFIG_UDMA_OFF 8 205 206 /* 207 * Parameters/state needed by the controller to perform an ATA bio. 208 */ 209 struct ata_bio { 210 volatile u_int16_t flags;/* cmd flags */ 211 #define ATA_NOSLEEP 0x0001 /* Can't sleep */ 212 #define ATA_POLL 0x0002 /* poll for completion */ 213 #define ATA_ITSDONE 0x0004 /* the transfer is as done as it gets */ 214 #define ATA_SINGLE 0x0008 /* transfer must be done in singlesector mode */ 215 #define ATA_LBA 0x0010 /* transfer uses LBA addressing */ 216 #define ATA_READ 0x0020 /* transfer is a read (otherwise a write) */ 217 #define ATA_CORR 0x0040 /* transfer had a corrected error */ 218 #define ATA_LBA48 0x0080 /* transfer uses 48-bit LBA addressing */ 219 int multi; /* # of blocks to transfer in multi-mode */ 220 struct disklabel *lp; /* pointer to drive's label info */ 221 daddr_t blkno; /* block addr */ 222 daddr_t blkdone;/* number of blks transferred */ 223 daddr_t nblks; /* number of block currently transferring */ 224 int nbytes; /* number of bytes currently transferring */ 225 long bcount; /* total number of bytes */ 226 char *databuf;/* data buffer address */ 227 volatile int error; 228 #define NOERROR 0 /* There was no error (r_error invalid) */ 229 #define ERROR 1 /* check r_error */ 230 #define ERR_DF 2 /* Drive fault */ 231 #define ERR_DMA 3 /* DMA error */ 232 #define TIMEOUT 4 /* device timed out */ 233 #define ERR_NODEV 5 /* device has been gone */ 234 #define ERR_RESET 6 /* command was terminated by channel reset */ 235 u_int8_t r_error;/* copy of error register */ 236 daddr_t badsect[127];/* 126 plus trailing -1 marker */ 237 }; 238 239 /* 240 * ATA/ATAPI commands description 241 * 242 * This structure defines the interface between the ATA/ATAPI device driver 243 * and the controller for short commands. It contains the command's parameter, 244 * the len of data's to read/write (if any), and a function to call upon 245 * completion. 246 * If no sleep is allowed, the driver can poll for command completion. 247 * Once the command completed, if the error registed is valid, the flag 248 * AT_ERROR is set and the error register value is copied to r_error . 249 * A separate interface is needed for read/write or ATAPI packet commands 250 * (which need multiple interrupts per commands). 251 */ 252 struct ata_command { 253 u_int8_t r_command; /* Parameters to upload to registers */ 254 u_int8_t r_head; 255 u_int16_t r_cyl; 256 u_int8_t r_sector; 257 u_int8_t r_count; 258 u_int8_t r_features; 259 u_int8_t r_st_bmask; /* status register mask to wait for before 260 command */ 261 u_int8_t r_st_pmask; /* status register mask to wait for after 262 command */ 263 u_int8_t r_error; /* error register after command done */ 264 volatile u_int16_t flags; 265 266 #define AT_READ 0x0001 /* There is data to read */ 267 #define AT_WRITE 0x0002 /* There is data to write (excl. with AT_READ) */ 268 #define AT_WAIT 0x0008 /* wait in controller code for command completion */ 269 #define AT_POLL 0x0010 /* poll for command completion (no interrupts) */ 270 #define AT_DONE 0x0020 /* command is done */ 271 #define AT_XFDONE 0x0040 /* data xfer is done */ 272 #define AT_ERROR 0x0080 /* command is done with error */ 273 #define AT_TIMEOU 0x0100 /* command timed out */ 274 #define AT_DF 0x0200 /* Drive fault */ 275 #define AT_RESET 0x0400 /* command terminated by channel reset */ 276 #define AT_GONE 0x0800 /* command terminated because device is gone */ 277 #define AT_READREG 0x1000 /* Read registers on completion */ 278 279 int timeout; /* timeout (in ms) */ 280 void *data; /* Data buffer address */ 281 int bcount; /* number of bytes to transfer */ 282 void (*callback)(void *); /* command to call once command completed */ 283 void *callback_arg; /* argument passed to *callback() */ 284 }; 285 286 /* 287 * ata_bustype. The first field must be compatible with scsipi_bustype, 288 * as it's used for autoconfig by both ata and atapi drivers. 289 */ 290 struct ata_bustype { 291 int bustype_type; /* symbolic name of type */ 292 int (*ata_bio)(struct ata_drive_datas *, struct ata_bio *); 293 void (*ata_reset_drive)(struct ata_drive_datas *, int); 294 void (*ata_reset_channel)(struct ata_channel *, int); 295 /* extra flags for ata_reset_*(), in addition to AT_* */ 296 #define AT_RST_EMERG 0x10000 /* emergency - e.g. for a dump */ 297 #define AT_RST_NOCMD 0x20000 /* XXX has to go - temporary until we have tagged queuing */ 298 299 int (*ata_exec_command)(struct ata_drive_datas *, 300 struct ata_command *); 301 302 #define ATACMD_COMPLETE 0x01 303 #define ATACMD_QUEUED 0x02 304 #define ATACMD_TRY_AGAIN 0x03 305 306 int (*ata_get_params)(struct ata_drive_datas *, u_int8_t, 307 struct ataparams *); 308 int (*ata_addref)(struct ata_drive_datas *); 309 void (*ata_delref)(struct ata_drive_datas *); 310 void (*ata_killpending)(struct ata_drive_datas *); 311 }; 312 313 /* bustype_type */ /* XXX XXX XXX */ 314 /* #define SCSIPI_BUSTYPE_SCSI 0 */ 315 /* #define SCSIPI_BUSTYPE_ATAPI 1 */ 316 #define SCSIPI_BUSTYPE_ATA 2 317 318 /* 319 * Describe an ATA device. Has to be compatible with scsipi_channel, so 320 * start with a pointer to ata_bustype. 321 */ 322 struct ata_device { 323 const struct ata_bustype *adev_bustype; 324 int adev_channel; 325 int adev_openings; 326 struct ata_drive_datas *adev_drv_data; 327 }; 328 329 /* 330 * Per-channel data 331 */ 332 struct ata_channel { 333 struct callout ch_callout; /* callout handle */ 334 int ch_channel; /* location */ 335 struct atac_softc *ch_atac; /* ATA controller softc */ 336 337 /* Our state */ 338 volatile int ch_flags; 339 #define ATACH_SHUTDOWN 0x02 /* channel is shutting down */ 340 #define ATACH_IRQ_WAIT 0x10 /* controller is waiting for irq */ 341 #define ATACH_DMA_WAIT 0x20 /* controller is waiting for DMA */ 342 #define ATACH_PIOBM_WAIT 0x40 /* controller is waiting for busmastering PIO */ 343 #define ATACH_DISABLED 0x80 /* channel is disabled */ 344 #define ATACH_TH_RUN 0x100 /* the kernel thread is working */ 345 #define ATACH_TH_RESET 0x200 /* someone ask the thread to reset */ 346 u_int8_t ch_status; /* copy of status register */ 347 u_int8_t ch_error; /* copy of error register */ 348 349 /* for the reset callback */ 350 int ch_reset_flags; 351 352 /* per-drive info */ 353 int ch_ndrive; 354 struct ata_drive_datas ch_drive[ATA_MAXDRIVES]; 355 356 struct device *atabus; /* self */ 357 358 /* ATAPI children */ 359 struct device *atapibus; 360 struct scsipi_channel ch_atapi_channel; 361 362 /* ATA children */ 363 struct device *ata_drives[ATA_MAXDRIVES]; 364 365 /* 366 * Channel queues. May be the same for all channels, if hw 367 * channels are not independent. 368 */ 369 struct ata_queue *ch_queue; 370 371 /* The channel kernel thread */ 372 struct proc *ch_thread; 373 }; 374 375 /* 376 * ATA controller softc. 377 * 378 * This contains a bunch of generic info that all ATA controllers need 379 * to have. 380 * 381 * XXX There is still some lingering wdc-centricity here. 382 */ 383 struct atac_softc { 384 struct device atac_dev; /* generic device info */ 385 386 int atac_cap; /* controller capabilities */ 387 388 #define ATAC_CAP_DATA16 0x0001 /* can do 16-bit data access */ 389 #define ATAC_CAP_DATA32 0x0002 /* can do 32-bit data access */ 390 #define ATAC_CAP_DMA 0x0008 /* can do ATA DMA modes */ 391 #define ATAC_CAP_UDMA 0x0010 /* can do ATA Ultra DMA modes */ 392 #define ATAC_CAP_PIOBM 0x0020 /* can do busmastering PIO transfer */ 393 #define ATAC_CAP_ATA_NOSTREAM 0x0040 /* don't use stream funcs on ATA */ 394 #define ATAC_CAP_ATAPI_NOSTREAM 0x0080 /* don't use stream funcs on ATAPI */ 395 #define ATAC_CAP_NOIRQ 0x1000 /* controller never interrupts */ 396 #define ATAC_CAP_RAID 0x4000 /* controller "supports" RAID */ 397 398 uint8_t atac_pio_cap; /* highest PIO mode supported */ 399 #if NATA_DMA 400 uint8_t atac_dma_cap; /* highest DMA mode supported */ 401 #if NATA_UDMA 402 uint8_t atac_udma_cap; /* highest UDMA mode supported */ 403 #endif 404 #endif 405 406 /* Array of pointers to channel-specific data. */ 407 struct ata_channel **atac_channels; 408 int atac_nchannels; 409 410 const struct ata_bustype *atac_bustype_ata; 411 412 /* 413 * Glue between ATA and SCSIPI for the benefit of ATAPI. 414 * 415 * Note: The reference count here is used for both ATA and ATAPI 416 * devices. 417 */ 418 struct atapi_adapter atac_atapi_adapter; 419 void (*atac_atapibus_attach)(struct atabus_softc *); 420 421 /* Driver callback to probe for drives. */ 422 void (*atac_probe)(struct ata_channel *); 423 424 /* Optional callbacks to lock/unlock hardware. */ 425 int (*atac_claim_hw)(struct ata_channel *, int); 426 void (*atac_free_hw)(struct ata_channel *); 427 428 /* 429 * Optional callbacks to set drive mode. Required for anything 430 * but basic PIO operation. 431 */ 432 void (*atac_set_modes)(struct ata_channel *); 433 }; 434 435 #ifdef _KERNEL 436 void ata_channel_attach(struct ata_channel *); 437 int atabusprint(void *aux, const char *); 438 int ataprint(void *aux, const char *); 439 440 struct ataparams; 441 int ata_get_params(struct ata_drive_datas *, u_int8_t, struct ataparams *); 442 int ata_set_mode(struct ata_drive_datas *, u_int8_t, u_int8_t); 443 /* return code for these cmds */ 444 #define CMD_OK 0 445 #define CMD_ERR 1 446 #define CMD_AGAIN 2 447 448 struct ata_xfer *ata_get_xfer(int); 449 void ata_free_xfer(struct ata_channel *, struct ata_xfer *); 450 #define ATAXF_CANSLEEP 0x00 451 #define ATAXF_NOSLEEP 0x01 452 453 void ata_exec_xfer(struct ata_channel *, struct ata_xfer *); 454 void ata_kill_pending(struct ata_drive_datas *); 455 void ata_reset_channel(struct ata_channel *, int); 456 457 int ata_addref(struct ata_channel *); 458 void ata_delref(struct ata_channel *); 459 void atastart(struct ata_channel *); 460 void ata_print_modes(struct ata_channel *); 461 #if NATA_DMA 462 int ata_downgrade_mode(struct ata_drive_datas *, int); 463 #endif 464 void ata_probe_caps(struct ata_drive_datas *); 465 466 #if NATA_DMA 467 void ata_dmaerr(struct ata_drive_datas *, int); 468 #endif 469 void ata_queue_idle(struct ata_queue *); 470 #endif /* _KERNEL */ 471 472 #endif /* _DEV_ATA_ATAVAR_H_ */ 473
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