atavar.h revision 1.78
1 /* $NetBSD: atavar.h,v 1.78 2008/11/16 19:31:21 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _DEV_ATA_ATAVAR_H_ 33 #define _DEV_ATA_ATAVAR_H_ 34 35 #include <sys/lock.h> 36 #include <sys/queue.h> 37 38 #include <dev/ata/ataconf.h> 39 40 /* XXX For scsipi_adapter and scsipi_channel. */ 41 #include <dev/scsipi/scsipi_all.h> 42 #include <dev/scsipi/atapiconf.h> 43 44 /* 45 * Max number of drives per channel. 46 */ 47 #define ATA_MAXDRIVES 2 48 49 /* 50 * Description of a command to be handled by an ATA controller. These 51 * commands are queued in a list. 52 */ 53 struct ata_xfer { 54 volatile u_int c_flags; /* command state flags */ 55 56 /* Channel and drive that are to process the request. */ 57 struct ata_channel *c_chp; 58 int c_drive; 59 60 void *c_cmd; /* private request structure pointer */ 61 void *c_databuf; /* pointer to data buffer */ 62 int c_bcount; /* byte count left */ 63 int c_skip; /* bytes already transferred */ 64 int c_dscpoll; /* counter for dsc polling (ATAPI) */ 65 int c_lenoff; /* offset to c_bcount (ATAPI) */ 66 67 /* Link on the command queue. */ 68 TAILQ_ENTRY(ata_xfer) c_xferchain; 69 70 /* Low-level protocol handlers. */ 71 void (*c_start)(struct ata_channel *, struct ata_xfer *); 72 int (*c_intr)(struct ata_channel *, struct ata_xfer *, int); 73 void (*c_kill_xfer)(struct ata_channel *, struct ata_xfer *, int); 74 }; 75 76 /* flags in c_flags */ 77 #define C_ATAPI 0x0001 /* xfer is ATAPI request */ 78 #define C_TIMEOU 0x0002 /* xfer processing timed out */ 79 #define C_POLL 0x0004 /* command is polled */ 80 #define C_DMA 0x0008 /* command uses DMA */ 81 #define C_WAIT 0x0010 /* can use tsleep */ 82 #define C_WAITACT 0x0020 /* wakeup when active */ 83 #define C_FREE 0x0040 /* call ata_free_xfer() asap */ 84 #define C_PIOBM 0x0080 /* command uses busmastering PIO */ 85 86 /* reasons for c_kill_xfer() */ 87 #define KILL_GONE 1 /* device is gone */ 88 #define KILL_RESET 2 /* xfer was reset */ 89 90 /* Per-channel queue of ata_xfers. May be shared by multiple channels. */ 91 struct ata_queue { 92 TAILQ_HEAD(, ata_xfer) queue_xfer; /* queue of pending commands */ 93 int queue_freeze; /* freeze count for the queue */ 94 struct ata_xfer *active_xfer; /* active command */ 95 int queue_flags; /* flags for this queue */ 96 #define QF_IDLE_WAIT 0x01 /* someone is wants the controller idle */ 97 }; 98 99 /* ATA bus instance state information. */ 100 struct atabus_softc { 101 device_t sc_dev; 102 struct ata_channel *sc_chan; 103 int sc_flags; 104 #define ATABUSCF_OPEN 0x01 105 }; 106 107 /* 108 * A queue of atabus instances, used to ensure the same bus probe order 109 * for a given hardware configuration at each boot. 110 */ 111 struct atabus_initq { 112 TAILQ_ENTRY(atabus_initq) atabus_initq; 113 struct atabus_softc *atabus_sc; 114 }; 115 116 #ifdef _KERNEL 117 TAILQ_HEAD(atabus_initq_head, atabus_initq); 118 extern struct atabus_initq_head atabus_initq_head; 119 extern struct simplelock atabus_interlock; 120 #endif /* _KERNEL */ 121 122 /* High-level functions and structures used by both ATA and ATAPI devices */ 123 struct ataparams; 124 125 /* Datas common to drives and controller drivers */ 126 struct ata_drive_datas { 127 u_int8_t drive; /* drive number */ 128 int8_t ata_vers; /* ATA version supported */ 129 u_int16_t drive_flags; /* bitmask for drives present/absent and cap */ 130 131 #define DRIVE_ATA 0x0001 132 #define DRIVE_ATAPI 0x0002 133 #define DRIVE_OLD 0x0004 134 #define DRIVE (DRIVE_ATA|DRIVE_ATAPI|DRIVE_OLD) 135 #define DRIVE_CAP32 0x0008 136 #define DRIVE_DMA 0x0010 137 #define DRIVE_UDMA 0x0020 138 #define DRIVE_MODE 0x0040 /* the drive reported its mode */ 139 #define DRIVE_RESET 0x0080 /* reset the drive state at next xfer */ 140 #define DRIVE_WAITDRAIN 0x0100 /* device is waiting for the queue to drain */ 141 #define DRIVE_ATAPIST 0x0200 /* device is an ATAPI tape drive */ 142 #define DRIVE_NOSTREAM 0x0400 /* no stream methods on this drive */ 143 144 /* 145 * Current setting of drive's PIO, DMA and UDMA modes. 146 * Is initialised by the disks drivers at attach time, and may be 147 * changed later by the controller's code if needed 148 */ 149 u_int8_t PIO_mode; /* Current setting of drive's PIO mode */ 150 #if NATA_DMA 151 u_int8_t DMA_mode; /* Current setting of drive's DMA mode */ 152 #if NATA_UDMA 153 u_int8_t UDMA_mode; /* Current setting of drive's UDMA mode */ 154 #endif 155 #endif 156 157 /* Supported modes for this drive */ 158 u_int8_t PIO_cap; /* supported drive's PIO mode */ 159 #if NATA_DMA 160 u_int8_t DMA_cap; /* supported drive's DMA mode */ 161 #if NATA_UDMA 162 u_int8_t UDMA_cap; /* supported drive's UDMA mode */ 163 #endif 164 #endif 165 166 /* 167 * Drive state. 168 * This is reset to 0 after a channel reset. 169 */ 170 u_int8_t state; 171 172 #define RESET 0 173 #define READY 1 174 175 #if NATA_DMA 176 /* numbers of xfers and DMA errs. Used by ata_dmaerr() */ 177 u_int8_t n_dmaerrs; 178 u_int32_t n_xfers; 179 180 /* Downgrade after NERRS_MAX errors in at most NXFER xfers */ 181 #define NERRS_MAX 4 182 #define NXFER 4000 183 #endif 184 185 /* Callbacks into the drive's driver. */ 186 void (*drv_done)(void *); /* transfer is done */ 187 188 device_t drv_softc; /* ATA drives softc, if any */ 189 void *chnl_softc; /* channel softc */ 190 }; 191 192 /* User config flags that force (or disable) the use of a mode */ 193 #define ATA_CONFIG_PIO_MODES 0x0007 194 #define ATA_CONFIG_PIO_SET 0x0008 195 #define ATA_CONFIG_PIO_OFF 0 196 #define ATA_CONFIG_DMA_MODES 0x0070 197 #define ATA_CONFIG_DMA_SET 0x0080 198 #define ATA_CONFIG_DMA_DISABLE 0x0070 199 #define ATA_CONFIG_DMA_OFF 4 200 #define ATA_CONFIG_UDMA_MODES 0x0700 201 #define ATA_CONFIG_UDMA_SET 0x0800 202 #define ATA_CONFIG_UDMA_DISABLE 0x0700 203 #define ATA_CONFIG_UDMA_OFF 8 204 205 /* 206 * Parameters/state needed by the controller to perform an ATA bio. 207 */ 208 struct ata_bio { 209 volatile u_int16_t flags;/* cmd flags */ 210 #define ATA_NOSLEEP 0x0001 /* Can't sleep */ 211 #define ATA_POLL 0x0002 /* poll for completion */ 212 #define ATA_ITSDONE 0x0004 /* the transfer is as done as it gets */ 213 #define ATA_SINGLE 0x0008 /* transfer must be done in singlesector mode */ 214 #define ATA_LBA 0x0010 /* transfer uses LBA addressing */ 215 #define ATA_READ 0x0020 /* transfer is a read (otherwise a write) */ 216 #define ATA_CORR 0x0040 /* transfer had a corrected error */ 217 #define ATA_LBA48 0x0080 /* transfer uses 48-bit LBA addressing */ 218 int multi; /* # of blocks to transfer in multi-mode */ 219 struct disklabel *lp; /* pointer to drive's label info */ 220 daddr_t blkno; /* block addr */ 221 daddr_t blkdone;/* number of blks transferred */ 222 daddr_t nblks; /* number of block currently transferring */ 223 int nbytes; /* number of bytes currently transferring */ 224 long bcount; /* total number of bytes */ 225 char *databuf;/* data buffer address */ 226 volatile int error; 227 #define NOERROR 0 /* There was no error (r_error invalid) */ 228 #define ERROR 1 /* check r_error */ 229 #define ERR_DF 2 /* Drive fault */ 230 #define ERR_DMA 3 /* DMA error */ 231 #define TIMEOUT 4 /* device timed out */ 232 #define ERR_NODEV 5 /* device has been gone */ 233 #define ERR_RESET 6 /* command was terminated by channel reset */ 234 u_int8_t r_error;/* copy of error register */ 235 daddr_t badsect[127];/* 126 plus trailing -1 marker */ 236 }; 237 238 /* 239 * ATA/ATAPI commands description 240 * 241 * This structure defines the interface between the ATA/ATAPI device driver 242 * and the controller for short commands. It contains the command's parameter, 243 * the len of data's to read/write (if any), and a function to call upon 244 * completion. 245 * If no sleep is allowed, the driver can poll for command completion. 246 * Once the command completed, if the error registed is valid, the flag 247 * AT_ERROR is set and the error register value is copied to r_error . 248 * A separate interface is needed for read/write or ATAPI packet commands 249 * (which need multiple interrupts per commands). 250 */ 251 struct ata_command { 252 u_int8_t r_command; /* Parameters to upload to registers */ 253 u_int8_t r_head; 254 u_int16_t r_cyl; 255 u_int8_t r_sector; 256 u_int8_t r_count; 257 u_int8_t r_features; 258 u_int8_t r_st_bmask; /* status register mask to wait for before 259 command */ 260 u_int8_t r_st_pmask; /* status register mask to wait for after 261 command */ 262 u_int8_t r_error; /* error register after command done */ 263 volatile u_int16_t flags; 264 265 #define AT_READ 0x0001 /* There is data to read */ 266 #define AT_WRITE 0x0002 /* There is data to write (excl. with AT_READ) */ 267 #define AT_WAIT 0x0008 /* wait in controller code for command completion */ 268 #define AT_POLL 0x0010 /* poll for command completion (no interrupts) */ 269 #define AT_DONE 0x0020 /* command is done */ 270 #define AT_XFDONE 0x0040 /* data xfer is done */ 271 #define AT_ERROR 0x0080 /* command is done with error */ 272 #define AT_TIMEOU 0x0100 /* command timed out */ 273 #define AT_DF 0x0200 /* Drive fault */ 274 #define AT_RESET 0x0400 /* command terminated by channel reset */ 275 #define AT_GONE 0x0800 /* command terminated because device is gone */ 276 #define AT_READREG 0x1000 /* Read registers on completion */ 277 278 int timeout; /* timeout (in ms) */ 279 void *data; /* Data buffer address */ 280 int bcount; /* number of bytes to transfer */ 281 void (*callback)(void *); /* command to call once command completed */ 282 void *callback_arg; /* argument passed to *callback() */ 283 }; 284 285 /* 286 * ata_bustype. The first field must be compatible with scsipi_bustype, 287 * as it's used for autoconfig by both ata and atapi drivers. 288 */ 289 struct ata_bustype { 290 int bustype_type; /* symbolic name of type */ 291 int (*ata_bio)(struct ata_drive_datas *, struct ata_bio *); 292 void (*ata_reset_drive)(struct ata_drive_datas *, int); 293 void (*ata_reset_channel)(struct ata_channel *, int); 294 /* extra flags for ata_reset_*(), in addition to AT_* */ 295 #define AT_RST_EMERG 0x10000 /* emergency - e.g. for a dump */ 296 #define AT_RST_NOCMD 0x20000 /* XXX has to go - temporary until we have tagged queuing */ 297 298 int (*ata_exec_command)(struct ata_drive_datas *, 299 struct ata_command *); 300 301 #define ATACMD_COMPLETE 0x01 302 #define ATACMD_QUEUED 0x02 303 #define ATACMD_TRY_AGAIN 0x03 304 305 int (*ata_get_params)(struct ata_drive_datas *, u_int8_t, 306 struct ataparams *); 307 int (*ata_addref)(struct ata_drive_datas *); 308 void (*ata_delref)(struct ata_drive_datas *); 309 void (*ata_killpending)(struct ata_drive_datas *); 310 }; 311 312 /* bustype_type */ /* XXX XXX XXX */ 313 /* #define SCSIPI_BUSTYPE_SCSI 0 */ 314 /* #define SCSIPI_BUSTYPE_ATAPI 1 */ 315 #define SCSIPI_BUSTYPE_ATA 2 316 317 /* 318 * Describe an ATA device. Has to be compatible with scsipi_channel, so 319 * start with a pointer to ata_bustype. 320 */ 321 struct ata_device { 322 const struct ata_bustype *adev_bustype; 323 int adev_channel; 324 int adev_openings; 325 struct ata_drive_datas *adev_drv_data; 326 }; 327 328 /* 329 * Per-channel data 330 */ 331 struct ata_channel { 332 struct callout ch_callout; /* callout handle */ 333 int ch_channel; /* location */ 334 struct atac_softc *ch_atac; /* ATA controller softc */ 335 336 /* Our state */ 337 volatile int ch_flags; 338 #define ATACH_SHUTDOWN 0x02 /* channel is shutting down */ 339 #define ATACH_IRQ_WAIT 0x10 /* controller is waiting for irq */ 340 #define ATACH_DMA_WAIT 0x20 /* controller is waiting for DMA */ 341 #define ATACH_PIOBM_WAIT 0x40 /* controller is waiting for busmastering PIO */ 342 #define ATACH_DISABLED 0x80 /* channel is disabled */ 343 #define ATACH_TH_RUN 0x100 /* the kernel thread is working */ 344 #define ATACH_TH_RESET 0x200 /* someone ask the thread to reset */ 345 u_int8_t ch_status; /* copy of status register */ 346 u_int8_t ch_error; /* copy of error register */ 347 348 /* for the reset callback */ 349 int ch_reset_flags; 350 351 /* per-drive info */ 352 int ch_ndrive; 353 struct ata_drive_datas ch_drive[ATA_MAXDRIVES]; 354 355 struct device *atabus; /* self */ 356 357 /* ATAPI children */ 358 struct device *atapibus; 359 struct scsipi_channel ch_atapi_channel; 360 361 /* ATA children */ 362 struct device *ata_drives[ATA_MAXDRIVES]; 363 364 /* 365 * Channel queues. May be the same for all channels, if hw 366 * channels are not independent. 367 */ 368 struct ata_queue *ch_queue; 369 370 /* The channel kernel thread */ 371 struct lwp *ch_thread; 372 }; 373 374 /* 375 * ATA controller softc. 376 * 377 * This contains a bunch of generic info that all ATA controllers need 378 * to have. 379 * 380 * XXX There is still some lingering wdc-centricity here. 381 */ 382 struct atac_softc { 383 device_t atac_dev; /* generic device info */ 384 385 int atac_cap; /* controller capabilities */ 386 387 #define ATAC_CAP_DATA16 0x0001 /* can do 16-bit data access */ 388 #define ATAC_CAP_DATA32 0x0002 /* can do 32-bit data access */ 389 #define ATAC_CAP_DMA 0x0008 /* can do ATA DMA modes */ 390 #define ATAC_CAP_UDMA 0x0010 /* can do ATA Ultra DMA modes */ 391 #define ATAC_CAP_PIOBM 0x0020 /* can do busmastering PIO transfer */ 392 #define ATAC_CAP_ATA_NOSTREAM 0x0040 /* don't use stream funcs on ATA */ 393 #define ATAC_CAP_ATAPI_NOSTREAM 0x0080 /* don't use stream funcs on ATAPI */ 394 #define ATAC_CAP_NOIRQ 0x1000 /* controller never interrupts */ 395 #define ATAC_CAP_RAID 0x4000 /* controller "supports" RAID */ 396 397 uint8_t atac_pio_cap; /* highest PIO mode supported */ 398 #if NATA_DMA 399 uint8_t atac_dma_cap; /* highest DMA mode supported */ 400 #if NATA_UDMA 401 uint8_t atac_udma_cap; /* highest UDMA mode supported */ 402 #endif 403 #endif 404 405 /* Array of pointers to channel-specific data. */ 406 struct ata_channel **atac_channels; 407 int atac_nchannels; 408 409 const struct ata_bustype *atac_bustype_ata; 410 411 /* 412 * Glue between ATA and SCSIPI for the benefit of ATAPI. 413 * 414 * Note: The reference count here is used for both ATA and ATAPI 415 * devices. 416 */ 417 struct atapi_adapter atac_atapi_adapter; 418 void (*atac_atapibus_attach)(struct atabus_softc *); 419 420 /* Driver callback to probe for drives. */ 421 void (*atac_probe)(struct ata_channel *); 422 423 /* Optional callbacks to lock/unlock hardware. */ 424 int (*atac_claim_hw)(struct ata_channel *, int); 425 void (*atac_free_hw)(struct ata_channel *); 426 427 /* 428 * Optional callbacks to set drive mode. Required for anything 429 * but basic PIO operation. 430 */ 431 void (*atac_set_modes)(struct ata_channel *); 432 }; 433 434 #ifdef _KERNEL 435 void ata_channel_attach(struct ata_channel *); 436 int atabusprint(void *aux, const char *); 437 int ataprint(void *aux, const char *); 438 439 struct ataparams; 440 int ata_get_params(struct ata_drive_datas *, u_int8_t, struct ataparams *); 441 int ata_set_mode(struct ata_drive_datas *, u_int8_t, u_int8_t); 442 /* return code for these cmds */ 443 #define CMD_OK 0 444 #define CMD_ERR 1 445 #define CMD_AGAIN 2 446 447 struct ata_xfer *ata_get_xfer(int); 448 void ata_free_xfer(struct ata_channel *, struct ata_xfer *); 449 #define ATAXF_CANSLEEP 0x00 450 #define ATAXF_NOSLEEP 0x01 451 452 void ata_exec_xfer(struct ata_channel *, struct ata_xfer *); 453 void ata_kill_pending(struct ata_drive_datas *); 454 void ata_reset_channel(struct ata_channel *, int); 455 456 int ata_addref(struct ata_channel *); 457 void ata_delref(struct ata_channel *); 458 void atastart(struct ata_channel *); 459 void ata_print_modes(struct ata_channel *); 460 #if NATA_DMA 461 int ata_downgrade_mode(struct ata_drive_datas *, int); 462 #endif 463 void ata_probe_caps(struct ata_drive_datas *); 464 465 #if NATA_DMA 466 void ata_dmaerr(struct ata_drive_datas *, int); 467 #endif 468 void ata_queue_idle(struct ata_queue *); 469 #endif /* _KERNEL */ 470 471 #endif /* _DEV_ATA_ATAVAR_H_ */ 472
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