atavar.h revision 1.84
1 /* $NetBSD: atavar.h,v 1.84 2012/01/24 20:04:07 jakllsch Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef _DEV_ATA_ATAVAR_H_ 28 #define _DEV_ATA_ATAVAR_H_ 29 30 #include <sys/lock.h> 31 #include <sys/queue.h> 32 33 #include <dev/ata/ataconf.h> 34 35 /* XXX For scsipi_adapter and scsipi_channel. */ 36 #include <dev/scsipi/scsipi_all.h> 37 #include <dev/scsipi/atapiconf.h> 38 39 /* 40 * Max number of drives per channel. 41 */ 42 #define ATA_MAXDRIVES 2 43 44 /* 45 * Description of a command to be handled by an ATA controller. These 46 * commands are queued in a list. 47 */ 48 struct ata_xfer { 49 volatile u_int c_flags; /* command state flags */ 50 51 /* Channel and drive that are to process the request. */ 52 struct ata_channel *c_chp; 53 int c_drive; 54 55 void *c_cmd; /* private request structure pointer */ 56 void *c_databuf; /* pointer to data buffer */ 57 int c_bcount; /* byte count left */ 58 int c_skip; /* bytes already transferred */ 59 int c_dscpoll; /* counter for dsc polling (ATAPI) */ 60 int c_lenoff; /* offset to c_bcount (ATAPI) */ 61 62 /* Link on the command queue. */ 63 TAILQ_ENTRY(ata_xfer) c_xferchain; 64 65 /* Low-level protocol handlers. */ 66 void (*c_start)(struct ata_channel *, struct ata_xfer *); 67 int (*c_intr)(struct ata_channel *, struct ata_xfer *, int); 68 void (*c_kill_xfer)(struct ata_channel *, struct ata_xfer *, int); 69 }; 70 71 /* flags in c_flags */ 72 #define C_ATAPI 0x0001 /* xfer is ATAPI request */ 73 #define C_TIMEOU 0x0002 /* xfer processing timed out */ 74 #define C_POLL 0x0004 /* command is polled */ 75 #define C_DMA 0x0008 /* command uses DMA */ 76 #define C_WAIT 0x0010 /* can use tsleep */ 77 #define C_WAITACT 0x0020 /* wakeup when active */ 78 #define C_FREE 0x0040 /* call ata_free_xfer() asap */ 79 #define C_PIOBM 0x0080 /* command uses busmastering PIO */ 80 81 /* reasons for c_kill_xfer() */ 82 #define KILL_GONE 1 /* device is gone */ 83 #define KILL_RESET 2 /* xfer was reset */ 84 85 /* Per-channel queue of ata_xfers. May be shared by multiple channels. */ 86 struct ata_queue { 87 TAILQ_HEAD(, ata_xfer) queue_xfer; /* queue of pending commands */ 88 int queue_freeze; /* freeze count for the queue */ 89 struct ata_xfer *active_xfer; /* active command */ 90 int queue_flags; /* flags for this queue */ 91 #define QF_IDLE_WAIT 0x01 /* someone is wants the controller idle */ 92 }; 93 94 /* ATA bus instance state information. */ 95 struct atabus_softc { 96 device_t sc_dev; 97 struct ata_channel *sc_chan; 98 int sc_flags; 99 #define ATABUSCF_OPEN 0x01 100 }; 101 102 /* 103 * A queue of atabus instances, used to ensure the same bus probe order 104 * for a given hardware configuration at each boot. 105 */ 106 struct atabus_initq { 107 TAILQ_ENTRY(atabus_initq) atabus_initq; 108 struct atabus_softc *atabus_sc; 109 }; 110 111 /* High-level functions and structures used by both ATA and ATAPI devices */ 112 struct ataparams; 113 114 /* Datas common to drives and controller drivers */ 115 struct ata_drive_datas { 116 u_int8_t drive; /* drive number */ 117 int8_t ata_vers; /* ATA version supported */ 118 u_int16_t drive_flags; /* bitmask for drives present/absent and cap */ 119 120 #define DRIVE_ATA 0x0001 121 #define DRIVE_ATAPI 0x0002 122 #define DRIVE_OLD 0x0004 123 #define DRIVE (DRIVE_ATA|DRIVE_ATAPI|DRIVE_OLD) 124 #define DRIVE_CAP32 0x0008 125 #define DRIVE_DMA 0x0010 126 #define DRIVE_UDMA 0x0020 127 #define DRIVE_MODE 0x0040 /* the drive reported its mode */ 128 #define DRIVE_RESET 0x0080 /* reset the drive state at next xfer */ 129 #define DRIVE_WAITDRAIN 0x0100 /* device is waiting for the queue to drain */ 130 #define DRIVE_ATAPIST 0x0200 /* device is an ATAPI tape drive */ 131 #define DRIVE_NOSTREAM 0x0400 /* no stream methods on this drive */ 132 133 /* 134 * Current setting of drive's PIO, DMA and UDMA modes. 135 * Is initialised by the disks drivers at attach time, and may be 136 * changed later by the controller's code if needed 137 */ 138 u_int8_t PIO_mode; /* Current setting of drive's PIO mode */ 139 #if NATA_DMA 140 u_int8_t DMA_mode; /* Current setting of drive's DMA mode */ 141 #if NATA_UDMA 142 u_int8_t UDMA_mode; /* Current setting of drive's UDMA mode */ 143 #endif 144 #endif 145 146 /* Supported modes for this drive */ 147 u_int8_t PIO_cap; /* supported drive's PIO mode */ 148 #if NATA_DMA 149 u_int8_t DMA_cap; /* supported drive's DMA mode */ 150 #if NATA_UDMA 151 u_int8_t UDMA_cap; /* supported drive's UDMA mode */ 152 #endif 153 #endif 154 155 /* 156 * Drive state. 157 * This is reset to 0 after a channel reset. 158 */ 159 u_int8_t state; 160 161 #define RESET 0 162 #define READY 1 163 164 #if NATA_DMA 165 /* numbers of xfers and DMA errs. Used by ata_dmaerr() */ 166 u_int8_t n_dmaerrs; 167 u_int32_t n_xfers; 168 169 /* Downgrade after NERRS_MAX errors in at most NXFER xfers */ 170 #define NERRS_MAX 4 171 #define NXFER 4000 172 #endif 173 174 /* Callbacks into the drive's driver. */ 175 void (*drv_done)(void *); /* transfer is done */ 176 177 device_t drv_softc; /* ATA drives softc, if any */ 178 void *chnl_softc; /* channel softc */ 179 }; 180 181 /* User config flags that force (or disable) the use of a mode */ 182 #define ATA_CONFIG_PIO_MODES 0x0007 183 #define ATA_CONFIG_PIO_SET 0x0008 184 #define ATA_CONFIG_PIO_OFF 0 185 #define ATA_CONFIG_DMA_MODES 0x0070 186 #define ATA_CONFIG_DMA_SET 0x0080 187 #define ATA_CONFIG_DMA_DISABLE 0x0070 188 #define ATA_CONFIG_DMA_OFF 4 189 #define ATA_CONFIG_UDMA_MODES 0x0700 190 #define ATA_CONFIG_UDMA_SET 0x0800 191 #define ATA_CONFIG_UDMA_DISABLE 0x0700 192 #define ATA_CONFIG_UDMA_OFF 8 193 194 /* 195 * Parameters/state needed by the controller to perform an ATA bio. 196 */ 197 struct ata_bio { 198 volatile u_int16_t flags;/* cmd flags */ 199 #define ATA_NOSLEEP 0x0001 /* Can't sleep */ 200 #define ATA_POLL 0x0002 /* poll for completion */ 201 #define ATA_ITSDONE 0x0004 /* the transfer is as done as it gets */ 202 #define ATA_SINGLE 0x0008 /* transfer must be done in singlesector mode */ 203 #define ATA_LBA 0x0010 /* transfer uses LBA addressing */ 204 #define ATA_READ 0x0020 /* transfer is a read (otherwise a write) */ 205 #define ATA_CORR 0x0040 /* transfer had a corrected error */ 206 #define ATA_LBA48 0x0080 /* transfer uses 48-bit LBA addressing */ 207 int multi; /* # of blocks to transfer in multi-mode */ 208 struct disklabel *lp; /* pointer to drive's label info */ 209 daddr_t blkno; /* block addr */ 210 daddr_t blkdone;/* number of blks transferred */ 211 daddr_t nblks; /* number of block currently transferring */ 212 int nbytes; /* number of bytes currently transferring */ 213 long bcount; /* total number of bytes */ 214 char *databuf;/* data buffer address */ 215 volatile int error; 216 #define NOERROR 0 /* There was no error (r_error invalid) */ 217 #define ERROR 1 /* check r_error */ 218 #define ERR_DF 2 /* Drive fault */ 219 #define ERR_DMA 3 /* DMA error */ 220 #define TIMEOUT 4 /* device timed out */ 221 #define ERR_NODEV 5 /* device has been gone */ 222 #define ERR_RESET 6 /* command was terminated by channel reset */ 223 u_int8_t r_error;/* copy of error register */ 224 daddr_t badsect[127];/* 126 plus trailing -1 marker */ 225 }; 226 227 /* 228 * ATA/ATAPI commands description 229 * 230 * This structure defines the interface between the ATA/ATAPI device driver 231 * and the controller for short commands. It contains the command's parameter, 232 * the length of data to read/write (if any), and a function to call upon 233 * completion. 234 * If no sleep is allowed, the driver can poll for command completion. 235 * Once the command completed, if the error registered is valid, the flag 236 * AT_ERROR is set and the error register value is copied to r_error . 237 * A separate interface is needed for read/write or ATAPI packet commands 238 * (which need multiple interrupts per commands). 239 */ 240 struct ata_command { 241 /* ATA parameters */ 242 uint64_t r_lba; /* before & after */ 243 uint16_t r_count; /* before & after */ 244 union { 245 uint16_t r_features; /* before */ 246 uint8_t r_error; /* after */ 247 }; 248 union { 249 uint8_t r_command; /* before */ 250 uint8_t r_status; /* after */ 251 }; 252 uint8_t r_device; /* before & after */ 253 254 uint8_t r_st_bmask; /* status register mask to wait for before 255 command */ 256 uint8_t r_st_pmask; /* status register mask to wait for after 257 command */ 258 volatile uint16_t flags; 259 260 #define AT_READ 0x0001 /* There is data to read */ 261 #define AT_WRITE 0x0002 /* There is data to write (excl. with AT_READ) */ 262 #define AT_WAIT 0x0008 /* wait in controller code for command completion */ 263 #define AT_POLL 0x0010 /* poll for command completion (no interrupts) */ 264 #define AT_DONE 0x0020 /* command is done */ 265 #define AT_XFDONE 0x0040 /* data xfer is done */ 266 #define AT_ERROR 0x0080 /* command is done with error */ 267 #define AT_TIMEOU 0x0100 /* command timed out */ 268 #define AT_DF 0x0200 /* Drive fault */ 269 #define AT_RESET 0x0400 /* command terminated by channel reset */ 270 #define AT_GONE 0x0800 /* command terminated because device is gone */ 271 #define AT_READREG 0x1000 /* Read registers on completion */ 272 #define AT_LBA 0x2000 /* LBA28 */ 273 #define AT_LBA48 0x4000 /* LBA48 */ 274 275 int timeout; /* timeout (in ms) */ 276 void *data; /* Data buffer address */ 277 int bcount; /* number of bytes to transfer */ 278 void (*callback)(void *); /* command to call once command completed */ 279 void *callback_arg; /* argument passed to *callback() */ 280 }; 281 282 /* 283 * ata_bustype. The first field must be compatible with scsipi_bustype, 284 * as it's used for autoconfig by both ata and atapi drivers. 285 */ 286 struct ata_bustype { 287 int bustype_type; /* symbolic name of type */ 288 int (*ata_bio)(struct ata_drive_datas *, struct ata_bio *); 289 void (*ata_reset_drive)(struct ata_drive_datas *, int); 290 void (*ata_reset_channel)(struct ata_channel *, int); 291 /* extra flags for ata_reset_*(), in addition to AT_* */ 292 #define AT_RST_EMERG 0x10000 /* emergency - e.g. for a dump */ 293 #define AT_RST_NOCMD 0x20000 /* XXX has to go - temporary until we have tagged queuing */ 294 295 int (*ata_exec_command)(struct ata_drive_datas *, 296 struct ata_command *); 297 298 #define ATACMD_COMPLETE 0x01 299 #define ATACMD_QUEUED 0x02 300 #define ATACMD_TRY_AGAIN 0x03 301 302 int (*ata_get_params)(struct ata_drive_datas *, u_int8_t, 303 struct ataparams *); 304 int (*ata_addref)(struct ata_drive_datas *); 305 void (*ata_delref)(struct ata_drive_datas *); 306 void (*ata_killpending)(struct ata_drive_datas *); 307 }; 308 309 /* bustype_type */ /* XXX XXX XXX */ 310 /* #define SCSIPI_BUSTYPE_SCSI 0 */ 311 /* #define SCSIPI_BUSTYPE_ATAPI 1 */ 312 #define SCSIPI_BUSTYPE_ATA 2 313 314 /* 315 * Describe an ATA device. Has to be compatible with scsipi_channel, so 316 * start with a pointer to ata_bustype. 317 */ 318 struct ata_device { 319 const struct ata_bustype *adev_bustype; 320 int adev_channel; 321 int adev_openings; 322 struct ata_drive_datas *adev_drv_data; 323 }; 324 325 /* 326 * Per-channel data 327 */ 328 struct ata_channel { 329 struct callout ch_callout; /* callout handle */ 330 int ch_channel; /* location */ 331 struct atac_softc *ch_atac; /* ATA controller softc */ 332 333 /* Our state */ 334 volatile int ch_flags; 335 #define ATACH_SHUTDOWN 0x02 /* channel is shutting down */ 336 #define ATACH_IRQ_WAIT 0x10 /* controller is waiting for irq */ 337 #define ATACH_DMA_WAIT 0x20 /* controller is waiting for DMA */ 338 #define ATACH_PIOBM_WAIT 0x40 /* controller is waiting for busmastering PIO */ 339 #define ATACH_DISABLED 0x80 /* channel is disabled */ 340 #define ATACH_TH_RUN 0x100 /* the kernel thread is working */ 341 #define ATACH_TH_RESET 0x200 /* someone ask the thread to reset */ 342 #define ATACH_TH_RESCAN 0x400 /* rescan requested */ 343 u_int8_t ch_status; /* copy of status register */ 344 u_int8_t ch_error; /* copy of error register */ 345 346 /* for the reset callback */ 347 int ch_reset_flags; 348 349 /* per-drive info */ 350 int ch_ndrive; 351 struct ata_drive_datas ch_drive[ATA_MAXDRIVES]; 352 353 device_t atabus; /* self */ 354 355 /* ATAPI children */ 356 device_t atapibus; 357 struct scsipi_channel ch_atapi_channel; 358 359 /* ATA children */ 360 device_t ata_drives[ATA_MAXDRIVES]; 361 362 /* 363 * Channel queues. May be the same for all channels, if hw 364 * channels are not independent. 365 */ 366 struct ata_queue *ch_queue; 367 368 /* The channel kernel thread */ 369 struct lwp *ch_thread; 370 }; 371 372 /* 373 * ATA controller softc. 374 * 375 * This contains a bunch of generic info that all ATA controllers need 376 * to have. 377 * 378 * XXX There is still some lingering wdc-centricity here. 379 */ 380 struct atac_softc { 381 device_t atac_dev; /* generic device info */ 382 383 int atac_cap; /* controller capabilities */ 384 385 #define ATAC_CAP_DATA16 0x0001 /* can do 16-bit data access */ 386 #define ATAC_CAP_DATA32 0x0002 /* can do 32-bit data access */ 387 #define ATAC_CAP_DMA 0x0008 /* can do ATA DMA modes */ 388 #define ATAC_CAP_UDMA 0x0010 /* can do ATA Ultra DMA modes */ 389 #define ATAC_CAP_PIOBM 0x0020 /* can do busmastering PIO transfer */ 390 #define ATAC_CAP_ATA_NOSTREAM 0x0040 /* don't use stream funcs on ATA */ 391 #define ATAC_CAP_ATAPI_NOSTREAM 0x0080 /* don't use stream funcs on ATAPI */ 392 #define ATAC_CAP_NOIRQ 0x1000 /* controller never interrupts */ 393 #define ATAC_CAP_RAID 0x4000 /* controller "supports" RAID */ 394 395 uint8_t atac_pio_cap; /* highest PIO mode supported */ 396 #if NATA_DMA 397 uint8_t atac_dma_cap; /* highest DMA mode supported */ 398 #if NATA_UDMA 399 uint8_t atac_udma_cap; /* highest UDMA mode supported */ 400 #endif 401 #endif 402 403 /* Array of pointers to channel-specific data. */ 404 struct ata_channel **atac_channels; 405 int atac_nchannels; 406 407 const struct ata_bustype *atac_bustype_ata; 408 409 /* 410 * Glue between ATA and SCSIPI for the benefit of ATAPI. 411 * 412 * Note: The reference count here is used for both ATA and ATAPI 413 * devices. 414 */ 415 struct atapi_adapter atac_atapi_adapter; 416 void (*atac_atapibus_attach)(struct atabus_softc *); 417 418 /* Driver callback to probe for drives. */ 419 void (*atac_probe)(struct ata_channel *); 420 421 /* Optional callbacks to lock/unlock hardware. */ 422 int (*atac_claim_hw)(struct ata_channel *, int); 423 void (*atac_free_hw)(struct ata_channel *); 424 425 /* 426 * Optional callbacks to set drive mode. Required for anything 427 * but basic PIO operation. 428 */ 429 void (*atac_set_modes)(struct ata_channel *); 430 }; 431 432 #ifdef _KERNEL 433 void ata_channel_attach(struct ata_channel *); 434 int atabusprint(void *aux, const char *); 435 int ataprint(void *aux, const char *); 436 437 struct ataparams; 438 int ata_get_params(struct ata_drive_datas *, u_int8_t, struct ataparams *); 439 int ata_set_mode(struct ata_drive_datas *, u_int8_t, u_int8_t); 440 /* return code for these cmds */ 441 #define CMD_OK 0 442 #define CMD_ERR 1 443 #define CMD_AGAIN 2 444 445 struct ata_xfer *ata_get_xfer(int); 446 void ata_free_xfer(struct ata_channel *, struct ata_xfer *); 447 #define ATAXF_CANSLEEP 0x00 448 #define ATAXF_NOSLEEP 0x01 449 450 void ata_exec_xfer(struct ata_channel *, struct ata_xfer *); 451 void ata_kill_pending(struct ata_drive_datas *); 452 void ata_reset_channel(struct ata_channel *, int); 453 454 int ata_addref(struct ata_channel *); 455 void ata_delref(struct ata_channel *); 456 void atastart(struct ata_channel *); 457 void ata_print_modes(struct ata_channel *); 458 #if NATA_DMA 459 int ata_downgrade_mode(struct ata_drive_datas *, int); 460 #endif 461 void ata_probe_caps(struct ata_drive_datas *); 462 463 #if NATA_DMA 464 void ata_dmaerr(struct ata_drive_datas *, int); 465 #endif 466 void ata_queue_idle(struct ata_queue *); 467 #endif /* _KERNEL */ 468 469 #endif /* _DEV_ATA_ATAVAR_H_ */ 470
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