atavar.h revision 1.90
1 /* $NetBSD: atavar.h,v 1.90 2012/07/31 15:50:34 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef _DEV_ATA_ATAVAR_H_ 28 #define _DEV_ATA_ATAVAR_H_ 29 30 #include <sys/lock.h> 31 #include <sys/queue.h> 32 33 #include <dev/ata/ataconf.h> 34 35 /* XXX For scsipi_adapter and scsipi_channel. */ 36 #include <dev/scsipi/scsipi_all.h> 37 #include <dev/scsipi/atapiconf.h> 38 39 /* 40 * Description of a command to be handled by an ATA controller. These 41 * commands are queued in a list. 42 */ 43 struct ata_xfer { 44 volatile u_int c_flags; /* command state flags */ 45 46 /* Channel and drive that are to process the request. */ 47 struct ata_channel *c_chp; 48 int c_drive; 49 50 void *c_cmd; /* private request structure pointer */ 51 void *c_databuf; /* pointer to data buffer */ 52 int c_bcount; /* byte count left */ 53 int c_skip; /* bytes already transferred */ 54 int c_dscpoll; /* counter for dsc polling (ATAPI) */ 55 int c_lenoff; /* offset to c_bcount (ATAPI) */ 56 57 /* Link on the command queue. */ 58 TAILQ_ENTRY(ata_xfer) c_xferchain; 59 60 /* Low-level protocol handlers. */ 61 void (*c_start)(struct ata_channel *, struct ata_xfer *); 62 int (*c_intr)(struct ata_channel *, struct ata_xfer *, int); 63 void (*c_kill_xfer)(struct ata_channel *, struct ata_xfer *, int); 64 }; 65 66 /* flags in c_flags */ 67 #define C_ATAPI 0x0001 /* xfer is ATAPI request */ 68 #define C_TIMEOU 0x0002 /* xfer processing timed out */ 69 #define C_POLL 0x0004 /* command is polled */ 70 #define C_DMA 0x0008 /* command uses DMA */ 71 #define C_WAIT 0x0010 /* can use tsleep */ 72 #define C_WAITACT 0x0020 /* wakeup when active */ 73 #define C_FREE 0x0040 /* call ata_free_xfer() asap */ 74 #define C_PIOBM 0x0080 /* command uses busmastering PIO */ 75 76 /* reasons for c_kill_xfer() */ 77 #define KILL_GONE 1 /* device is gone */ 78 #define KILL_RESET 2 /* xfer was reset */ 79 80 /* Per-channel queue of ata_xfers. May be shared by multiple channels. */ 81 struct ata_queue { 82 TAILQ_HEAD(, ata_xfer) queue_xfer; /* queue of pending commands */ 83 int queue_freeze; /* freeze count for the queue */ 84 struct ata_xfer *active_xfer; /* active command */ 85 int queue_flags; /* flags for this queue */ 86 #define QF_IDLE_WAIT 0x01 /* someone is wants the controller idle */ 87 }; 88 89 /* ATA bus instance state information. */ 90 struct atabus_softc { 91 device_t sc_dev; 92 struct ata_channel *sc_chan; 93 int sc_flags; 94 #define ATABUSCF_OPEN 0x01 95 }; 96 97 /* 98 * A queue of atabus instances, used to ensure the same bus probe order 99 * for a given hardware configuration at each boot. 100 */ 101 struct atabus_initq { 102 TAILQ_ENTRY(atabus_initq) atabus_initq; 103 struct atabus_softc *atabus_sc; 104 }; 105 106 /* High-level functions and structures used by both ATA and ATAPI devices */ 107 struct ataparams; 108 109 /* Datas common to drives and controller drivers */ 110 struct ata_drive_datas { 111 u_int8_t drive; /* drive number */ 112 int8_t ata_vers; /* ATA version supported */ 113 u_int16_t drive_flags; /* bitmask for drives present/absent and cap */ 114 #define ATA_DRIVE_CAP32 0x0001 115 #define ATA_DRIVE_DMA 0x0002 116 #define ATA_DRIVE_UDMA 0x0004 117 #define ATA_DRIVE_MODE 0x0008 /* the drive reported its mode */ 118 #define ATA_DRIVE_RESET 0x0010 /* reset the drive state at next xfer */ 119 #define ATA_DRIVE_WAITDRAIN 0x0020 /* device is waiting for the queue to drain */ 120 #define ATA_DRIVE_NOSTREAM 0x0040 /* no stream methods on this drive */ 121 #define ATA_DRIVE_ATAPIDSCW 0x0080 /* needs to wait for DSC in phase_complete */ 122 123 uint8_t drive_type; 124 #define ATA_DRIVET_NONE 0 125 #define ATA_DRIVET_ATA 1 126 #define ATA_DRIVET_ATAPI 2 127 #define ATA_DRIVET_OLD 3 128 #define ATA_DRIVET_PM 4 129 130 /* 131 * Current setting of drive's PIO, DMA and UDMA modes. 132 * Is initialised by the disks drivers at attach time, and may be 133 * changed later by the controller's code if needed 134 */ 135 u_int8_t PIO_mode; /* Current setting of drive's PIO mode */ 136 #if NATA_DMA 137 u_int8_t DMA_mode; /* Current setting of drive's DMA mode */ 138 #if NATA_UDMA 139 u_int8_t UDMA_mode; /* Current setting of drive's UDMA mode */ 140 #endif 141 #endif 142 143 /* Supported modes for this drive */ 144 u_int8_t PIO_cap; /* supported drive's PIO mode */ 145 #if NATA_DMA 146 u_int8_t DMA_cap; /* supported drive's DMA mode */ 147 #if NATA_UDMA 148 u_int8_t UDMA_cap; /* supported drive's UDMA mode */ 149 #endif 150 #endif 151 152 /* 153 * Drive state. 154 * This is reset to 0 after a channel reset. 155 */ 156 u_int8_t state; 157 158 #define RESET 0 159 #define READY 1 160 161 #if NATA_DMA 162 /* numbers of xfers and DMA errs. Used by ata_dmaerr() */ 163 u_int8_t n_dmaerrs; 164 u_int32_t n_xfers; 165 166 /* Downgrade after NERRS_MAX errors in at most NXFER xfers */ 167 #define NERRS_MAX 4 168 #define NXFER 4000 169 #endif 170 171 /* Callbacks into the drive's driver. */ 172 void (*drv_done)(void *); /* transfer is done */ 173 174 device_t drv_softc; /* ATA drives softc, if any */ 175 void *chnl_softc; /* channel softc */ 176 }; 177 178 /* User config flags that force (or disable) the use of a mode */ 179 #define ATA_CONFIG_PIO_MODES 0x0007 180 #define ATA_CONFIG_PIO_SET 0x0008 181 #define ATA_CONFIG_PIO_OFF 0 182 #define ATA_CONFIG_DMA_MODES 0x0070 183 #define ATA_CONFIG_DMA_SET 0x0080 184 #define ATA_CONFIG_DMA_DISABLE 0x0070 185 #define ATA_CONFIG_DMA_OFF 4 186 #define ATA_CONFIG_UDMA_MODES 0x0700 187 #define ATA_CONFIG_UDMA_SET 0x0800 188 #define ATA_CONFIG_UDMA_DISABLE 0x0700 189 #define ATA_CONFIG_UDMA_OFF 8 190 191 /* 192 * Parameters/state needed by the controller to perform an ATA bio. 193 */ 194 struct ata_bio { 195 volatile u_int16_t flags;/* cmd flags */ 196 #define ATA_NOSLEEP 0x0001 /* Can't sleep */ 197 #define ATA_POLL 0x0002 /* poll for completion */ 198 #define ATA_ITSDONE 0x0004 /* the transfer is as done as it gets */ 199 #define ATA_SINGLE 0x0008 /* transfer must be done in singlesector mode */ 200 #define ATA_LBA 0x0010 /* transfer uses LBA addressing */ 201 #define ATA_READ 0x0020 /* transfer is a read (otherwise a write) */ 202 #define ATA_CORR 0x0040 /* transfer had a corrected error */ 203 #define ATA_LBA48 0x0080 /* transfer uses 48-bit LBA addressing */ 204 int multi; /* # of blocks to transfer in multi-mode */ 205 struct disklabel *lp; /* pointer to drive's label info */ 206 daddr_t blkno; /* block addr */ 207 daddr_t blkdone;/* number of blks transferred */ 208 daddr_t nblks; /* number of block currently transferring */ 209 int nbytes; /* number of bytes currently transferring */ 210 long bcount; /* total number of bytes */ 211 char *databuf;/* data buffer address */ 212 volatile int error; 213 #define NOERROR 0 /* There was no error (r_error invalid) */ 214 #define ERROR 1 /* check r_error */ 215 #define ERR_DF 2 /* Drive fault */ 216 #define ERR_DMA 3 /* DMA error */ 217 #define TIMEOUT 4 /* device timed out */ 218 #define ERR_NODEV 5 /* device has been gone */ 219 #define ERR_RESET 6 /* command was terminated by channel reset */ 220 u_int8_t r_error;/* copy of error register */ 221 daddr_t badsect[127];/* 126 plus trailing -1 marker */ 222 }; 223 224 /* 225 * ATA/ATAPI commands description 226 * 227 * This structure defines the interface between the ATA/ATAPI device driver 228 * and the controller for short commands. It contains the command's parameter, 229 * the length of data to read/write (if any), and a function to call upon 230 * completion. 231 * If no sleep is allowed, the driver can poll for command completion. 232 * Once the command completed, if the error registered is valid, the flag 233 * AT_ERROR is set and the error register value is copied to r_error . 234 * A separate interface is needed for read/write or ATAPI packet commands 235 * (which need multiple interrupts per commands). 236 */ 237 struct ata_command { 238 /* ATA parameters */ 239 uint64_t r_lba; /* before & after */ 240 uint16_t r_count; /* before & after */ 241 union { 242 uint16_t r_features; /* before */ 243 uint8_t r_error; /* after */ 244 }; 245 union { 246 uint8_t r_command; /* before */ 247 uint8_t r_status; /* after */ 248 }; 249 uint8_t r_device; /* before & after */ 250 251 uint8_t r_st_bmask; /* status register mask to wait for before 252 command */ 253 uint8_t r_st_pmask; /* status register mask to wait for after 254 command */ 255 volatile uint16_t flags; 256 257 #define AT_READ 0x0001 /* There is data to read */ 258 #define AT_WRITE 0x0002 /* There is data to write (excl. with AT_READ) */ 259 #define AT_WAIT 0x0008 /* wait in controller code for command completion */ 260 #define AT_POLL 0x0010 /* poll for command completion (no interrupts) */ 261 #define AT_DONE 0x0020 /* command is done */ 262 #define AT_XFDONE 0x0040 /* data xfer is done */ 263 #define AT_ERROR 0x0080 /* command is done with error */ 264 #define AT_TIMEOU 0x0100 /* command timed out */ 265 #define AT_DF 0x0200 /* Drive fault */ 266 #define AT_RESET 0x0400 /* command terminated by channel reset */ 267 #define AT_GONE 0x0800 /* command terminated because device is gone */ 268 #define AT_READREG 0x1000 /* Read registers on completion */ 269 #define AT_LBA 0x2000 /* LBA28 */ 270 #define AT_LBA48 0x4000 /* LBA48 */ 271 272 int timeout; /* timeout (in ms) */ 273 void *data; /* Data buffer address */ 274 int bcount; /* number of bytes to transfer */ 275 void (*callback)(void *); /* command to call once command completed */ 276 void *callback_arg; /* argument passed to *callback() */ 277 }; 278 279 /* 280 * ata_bustype. The first field must be compatible with scsipi_bustype, 281 * as it's used for autoconfig by both ata and atapi drivers. 282 */ 283 struct ata_bustype { 284 int bustype_type; /* symbolic name of type */ 285 int (*ata_bio)(struct ata_drive_datas *, struct ata_bio *); 286 void (*ata_reset_drive)(struct ata_drive_datas *, int, uint32_t *); 287 void (*ata_reset_channel)(struct ata_channel *, int); 288 /* extra flags for ata_reset_*(), in addition to AT_* */ 289 #define AT_RST_EMERG 0x10000 /* emergency - e.g. for a dump */ 290 #define AT_RST_NOCMD 0x20000 /* XXX has to go - temporary until we have tagged queuing */ 291 292 int (*ata_exec_command)(struct ata_drive_datas *, 293 struct ata_command *); 294 295 #define ATACMD_COMPLETE 0x01 296 #define ATACMD_QUEUED 0x02 297 #define ATACMD_TRY_AGAIN 0x03 298 299 int (*ata_get_params)(struct ata_drive_datas *, u_int8_t, 300 struct ataparams *); 301 int (*ata_addref)(struct ata_drive_datas *); 302 void (*ata_delref)(struct ata_drive_datas *); 303 void (*ata_killpending)(struct ata_drive_datas *); 304 }; 305 306 /* bustype_type */ /* XXX XXX XXX */ 307 /* #define SCSIPI_BUSTYPE_SCSI 0 */ 308 /* #define SCSIPI_BUSTYPE_ATAPI 1 */ 309 #define SCSIPI_BUSTYPE_ATA 2 310 311 /* 312 * Describe an ATA device. Has to be compatible with scsipi_channel, so 313 * start with a pointer to ata_bustype. 314 */ 315 struct ata_device { 316 const struct ata_bustype *adev_bustype; 317 int adev_channel; 318 int adev_openings; 319 struct ata_drive_datas *adev_drv_data; 320 }; 321 322 /* 323 * Per-channel data 324 */ 325 struct ata_channel { 326 struct callout ch_callout; /* callout handle */ 327 int ch_channel; /* location */ 328 struct atac_softc *ch_atac; /* ATA controller softc */ 329 330 /* Our state */ 331 volatile int ch_flags; 332 #define ATACH_SHUTDOWN 0x02 /* channel is shutting down */ 333 #define ATACH_IRQ_WAIT 0x10 /* controller is waiting for irq */ 334 #define ATACH_DMA_WAIT 0x20 /* controller is waiting for DMA */ 335 #define ATACH_PIOBM_WAIT 0x40 /* controller is waiting for busmastering PIO */ 336 #define ATACH_DISABLED 0x80 /* channel is disabled */ 337 #define ATACH_TH_RUN 0x100 /* the kernel thread is working */ 338 #define ATACH_TH_RESET 0x200 /* someone ask the thread to reset */ 339 #define ATACH_TH_RESCAN 0x400 /* rescan requested */ 340 u_int8_t ch_status; /* copy of status register */ 341 u_int8_t ch_error; /* copy of error register */ 342 343 /* for the reset callback */ 344 int ch_reset_flags; 345 346 /* per-drive info */ 347 int ch_ndrives; /* number of entries in ch_drive[] */ 348 struct ata_drive_datas *ch_drive; /* array of ata_drive_datas */ 349 350 device_t atabus; /* self */ 351 352 /* ATAPI children */ 353 device_t atapibus; 354 struct scsipi_channel ch_atapi_channel; 355 356 /* 357 * Channel queues. May be the same for all channels, if hw 358 * channels are not independent. 359 */ 360 struct ata_queue *ch_queue; 361 362 /* The channel kernel thread */ 363 struct lwp *ch_thread; 364 365 /* Number of sata PMP ports, if any */ 366 int ch_satapmp_nports; 367 }; 368 369 /* 370 * ATA controller softc. 371 * 372 * This contains a bunch of generic info that all ATA controllers need 373 * to have. 374 * 375 * XXX There is still some lingering wdc-centricity here. 376 */ 377 struct atac_softc { 378 device_t atac_dev; /* generic device info */ 379 380 int atac_cap; /* controller capabilities */ 381 382 #define ATAC_CAP_DATA16 0x0001 /* can do 16-bit data access */ 383 #define ATAC_CAP_DATA32 0x0002 /* can do 32-bit data access */ 384 #define ATAC_CAP_DMA 0x0008 /* can do ATA DMA modes */ 385 #define ATAC_CAP_UDMA 0x0010 /* can do ATA Ultra DMA modes */ 386 #define ATAC_CAP_PIOBM 0x0020 /* can do busmastering PIO transfer */ 387 #define ATAC_CAP_ATA_NOSTREAM 0x0040 /* don't use stream funcs on ATA */ 388 #define ATAC_CAP_ATAPI_NOSTREAM 0x0080 /* don't use stream funcs on ATAPI */ 389 #define ATAC_CAP_NOIRQ 0x1000 /* controller never interrupts */ 390 #define ATAC_CAP_RAID 0x4000 /* controller "supports" RAID */ 391 392 uint8_t atac_pio_cap; /* highest PIO mode supported */ 393 #if NATA_DMA 394 uint8_t atac_dma_cap; /* highest DMA mode supported */ 395 #if NATA_UDMA 396 uint8_t atac_udma_cap; /* highest UDMA mode supported */ 397 #endif 398 #endif 399 400 /* Array of pointers to channel-specific data. */ 401 struct ata_channel **atac_channels; 402 int atac_nchannels; 403 404 const struct ata_bustype *atac_bustype_ata; 405 406 /* 407 * Glue between ATA and SCSIPI for the benefit of ATAPI. 408 * 409 * Note: The reference count here is used for both ATA and ATAPI 410 * devices. 411 */ 412 struct atapi_adapter atac_atapi_adapter; 413 void (*atac_atapibus_attach)(struct atabus_softc *); 414 415 /* Driver callback to probe for drives. */ 416 void (*atac_probe)(struct ata_channel *); 417 418 /* Optional callbacks to lock/unlock hardware. */ 419 int (*atac_claim_hw)(struct ata_channel *, int); 420 void (*atac_free_hw)(struct ata_channel *); 421 422 /* 423 * Optional callbacks to set drive mode. Required for anything 424 * but basic PIO operation. 425 */ 426 void (*atac_set_modes)(struct ata_channel *); 427 }; 428 429 #ifdef _KERNEL 430 void ata_channel_attach(struct ata_channel *); 431 int atabusprint(void *aux, const char *); 432 int ataprint(void *aux, const char *); 433 434 int atabus_alloc_drives(struct ata_channel *, int); 435 void atabus_free_drives(struct ata_channel *); 436 437 struct ataparams; 438 int ata_get_params(struct ata_drive_datas *, u_int8_t, struct ataparams *); 439 int ata_set_mode(struct ata_drive_datas *, u_int8_t, u_int8_t); 440 /* return code for these cmds */ 441 #define CMD_OK 0 442 #define CMD_ERR 1 443 #define CMD_AGAIN 2 444 445 struct ata_xfer *ata_get_xfer(int); 446 void ata_free_xfer(struct ata_channel *, struct ata_xfer *); 447 #define ATAXF_CANSLEEP 0x00 448 #define ATAXF_NOSLEEP 0x01 449 450 void ata_exec_xfer(struct ata_channel *, struct ata_xfer *); 451 void ata_kill_pending(struct ata_drive_datas *); 452 void ata_reset_channel(struct ata_channel *, int); 453 454 int ata_addref(struct ata_channel *); 455 void ata_delref(struct ata_channel *); 456 void atastart(struct ata_channel *); 457 void ata_print_modes(struct ata_channel *); 458 #if NATA_DMA 459 int ata_downgrade_mode(struct ata_drive_datas *, int); 460 #endif 461 void ata_probe_caps(struct ata_drive_datas *); 462 463 #if NATA_DMA 464 void ata_dmaerr(struct ata_drive_datas *, int); 465 #endif 466 void ata_queue_idle(struct ata_queue *); 467 #endif /* _KERNEL */ 468 469 #endif /* _DEV_ATA_ATAVAR_H_ */ 470
Indexes created Tue Sep 30 17:09:57 GMT 2025