atavar.h revision 1.98
1 /* $NetBSD: atavar.h,v 1.98 2018/08/06 20:07:05 jdolecek Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #ifndef _DEV_ATA_ATAVAR_H_ 28 #define _DEV_ATA_ATAVAR_H_ 29 30 #include <sys/lock.h> 31 #include <sys/queue.h> 32 33 #include <dev/ata/ataconf.h> 34 35 /* XXX For scsipi_adapter and scsipi_channel. */ 36 #include <dev/scsipi/scsipi_all.h> 37 #include <dev/scsipi/atapiconf.h> 38 39 /* 40 * Parameters/state needed by the controller to perform an ATA bio. 41 */ 42 struct ata_bio { 43 volatile uint16_t flags;/* cmd flags */ 44 /* 0x0001 free, was ATA_NOSLEEP */ 45 #define ATA_POLL 0x0002 /* poll for completion */ 46 #define ATA_ITSDONE 0x0004 /* the transfer is as done as it gets */ 47 #define ATA_SINGLE 0x0008 /* transfer must be done in singlesector mode */ 48 #define ATA_LBA 0x0010 /* transfer uses LBA addressing */ 49 #define ATA_READ 0x0020 /* transfer is a read (otherwise a write) */ 50 #define ATA_CORR 0x0040 /* transfer had a corrected error */ 51 #define ATA_LBA48 0x0080 /* transfer uses 48-bit LBA addressing */ 52 #define ATA_FUA 0x0100 /* transfer uses FUA */ 53 #define ATA_PRIO_HIGH 0x0200 /* transfer has high priority */ 54 daddr_t blkno; /* block addr */ 55 daddr_t blkdone;/* number of blks transferred */ 56 daddr_t nblks; /* number of block currently transferring */ 57 int nbytes; /* number of bytes currently transferring */ 58 long bcount; /* total number of bytes */ 59 char *databuf;/* data buffer address */ 60 volatile int error; 61 #define NOERROR 0 /* There was no error (r_error invalid) */ 62 #define ERROR 1 /* check r_error */ 63 #define ERR_DF 2 /* Drive fault */ 64 #define ERR_DMA 3 /* DMA error */ 65 #define TIMEOUT 4 /* device timed out */ 66 #define ERR_NODEV 5 /* device has been gone */ 67 #define ERR_RESET 6 /* command was terminated by channel reset */ 68 #define REQUEUE 7 /* different xfer failed, requeue command */ 69 uint8_t r_error;/* copy of error register */ 70 struct buf *bp; 71 }; 72 73 /* 74 * ATA/ATAPI commands description 75 * 76 * This structure defines the interface between the ATA/ATAPI device driver 77 * and the controller for short commands. It contains the command's parameter, 78 * the length of data to read/write (if any), and a function to call upon 79 * completion. 80 * If no sleep is allowed, the driver can poll for command completion. 81 * Once the command completed, if the error registered is valid, the flag 82 * AT_ERROR is set and the error register value is copied to r_error . 83 * A separate interface is needed for read/write or ATAPI packet commands 84 * (which need multiple interrupts per commands). 85 */ 86 struct ata_command { 87 /* ATA parameters */ 88 uint64_t r_lba; /* before & after */ 89 uint16_t r_count; /* before & after */ 90 union { 91 uint16_t r_features; /* before */ 92 uint8_t r_error; /* after */ 93 }; 94 union { 95 uint8_t r_command; /* before */ 96 uint8_t r_status; /* after */ 97 }; 98 uint8_t r_device; /* before & after */ 99 100 uint8_t r_st_bmask; /* status register mask to wait for before 101 command */ 102 uint8_t r_st_pmask; /* status register mask to wait for after 103 command */ 104 volatile uint16_t flags; 105 106 #define AT_READ 0x0001 /* There is data to read */ 107 #define AT_WRITE 0x0002 /* There is data to write (excl. with AT_READ) */ 108 #define AT_WAIT 0x0008 /* wait in controller code for command completion */ 109 #define AT_POLL 0x0010 /* poll for command completion (no interrupts) */ 110 #define AT_DONE 0x0020 /* command is done */ 111 #define AT_XFDONE 0x0040 /* data xfer is done */ 112 #define AT_ERROR 0x0080 /* command is done with error */ 113 #define AT_TIMEOU 0x0100 /* command timed out */ 114 #define AT_DF 0x0200 /* Drive fault */ 115 #define AT_RESET 0x0400 /* command terminated by channel reset */ 116 #define AT_GONE 0x0800 /* command terminated because device is gone */ 117 #define AT_READREG 0x1000 /* Read registers on completion */ 118 #define AT_LBA 0x2000 /* LBA28 */ 119 #define AT_LBA48 0x4000 /* LBA48 */ 120 121 int timeout; /* timeout (in ms) */ 122 void *data; /* Data buffer address */ 123 int bcount; /* number of bytes to transfer */ 124 }; 125 126 /* Forward declaration for ata_xfer */ 127 struct scsipi_xfer; 128 129 /* 130 * Description of a command to be handled by an ATA controller. These 131 * commands are queued in a list. 132 */ 133 struct ata_xfer { 134 struct callout c_timo_callout; /* timeout callout handle */ 135 struct callout c_retry_callout; /* retry callout handle */ 136 kcondvar_t c_active; /* somebody actively waiting for xfer */ 137 kcondvar_t c_finish; /* somebody waiting for xfer finish */ 138 int8_t c_slot; /* queue slot # */ 139 140 #define c_startzero c_chp 141 /* Channel and drive that are to process the request. */ 142 struct ata_channel *c_chp; 143 uint16_t c_drive; 144 uint16_t c_retries; /* number of xfer retry */ 145 146 volatile u_int c_flags; /* command state flags */ 147 void *c_databuf; /* pointer to data buffer */ 148 int c_bcount; /* byte count left */ 149 int c_skip; /* bytes already transferred */ 150 int c_dscpoll; /* counter for dsc polling (ATAPI) */ 151 int c_lenoff; /* offset to c_bcount (ATAPI) */ 152 #define ATACH_ERR_ST(error, status) ((error) << 8 | (status)) 153 #define ATACH_ERR(val) (((val) >> 8) & 0xff) 154 #define ATACH_ST(val) (((val) >> 0) & 0xff) 155 156 union { 157 struct ata_bio c_bio; /* ATA transfer */ 158 struct ata_command c_ata_c; /* ATA command */ 159 struct scsipi_xfer *c_scsipi; /* SCSI transfer */ 160 } u; 161 #define c_bio u.c_bio 162 #define c_ata_c u.c_ata_c 163 #define c_scsipi u.c_scsipi 164 165 /* Link on the command queue. */ 166 TAILQ_ENTRY(ata_xfer) c_xferchain; 167 TAILQ_ENTRY(ata_xfer) c_activechain; 168 169 /* Low-level protocol handlers. */ 170 int (*c_start)(struct ata_channel *, struct ata_xfer *); 171 #define ATASTART_STARTED 0 /* xfer started, waiting for intr */ 172 #define ATASTART_TH 1 /* xfer needs to be run in thread */ 173 #define ATASTART_POLL 2 /* xfer needs to be polled */ 174 #define ATASTART_ABORT 3 /* error occurred, abort xfer */ 175 void (*c_poll)(struct ata_channel *, struct ata_xfer *); 176 void (*c_abort)(struct ata_channel *, struct ata_xfer *); 177 int (*c_intr)(struct ata_channel *, struct ata_xfer *, int); 178 void (*c_kill_xfer)(struct ata_channel *, struct ata_xfer *, int); 179 }; 180 181 /* flags in c_flags */ 182 #define C_ATAPI 0x0001 /* xfer is ATAPI request */ 183 #define C_TIMEOU 0x0002 /* xfer processing timed out */ 184 #define C_POLL 0x0004 /* command is polled */ 185 #define C_DMA 0x0008 /* command uses DMA */ 186 #define C_WAIT 0x0010 /* can use kpause */ 187 #define C_WAITACT 0x0020 /* wakeup when active */ 188 #define C_FREE 0x0040 /* call ata_free_xfer() asap */ 189 #define C_PIOBM 0x0080 /* command uses busmastering PIO */ 190 #define C_NCQ 0x0100 /* command is queued */ 191 #define C_RECOVERY 0x0200 /* executed as part of recovery */ 192 #define C_WAITTIMO 0x0400 /* race vs. timeout */ 193 #define C_CHAOS 0x0800 /* forced error xfer */ 194 #define C_RECOVERED 0x1000 /* error recovered, no need for reset */ 195 196 /* reasons for c_kill_xfer() */ 197 #define KILL_GONE 1 /* device is gone while xfer was active */ 198 #define KILL_RESET 2 /* xfer was reset */ 199 #define KILL_GONE_INACTIVE 3 /* device is gone while xfer was pending */ 200 #define KILL_REQUEUE 4 /* xfer must be reissued to device, no err */ 201 202 /* 203 * While hw supports up to 32 tags, in practice we must never 204 * allow 32 active commands, since that would signal same as 205 * channel error. We use slot 32 only for error recovery if available. 206 */ 207 #define ATA_MAX_OPENINGS 32 208 #define ATA_REAL_OPENINGS(op) ((op) > 1 ? (op) - 1 : 1) 209 210 #define ATA_BSIZE 512 /* Standard ATA block size (bytes) */ 211 212 /* Per-channel queue of ata_xfers */ 213 #ifndef ATABUS_PRIVATE 214 struct ata_queue; 215 #else 216 struct ata_queue { 217 int8_t queue_flags; /* flags for this queue */ 218 #define QF_IDLE_WAIT 0x01 /* someone wants the controller idle */ 219 #define QF_NEED_XFER 0x02 /* someone wants xfer */ 220 int8_t queue_active; /* number of active transfers */ 221 uint8_t queue_openings; /* max number of active xfers */ 222 TAILQ_HEAD(, ata_xfer) queue_xfer; /* queue of pending commands */ 223 int queue_freeze; /* freeze count for the queue */ 224 kcondvar_t queue_busy; /* c: waiting of xfer */ 225 kcondvar_t queue_drain; /* c: waiting of queue drain */ 226 kcondvar_t queue_idle; /* c: waiting of queue idle */ 227 TAILQ_HEAD(, ata_xfer) active_xfers; /* active commands */ 228 uint32_t active_xfers_used; /* mask of active commands */ 229 uint32_t queue_xfers_avail; /* available xfers mask */ 230 struct ata_xfer queue_xfers[0]; /* xfers */ 231 }; 232 #endif 233 234 /* ATA bus instance state information. */ 235 struct atabus_softc { 236 device_t sc_dev; 237 struct ata_channel *sc_chan; 238 int sc_flags; 239 #define ATABUSCF_OPEN 0x01 240 }; 241 242 /* 243 * A queue of atabus instances, used to ensure the same bus probe order 244 * for a given hardware configuration at each boot. 245 */ 246 struct atabus_initq { 247 TAILQ_ENTRY(atabus_initq) atabus_initq; 248 struct atabus_softc *atabus_sc; 249 }; 250 251 /* High-level functions and structures used by both ATA and ATAPI devices */ 252 struct ataparams; 253 254 /* Datas common to drives and controller drivers */ 255 struct ata_drive_datas { 256 uint8_t drive; /* drive number */ 257 int8_t ata_vers; /* ATA version supported */ 258 uint16_t drive_flags; /* bitmask for drives present/absent and cap */ 259 #define ATA_DRIVE_CAP32 0x0001 /* 32-bit transfer capable */ 260 #define ATA_DRIVE_DMA 0x0002 261 #define ATA_DRIVE_UDMA 0x0004 262 #define ATA_DRIVE_MODE 0x0008 /* the drive reported its mode */ 263 #define ATA_DRIVE_RESET 0x0010 /* reset the drive state at next xfer */ 264 #define ATA_DRIVE_WAITDRAIN 0x0020 /* device is waiting for the queue to drain */ 265 #define ATA_DRIVE_NOSTREAM 0x0040 /* no stream methods on this drive */ 266 #define ATA_DRIVE_ATAPIDSCW 0x0080 /* needs to wait for DSC in phase_complete */ 267 #define ATA_DRIVE_WFUA 0x0100 /* drive supports WRITE DMA FUA EXT */ 268 #define ATA_DRIVE_NCQ 0x0200 /* drive supports NCQ feature set */ 269 #define ATA_DRIVE_NCQ_PRIO 0x0400 /* drive supports NCQ PRIO field */ 270 271 uint8_t drive_type; 272 #define ATA_DRIVET_NONE 0 273 #define ATA_DRIVET_ATA 1 274 #define ATA_DRIVET_ATAPI 2 275 #define ATA_DRIVET_OLD 3 276 #define ATA_DRIVET_PM 4 277 278 /* 279 * Current setting of drive's PIO, DMA and UDMA modes. 280 * Is initialised by the disks drivers at attach time, and may be 281 * changed later by the controller's code if needed 282 */ 283 uint8_t PIO_mode; /* Current setting of drive's PIO mode */ 284 #if NATA_DMA 285 uint8_t DMA_mode; /* Current setting of drive's DMA mode */ 286 #if NATA_UDMA 287 uint8_t UDMA_mode; /* Current setting of drive's UDMA mode */ 288 #endif 289 #endif 290 291 /* Supported modes for this drive */ 292 uint8_t PIO_cap; /* supported drive's PIO mode */ 293 #if NATA_DMA 294 uint8_t DMA_cap; /* supported drive's DMA mode */ 295 #if NATA_UDMA 296 uint8_t UDMA_cap; /* supported drive's UDMA mode */ 297 #endif 298 #endif 299 300 /* 301 * Drive state. 302 * This is reset to 0 after a channel reset. 303 */ 304 uint8_t state; 305 306 #define RESET 0 307 #define READY 1 308 309 uint8_t drv_openings; /* # of command tags */ 310 311 #if NATA_DMA 312 /* numbers of xfers and DMA errs. Used by ata_dmaerr() */ 313 uint8_t n_dmaerrs; 314 uint32_t n_xfers; 315 316 /* Downgrade after NERRS_MAX errors in at most NXFER xfers */ 317 #define NERRS_MAX 4 318 #define NXFER 4000 319 #endif 320 321 /* Callbacks into the drive's driver. */ 322 void (*drv_done)(device_t, struct ata_xfer *); /* xfer is done */ 323 void (*drv_start)(device_t); /* start queue */ 324 325 device_t drv_softc; /* ATA drives softc, if any */ 326 struct ata_channel *chnl_softc; /* channel softc */ 327 328 /* Context used for I/O */ 329 struct disklabel *lp; /* pointer to drive's label info */ 330 uint8_t multi; /* # of blocks to transfer in multi-mode */ 331 daddr_t badsect[127]; /* 126 plus trailing -1 marker */ 332 333 /* Recovery buffer */ 334 uint8_t recovery_blk[ATA_BSIZE]; 335 }; 336 337 /* User config flags that force (or disable) the use of a mode */ 338 #define ATA_CONFIG_PIO_MODES 0x0007 339 #define ATA_CONFIG_PIO_SET 0x0008 340 #define ATA_CONFIG_PIO_OFF 0 341 #define ATA_CONFIG_DMA_MODES 0x0070 342 #define ATA_CONFIG_DMA_SET 0x0080 343 #define ATA_CONFIG_DMA_DISABLE 0x0070 344 #define ATA_CONFIG_DMA_OFF 4 345 #define ATA_CONFIG_UDMA_MODES 0x0700 346 #define ATA_CONFIG_UDMA_SET 0x0800 347 #define ATA_CONFIG_UDMA_DISABLE 0x0700 348 #define ATA_CONFIG_UDMA_OFF 8 349 350 /* 351 * ata_bustype. The first field must be compatible with scsipi_bustype, 352 * as it's used for autoconfig by both ata and atapi drivers. 353 */ 354 struct ata_bustype { 355 int bustype_type; /* symbolic name of type */ 356 int (*ata_bio)(struct ata_drive_datas *, struct ata_xfer *); 357 void (*ata_reset_drive)(struct ata_drive_datas *, int, uint32_t *); 358 void (*ata_reset_channel)(struct ata_channel *, int); 359 /* extra flags for ata_reset_*(), in addition to AT_* */ 360 #define AT_RST_EMERG 0x10000 /* emergency - e.g. for a dump */ 361 362 int (*ata_exec_command)(struct ata_drive_datas *, 363 struct ata_xfer *); 364 365 #define ATACMD_COMPLETE 0x01 366 #define ATACMD_QUEUED 0x02 367 #define ATACMD_TRY_AGAIN 0x03 368 369 int (*ata_get_params)(struct ata_drive_datas *, uint8_t, 370 struct ataparams *); 371 int (*ata_addref)(struct ata_drive_datas *); 372 void (*ata_delref)(struct ata_drive_datas *); 373 void (*ata_killpending)(struct ata_drive_datas *); 374 }; 375 376 /* bustype_type */ /* XXX XXX XXX */ 377 /* #define SCSIPI_BUSTYPE_SCSI 0 */ 378 /* #define SCSIPI_BUSTYPE_ATAPI 1 */ 379 #define SCSIPI_BUSTYPE_ATA 2 380 381 /* 382 * Describe an ATA device. Has to be compatible with scsipi_channel, so 383 * start with a pointer to ata_bustype. 384 */ 385 struct ata_device { 386 const struct ata_bustype *adev_bustype; 387 int adev_channel; 388 struct ata_drive_datas *adev_drv_data; 389 }; 390 391 /* 392 * Per-channel data 393 */ 394 struct ata_channel { 395 int ch_channel; /* location */ 396 struct atac_softc *ch_atac; /* ATA controller softc */ 397 kmutex_t ch_lock; /* channel lock - queue */ 398 399 /* Our state */ 400 volatile int ch_flags; 401 #define ATACH_SHUTDOWN 0x02 /* channel is shutting down */ 402 #define ATACH_IRQ_WAIT 0x10 /* controller is waiting for irq */ 403 #define ATACH_DMA_WAIT 0x20 /* controller is waiting for DMA */ 404 #define ATACH_PIOBM_WAIT 0x40 /* controller is waiting for busmastering PIO */ 405 #define ATACH_DISABLED 0x80 /* channel is disabled */ 406 #define ATACH_TH_RUN 0x100 /* the kernel thread is working */ 407 #define ATACH_TH_RESET 0x200 /* someone ask the thread to reset */ 408 #define ATACH_TH_RESCAN 0x400 /* rescan requested */ 409 #define ATACH_NCQ 0x800 /* channel executing NCQ commands */ 410 #define ATACH_DMA_BEFORE_CMD 0x1000 /* start DMA first */ 411 412 /* for the reset callback */ 413 int ch_reset_flags; 414 415 /* per-drive info */ 416 int ch_ndrives; /* number of entries in ch_drive[] */ 417 struct ata_drive_datas *ch_drive; /* array of ata_drive_datas */ 418 419 device_t atabus; /* self */ 420 421 /* ATAPI children */ 422 device_t atapibus; 423 struct scsipi_channel ch_atapi_channel; 424 425 /* 426 * Channel queues. May be the same for all channels, if hw 427 * channels are not independent. 428 */ 429 struct ata_queue *ch_queue; 430 431 /* The channel kernel thread */ 432 struct lwp *ch_thread; 433 kcondvar_t ch_thr_idle; /* thread waiting for work */ 434 435 /* Number of sata PMP ports, if any */ 436 int ch_satapmp_nports; 437 }; 438 439 /* 440 * ATA controller softc. 441 * 442 * This contains a bunch of generic info that all ATA controllers need 443 * to have. 444 * 445 * XXX There is still some lingering wdc-centricity here. 446 */ 447 struct atac_softc { 448 device_t atac_dev; /* generic device info */ 449 450 int atac_cap; /* controller capabilities */ 451 452 #define ATAC_CAP_DATA16 0x0001 /* can do 16-bit data access */ 453 #define ATAC_CAP_DATA32 0x0002 /* can do 32-bit data access */ 454 #define ATAC_CAP_DMA 0x0008 /* can do ATA DMA modes */ 455 #define ATAC_CAP_UDMA 0x0010 /* can do ATA Ultra DMA modes */ 456 #define ATAC_CAP_PIOBM 0x0020 /* can do busmastering PIO transfer */ 457 #define ATAC_CAP_ATA_NOSTREAM 0x0040 /* don't use stream funcs on ATA */ 458 #define ATAC_CAP_ATAPI_NOSTREAM 0x0080 /* don't use stream funcs on ATAPI */ 459 #define ATAC_CAP_NOIRQ 0x1000 /* controller never interrupts */ 460 #define ATAC_CAP_RAID 0x4000 /* controller "supports" RAID */ 461 #define ATAC_CAP_NCQ 0x8000 /* controller supports NCQ */ 462 463 uint8_t atac_pio_cap; /* highest PIO mode supported */ 464 #if NATA_DMA 465 uint8_t atac_dma_cap; /* highest DMA mode supported */ 466 #if NATA_UDMA 467 uint8_t atac_udma_cap; /* highest UDMA mode supported */ 468 #endif 469 #endif 470 471 /* Array of pointers to channel-specific data. */ 472 struct ata_channel **atac_channels; 473 int atac_nchannels; 474 475 const struct ata_bustype *atac_bustype_ata; 476 477 /* 478 * Glue between ATA and SCSIPI for the benefit of ATAPI. 479 * 480 * Note: The reference count here is used for both ATA and ATAPI 481 * devices. 482 */ 483 struct atapi_adapter atac_atapi_adapter; 484 void (*atac_atapibus_attach)(struct atabus_softc *); 485 486 /* Driver callback to probe for drives. */ 487 void (*atac_probe)(struct ata_channel *); 488 489 /* 490 * Optional callbacks to lock/unlock hardware. 491 * Called with channel mutex held. 492 */ 493 int (*atac_claim_hw)(struct ata_channel *, int); 494 void (*atac_free_hw)(struct ata_channel *); 495 496 /* 497 * Optional callbacks to set drive mode. Required for anything 498 * but basic PIO operation. 499 */ 500 void (*atac_set_modes)(struct ata_channel *); 501 }; 502 503 #ifdef _KERNEL 504 void ata_channel_attach(struct ata_channel *); 505 void ata_channel_init(struct ata_channel *); 506 void ata_channel_detach(struct ata_channel *); 507 void ata_channel_destroy(struct ata_channel *); 508 int atabusprint(void *aux, const char *); 509 int ataprint(void *aux, const char *); 510 511 int atabus_alloc_drives(struct ata_channel *, int); 512 void atabus_free_drives(struct ata_channel *); 513 514 struct ataparams; 515 int ata_get_params(struct ata_drive_datas *, uint8_t, struct ataparams *); 516 int ata_set_mode(struct ata_drive_datas *, uint8_t, uint8_t); 517 int ata_read_log_ext_ncq(struct ata_drive_datas *, uint8_t, uint8_t *, 518 uint8_t *, uint8_t *); 519 520 /* return code for these cmds */ 521 #define CMD_OK 0 522 #define CMD_ERR 1 523 #define CMD_AGAIN 2 524 525 struct ata_xfer *ata_get_xfer_ext(struct ata_channel *, int, uint8_t); 526 #define ata_get_xfer(chp) ata_get_xfer_ext((chp), C_WAIT, 0) 527 void ata_free_xfer(struct ata_channel *, struct ata_xfer *); 528 void ata_deactivate_xfer(struct ata_channel *, struct ata_xfer *); 529 void ata_exec_xfer(struct ata_channel *, struct ata_xfer *); 530 int ata_xfer_start(struct ata_xfer *xfer); 531 void ata_wait_xfer(struct ata_channel *, struct ata_xfer *xfer); 532 void ata_wake_xfer(struct ata_channel *, struct ata_xfer *xfer); 533 534 void ata_timeout(void *); 535 bool ata_timo_xfer_check(struct ata_xfer *); 536 void ata_kill_pending(struct ata_drive_datas *); 537 void ata_kill_active(struct ata_channel *, int, int); 538 void ata_reset_channel(struct ata_channel *, int); 539 void ata_channel_freeze(struct ata_channel *); 540 void ata_channel_thaw(struct ata_channel *); 541 void ata_channel_start(struct ata_channel *, int); 542 void ata_channel_lock(struct ata_channel *); 543 void ata_channel_unlock(struct ata_channel *); 544 void ata_channel_lock_owned(struct ata_channel *); 545 546 int ata_addref(struct ata_channel *); 547 void ata_delref(struct ata_channel *); 548 void atastart(struct ata_channel *); 549 void ata_print_modes(struct ata_channel *); 550 #if NATA_DMA 551 int ata_downgrade_mode(struct ata_drive_datas *, int); 552 #endif 553 void ata_probe_caps(struct ata_drive_datas *); 554 555 #if NATA_DMA 556 void ata_dmaerr(struct ata_drive_datas *, int); 557 #endif 558 struct ata_queue * 559 ata_queue_alloc(uint8_t openings); 560 void ata_queue_free(struct ata_queue *); 561 void ata_queue_reset(struct ata_queue *); 562 struct ata_xfer * 563 ata_queue_hwslot_to_xfer(struct ata_channel *, int); 564 struct ata_xfer * 565 ata_queue_get_active_xfer(struct ata_channel *); 566 struct ata_xfer * 567 ata_queue_get_active_xfer_locked(struct ata_channel *); 568 struct ata_xfer * 569 ata_queue_drive_active_xfer(struct ata_channel *, int); 570 571 void ata_delay(struct ata_channel *, int, const char *, int); 572 573 bool ata_waitdrain_xfer_check(struct ata_channel *, struct ata_xfer *); 574 575 void atacmd_toncq(struct ata_xfer *, uint8_t *, uint16_t *, uint16_t *, 576 uint8_t *); 577 578 #ifdef ATADEBUG 579 void atachannel_debug(struct ata_channel *); 580 #endif 581 582 #endif /* _KERNEL */ 583 584 #endif /* _DEV_ATA_ATAVAR_H_ */ 585
Indexes created Tue Sep 30 11:09:46 GMT 2025