satapmp_subr.c revision 1.2
1 /* $NetBSD: satapmp_subr.c,v 1.2 2012/07/15 10:55:29 dsl Exp $ */ 2 3 /* 4 * Copyright (c) 2012 Manuel Bouyer. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: satapmp_subr.c,v 1.2 2012/07/15 10:55:29 dsl Exp $"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/device.h> 34 #include <sys/conf.h> 35 #include <sys/fcntl.h> 36 #include <sys/proc.h> 37 #include <sys/errno.h> 38 #include <sys/kmem.h> 39 #include <sys/intr.h> 40 41 #include <dev/ata/ataconf.h> 42 #include <dev/ata/atareg.h> 43 #include <dev/ata/atavar.h> 44 45 #include <dev/ata/satapmpvar.h> 46 #include <dev/ata/satapmpreg.h> 47 #include <dev/ata/satavar.h> 48 #include <dev/ata/satareg.h> 49 50 static int 51 satapmp_read(struct ata_channel *chp, int port, int reg, uint32_t *value) 52 { 53 struct ata_command ata_c; 54 struct atac_softc *atac = chp->ch_atac; 55 struct ata_drive_datas *drvp; 56 57 KASSERT(reg < PMP_GSCR_NREGS); 58 KASSERT(chp->ch_ndrives >= PMP_MAX_DRIVES); 59 drvp = &chp->ch_drive[PMP_PORT_CTL]; 60 KASSERT(drvp->drive == PMP_PORT_CTL); 61 62 memset(&ata_c, 0, sizeof(struct ata_command)); 63 64 ata_c.r_command = PMPC_READ_PORT; 65 ata_c.r_features = reg; 66 ata_c.r_lba = (port & 0xf) << 24; 67 ata_c.timeout = 3000; /* 3s */ 68 ata_c.r_st_bmask = WDCS_DRDY; 69 ata_c.r_st_pmask = 0; 70 ata_c.flags = AT_READREG | AT_WAIT; 71 72 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 73 &ata_c) != ATACMD_COMPLETE) { 74 aprint_error_dev(chp->atabus, 75 "PMP register %d read failed\n", reg); 76 return EIO; 77 } 78 if (ata_c.flags & (AT_TIMEOU | AT_DF)) { 79 aprint_error_dev(chp->atabus, 80 "PMP register %d read failed, flags 0x%x\n", 81 reg, ata_c.flags); 82 return EIO; 83 } 84 if (ata_c.flags & AT_ERROR) { 85 aprint_verbose_dev(chp->atabus, 86 "PMP register %d read failed, error 0x%x\n", 87 reg, ata_c.r_error); 88 return EIO; 89 } 90 *value = ata_c.r_lba << 8 | ata_c.r_count; 91 return 0; 92 } 93 94 static int satapmp_write(struct ata_channel *chp, int, int, uint32_t) __unused; 95 static int 96 satapmp_write(struct ata_channel *chp, int port, int reg, uint32_t value) 97 { 98 struct ata_command ata_c; 99 struct atac_softc *atac = chp->ch_atac; 100 struct ata_drive_datas *drvp; 101 102 KASSERT(reg < PMP_GSCR_NREGS); 103 KASSERT(chp->ch_ndrives >= PMP_MAX_DRIVES); 104 drvp = &chp->ch_drive[PMP_PORT_CTL]; 105 KASSERT(drvp->drive == PMP_PORT_CTL); 106 107 108 memset(&ata_c, 0, sizeof(struct ata_command)); 109 110 ata_c.r_command = PMPC_WRITE_PORT; 111 ata_c.r_features = reg; 112 ata_c.r_lba = (port & 0xf) << 24; 113 ata_c.r_lba |= (value & 0xffffff00) >> 8; 114 ata_c.r_count = value & 0xff; 115 ata_c.timeout = 3000; /* 3s */ 116 ata_c.r_st_bmask = WDCS_DRDY; 117 ata_c.r_st_pmask = 0; 118 ata_c.flags = AT_WAIT; 119 120 if ((*atac->atac_bustype_ata->ata_exec_command)(drvp, 121 &ata_c) != ATACMD_COMPLETE) { 122 aprint_error_dev(chp->atabus, 123 "PMP register %d write failed\n", reg); 124 return EIO; 125 } 126 if (ata_c.flags & (AT_TIMEOU | AT_DF)) { 127 aprint_error_dev(chp->atabus, 128 "PMP register %d write failed, flags 0x%x\n", 129 reg, ata_c.flags); 130 return EIO; 131 } 132 if (ata_c.flags & AT_ERROR) { 133 aprint_verbose_dev(chp->atabus, 134 "PMP register %d write failed, error 0x%x\n", 135 reg, ata_c.r_error); 136 return EIO; 137 } 138 return 0; 139 } 140 141 /* 142 * Reset one port's PHY and bring it online 143 * XXX duplicate of sata_reset_interface() 144 */ 145 static uint32_t 146 satapmp_reset_device_port(struct ata_channel *chp, int port) 147 { 148 uint32_t scontrol, sstatus; 149 int i; 150 151 /* bring the PHY online */ 152 scontrol = SControl_IPM_NONE | SControl_SPD_ANY | SControl_DET_INIT; 153 if (satapmp_write(chp, port, PMP_PSCR_SControl, scontrol) != 0) 154 return 0; 155 156 tsleep(chp, PRIBIO, "sataup", mstohz(50)); 157 scontrol &= ~SControl_DET_INIT; 158 if (satapmp_write(chp, port, PMP_PSCR_SControl, scontrol) != 0) 159 return 0; 160 tsleep(chp, PRIBIO, "sataup", mstohz(50)); 161 162 /* wait up to 1s for device to come up */ 163 for (i = 0; i < 100; i++) { 164 165 if (satapmp_read(chp, port, PMP_PSCR_SStatus, &sstatus) != 0) 166 return 0; 167 if ((sstatus & SStatus_DET_mask) == SStatus_DET_DEV) 168 break; 169 tsleep(chp, PRIBIO, "sataup", mstohz(10)); 170 } 171 172 switch (sstatus & SStatus_DET_mask) { 173 case SStatus_DET_NODEV: 174 /* No Device; be silent. */ 175 break; 176 case SStatus_DET_DEV_NE: 177 aprint_error("%s PMP port %d: device connected, but " 178 "communication not established\n", 179 device_xname(chp->atabus), port); 180 break; 181 case SStatus_DET_OFFLINE: 182 aprint_error("%s PMP port %d: PHY offline\n", 183 device_xname(chp->atabus), port); 184 break; 185 case SStatus_DET_DEV: 186 aprint_normal("%s PMP port %d: device present, speed: %s\n", 187 device_xname(chp->atabus), port, sata_speed(sstatus)); 188 break; 189 default: 190 aprint_error("%s PMP port %d: unknown SStatus: 0x%08x\n", 191 device_xname(chp->atabus), port, sstatus); 192 } 193 return(sstatus & SStatus_DET_mask); 194 } 195 196 void 197 satapmp_rescan(struct ata_channel *chp) { 198 int i; 199 uint32_t sig; 200 201 KASSERT(chp->ch_satapmp_nports <= PMP_PORT_CTL); 202 KASSERT(chp->ch_satapmp_nports <= chp->ch_ndrives); 203 204 for (i = 0; i < chp->ch_satapmp_nports; i++) { 205 if (chp->ch_drive[i].drive_type != ATA_DRIVET_NONE || 206 satapmp_reset_device_port(chp, i) != SStatus_DET_DEV) { 207 continue; 208 } 209 if (satapmp_write(chp, i, PMP_PSCR_SError, 0xffffffff) != 0) { 210 aprint_error("%s PMP port %d: can't write SError\n", 211 device_xname(chp->atabus), i); 212 continue; 213 } 214 chp->ch_atac->atac_bustype_ata->ata_reset_drive( 215 &chp->ch_drive[i], AT_WAIT, &sig); 216 217 sata_interpret_sig(chp, i, sig); 218 } 219 } 220 221 void 222 satapmp_attach(struct ata_channel *chp) 223 { 224 uint32_t id, rev, inf; 225 226 if (satapmp_read(chp, PMP_PORT_CTL, PMP_GSCR_ID, &id) != 0 || 227 satapmp_read(chp, PMP_PORT_CTL, PMP_GSCR_REV, &rev) != 0 || 228 satapmp_read(chp, PMP_PORT_CTL, PMP_GSCR_INF, &inf) != 0) { 229 aprint_normal_dev(chp->atabus, "can't read PMP registers\n"); 230 return; 231 } 232 233 aprint_normal_dev(chp->atabus, 234 "SATA port multiplier, %d ports\n", PMP_INF_NPORTS(inf)); 235 aprint_verbose_dev(chp->atabus, 236 "vendor 0x%x, product 0x%x", 237 PMP_ID_VEND(id), PMP_ID_DEV(id)); 238 if (rev & PMP_REV_SPEC_11) { 239 aprint_verbose(", revision 1.1"); 240 } else if (rev & PMP_REV_SPEC_10) { 241 aprint_verbose(", revision 1.0"); 242 } else { 243 aprint_verbose(", unknown revision 0x%x", rev & 0x0f); 244 } 245 aprint_verbose(", level %d\n", PMP_REV_LEVEL(rev)); 246 247 chp->ch_satapmp_nports = PMP_INF_NPORTS(inf); 248 249 /* reset and bring up PHYs */ 250 satapmp_rescan(chp); 251 } 252
Indexes created Fri Oct 03 02:09:57 GMT 2025