if_ni.c revision 1.9
1 /* $NetBSD: if_ni.c,v 1.9 2001/04/12 20:38:25 thorpej Exp $ */ 2 /* 3 * Copyright (c) 2000 Ludd, University of Lule}, Sweden. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed at Ludd, University of 16 * Lule}, Sweden and its contributors. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Driver for DEBNA/DEBNT/DEBNK ethernet cards. 34 * Things that is still to do: 35 * Collect statistics. 36 */ 37 38 #include "opt_inet.h" 39 #include "bpfilter.h" 40 41 #include <sys/param.h> 42 #include <sys/mbuf.h> 43 #include <sys/socket.h> 44 #include <sys/device.h> 45 #include <sys/systm.h> 46 #include <sys/sockio.h> 47 48 #include <net/if.h> 49 #include <net/if_ether.h> 50 #include <net/if_dl.h> 51 52 #include <netinet/in.h> 53 #include <netinet/if_inarp.h> 54 55 #if NBPFILTER > 0 56 #include <net/bpf.h> 57 #include <net/bpfdesc.h> 58 #endif 59 60 #include <machine/bus.h> 61 #ifdef __vax__ 62 #include <machine/mtpr.h> 63 #include <machine/pte.h> 64 #endif 65 66 #include <dev/bi/bireg.h> 67 #include <dev/bi/bivar.h> 68 69 #include "ioconf.h" 70 #include "locators.h" 71 72 /* 73 * Tunable buffer parameters. Good idea to have them as power of 8; then 74 * they will fit into a logical VAX page. 75 */ 76 #define NMSGBUF 8 /* Message queue entries */ 77 #define NTXBUF 16 /* Transmit queue entries */ 78 #define NTXFRAGS 8 /* Number of transmit buffer fragments */ 79 #define NRXBUF 24 /* Receive queue entries */ 80 #define NBDESCS (NTXBUF * NTXFRAGS + NRXBUF) 81 #define NQUEUES 3 /* RX + TX + MSG */ 82 #define PKTHDR 18 /* Length of (control) packet header */ 83 #define RXADD 18 /* Additional length of receive datagram */ 84 #define TXADD (10+NTXFRAGS*8) /* "" transmit "" */ 85 #define MSGADD 134 /* "" message "" */ 86 87 #include <dev/bi/if_nireg.h> /* XXX include earlier */ 88 89 /* 90 * Macros for (most cases of) insqti/remqhi. 91 * Retry NRETRIES times to do the operation, if it still fails assume 92 * a lost lock and panic. 93 */ 94 #define NRETRIES 100 95 #define INSQTI(e, h) ({ \ 96 int ret, i; \ 97 for (i = 0; i < NRETRIES; i++) { \ 98 if ((ret = insqti(e, h)) != ILCK_FAILED) \ 99 break; \ 100 } \ 101 if (i == NRETRIES) \ 102 panic("ni: insqti failed at %d", __LINE__); \ 103 ret; \ 104 }) 105 #define REMQHI(h) ({ \ 106 int i;void *ret; \ 107 for (i = 0; i < NRETRIES; i++) { \ 108 if ((ret = remqhi(h)) != (void *)ILCK_FAILED) \ 109 break; \ 110 } \ 111 if (i == NRETRIES) \ 112 panic("ni: remqhi failed at %d", __LINE__); \ 113 ret; \ 114 }) 115 116 117 #define nipqb (&sc->sc_gvppqb->nc_pqb) 118 #define gvp sc->sc_gvppqb 119 #define fqb sc->sc_fqb 120 #define bbd sc->sc_bbd 121 122 struct ni_softc { 123 struct device sc_dev; /* Configuration common part */ 124 struct evcnt sc_intrcnt; /* Interrupt coounting */ 125 struct ethercom sc_ec; /* Ethernet common part */ 126 #define sc_if sc_ec.ec_if /* network-visible interface */ 127 bus_space_tag_t sc_iot; 128 bus_addr_t sc_ioh; 129 bus_dma_tag_t sc_dmat; 130 struct ni_gvppqb *sc_gvppqb; /* Port queue block */ 131 struct ni_gvppqb *sc_pgvppqb; /* Phys address of PQB */ 132 struct ni_fqb *sc_fqb; /* Free Queue block */ 133 struct ni_bbd *sc_bbd; /* Buffer descriptors */ 134 u_int8_t sc_enaddr[ETHER_ADDR_LEN]; 135 }; 136 137 static int nimatch __P((struct device *, struct cfdata *, void *)); 138 static void niattach __P((struct device *, struct device *, void *)); 139 static void niinit __P((struct ni_softc *)); 140 static void nistart __P((struct ifnet *)); 141 static void niintr __P((void *)); 142 static int niioctl __P((struct ifnet *, u_long, caddr_t)); 143 static int ni_add_rxbuf(struct ni_softc *, struct ni_dg *, int); 144 static void ni_setup __P((struct ni_softc *)); 145 static void nitimeout __P((struct ifnet *)); 146 static void ni_shutdown(void *); 147 static void ni_getpgs(struct ni_softc *sc, int size, caddr_t *v, paddr_t *p); 148 static int failtest(struct ni_softc *, int, int, int, char *); 149 150 volatile int endwait, retry; /* Used during autoconfig */ 151 152 struct cfattach ni_ca = { 153 sizeof(struct ni_softc), nimatch, niattach 154 }; 155 156 #define NI_WREG(csr, val) \ 157 bus_space_write_4(sc->sc_iot, sc->sc_ioh, csr, val) 158 #define NI_RREG(csr) \ 159 bus_space_read_4(sc->sc_iot, sc->sc_ioh, csr) 160 161 #define WAITREG(csr,val) while (NI_RREG(csr) & val); 162 /* 163 * Check for present device. 164 */ 165 int 166 nimatch(parent, cf, aux) 167 struct device *parent; 168 struct cfdata *cf; 169 void *aux; 170 { 171 struct bi_attach_args *ba = aux; 172 u_short type; 173 174 type = bus_space_read_2(ba->ba_iot, ba->ba_ioh, BIREG_DTYPE); 175 if (type != BIDT_DEBNA && type != BIDT_DEBNT && type != BIDT_DEBNK) 176 return 0; 177 178 if (cf->cf_loc[BICF_NODE] != BICF_NODE_DEFAULT && 179 cf->cf_loc[BICF_NODE] != ba->ba_nodenr) 180 return 0; 181 182 return 1; 183 } 184 185 /* 186 * Allocate a bunch of descriptor-safe memory. 187 * We need to get the structures from the beginning of its own pages. 188 */ 189 static void 190 ni_getpgs(struct ni_softc *sc, int size, caddr_t *v, paddr_t *p) 191 { 192 bus_dma_segment_t seg; 193 int nsegs, error; 194 195 if ((error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, 0, &seg, 1, 196 &nsegs, BUS_DMA_NOWAIT)) != 0) 197 panic(" unable to allocate memory: error %d", error); 198 199 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, nsegs, size, v, 200 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) 201 panic(" unable to map memory: error %d", error); 202 203 if (p) 204 *p = seg.ds_addr; 205 bzero(*v, size); 206 } 207 208 static int 209 failtest(struct ni_softc *sc, int reg, int mask, int test, char *str) 210 { 211 int i = 100; 212 213 do { 214 DELAY(100000); 215 } while (((NI_RREG(reg) & mask) != test) && --i); 216 217 if (i == 0) { 218 printf("%s: %s\n", sc->sc_dev.dv_xname, str); 219 return 1; 220 } 221 return 0; 222 } 223 224 225 /* 226 * Interface exists: make available by filling in network interface 227 * record. System will initialize the interface when it is ready 228 * to accept packets. 229 */ 230 void 231 niattach(parent, self, aux) 232 struct device *parent, *self; 233 void *aux; 234 { 235 struct bi_attach_args *ba = aux; 236 struct ni_softc *sc = (struct ni_softc *)self; 237 struct ifnet *ifp = (struct ifnet *)&sc->sc_if; 238 struct ni_msg *msg; 239 struct ni_ptdb *ptdb; 240 caddr_t va; 241 int i, j, s, res; 242 u_short type; 243 244 type = bus_space_read_2(ba->ba_iot, ba->ba_ioh, BIREG_DTYPE); 245 printf(": DEBN%c\n", type == BIDT_DEBNA ? 'A' : type == BIDT_DEBNT ? 246 'T' : 'K'); 247 sc->sc_iot = ba->ba_iot; 248 sc->sc_ioh = ba->ba_ioh; 249 sc->sc_dmat = ba->ba_dmat; 250 251 bi_intr_establish(ba->ba_icookie, ba->ba_ivec, 252 niintr, sc, &sc->sc_intrcnt); 253 evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL, 254 sc->sc_dev.dv_xname, "intr"); 255 256 ni_getpgs(sc, sizeof(struct ni_gvppqb), (caddr_t *)&sc->sc_gvppqb, 257 (paddr_t *)&sc->sc_pgvppqb); 258 ni_getpgs(sc, sizeof(struct ni_fqb), (caddr_t *)&sc->sc_fqb, 0); 259 ni_getpgs(sc, NBDESCS * sizeof(struct ni_bbd), 260 (caddr_t *)&sc->sc_bbd, 0); 261 /* 262 * Zero the newly allocated memory. 263 */ 264 265 nipqb->np_veclvl = (ba->ba_ivec << 2) + 2; 266 nipqb->np_node = ba->ba_intcpu; 267 nipqb->np_vpqb = (u_int32_t)gvp; 268 #ifdef __vax__ 269 nipqb->np_spt = nipqb->np_gpt = mfpr(PR_SBR); 270 nipqb->np_sptlen = nipqb->np_gptlen = mfpr(PR_SLR); 271 #else 272 #error Must fix support for non-vax. 273 #endif 274 nipqb->np_bvplvl = 1; 275 nipqb->np_vfqb = (u_int32_t)fqb; 276 nipqb->np_vbdt = (u_int32_t)bbd; 277 nipqb->np_nbdr = NBDESCS; 278 279 /* Free queue block */ 280 nipqb->np_freeq = NQUEUES; 281 fqb->nf_mlen = PKTHDR+MSGADD; 282 fqb->nf_dlen = PKTHDR+TXADD; 283 fqb->nf_rlen = PKTHDR+RXADD; 284 285 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 286 ifp->if_softc = sc; 287 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 288 ifp->if_start = nistart; 289 ifp->if_ioctl = niioctl; 290 ifp->if_watchdog = nitimeout; 291 IFQ_SET_READY(&ifp->if_snd); 292 293 /* 294 * Start init sequence. 295 */ 296 297 /* Reset the node */ 298 NI_WREG(BIREG_VAXBICSR, NI_RREG(BIREG_VAXBICSR) | BICSR_NRST); 299 DELAY(500000); 300 i = 20; 301 while ((NI_RREG(BIREG_VAXBICSR) & BICSR_BROKE) && --i) 302 DELAY(500000); 303 if (i == 0) { 304 printf("%s: BROKE bit set after reset\n", sc->sc_dev.dv_xname); 305 return; 306 } 307 308 /* Check state */ 309 if (failtest(sc, NI_PSR, PSR_STATE, PSR_UNDEF, "not undefined state")) 310 return; 311 312 /* Clear owner bits */ 313 NI_WREG(NI_PSR, NI_RREG(NI_PSR) & ~PSR_OWN); 314 NI_WREG(NI_PCR, NI_RREG(NI_PCR) & ~PCR_OWN); 315 316 /* kick off init */ 317 NI_WREG(NI_PCR, (u_int32_t)sc->sc_pgvppqb | PCR_INIT | PCR_OWN); 318 while (NI_RREG(NI_PCR) & PCR_OWN) 319 DELAY(100000); 320 321 /* Check state */ 322 if (failtest(sc, NI_PSR, PSR_INITED, PSR_INITED, "failed initialize")) 323 return; 324 325 NI_WREG(NI_PSR, NI_RREG(NI_PSR) & ~PSR_OWN); 326 327 WAITREG(NI_PCR, PCR_OWN); 328 NI_WREG(NI_PCR, PCR_OWN|PCR_ENABLE); 329 WAITREG(NI_PCR, PCR_OWN); 330 WAITREG(NI_PSR, PSR_OWN); 331 332 /* Check state */ 333 if (failtest(sc, NI_PSR, PSR_STATE, PSR_ENABLED, "failed enable")) 334 return; 335 336 NI_WREG(NI_PSR, NI_RREG(NI_PSR) & ~PSR_OWN); 337 338 /* 339 * The message queue packets must be located on the beginning 340 * of a page. A VAX page is 512 bytes, but it clusters 8 pages. 341 * This knowledge is used here when allocating pages. 342 * !!! How should this be done on MIPS and Alpha??? !!! 343 */ 344 #if NBPG < 4096 345 #error pagesize too small 346 #endif 347 s = splvm(); 348 /* Set up message free queue */ 349 ni_getpgs(sc, NMSGBUF * 512, &va, 0); 350 for (i = 0; i < NMSGBUF; i++) { 351 struct ni_msg *msg; 352 353 msg = (void *)(va + i * 512); 354 355 res = INSQTI(msg, &fqb->nf_mforw); 356 } 357 WAITREG(NI_PCR, PCR_OWN); 358 NI_WREG(NI_PCR, PCR_FREEQNE|PCR_MFREEQ|PCR_OWN); 359 WAITREG(NI_PCR, PCR_OWN); 360 361 /* Set up xmit queue */ 362 ni_getpgs(sc, NTXBUF * 512, &va, 0); 363 for (i = 0; i < NTXBUF; i++) { 364 struct ni_dg *data; 365 366 data = (void *)(va + i * 512); 367 data->nd_status = 0; 368 data->nd_len = TXADD; 369 data->nd_ptdbidx = 1; 370 data->nd_opcode = BVP_DGRAM; 371 for (j = 0; j < NTXFRAGS; j++) { 372 data->bufs[j]._offset = 0; 373 data->bufs[j]._key = 1; 374 bbd[i * NTXFRAGS + j].nb_key = 1; 375 bbd[i * NTXFRAGS + j].nb_status = 0; 376 data->bufs[j]._index = i * NTXFRAGS + j; 377 } 378 res = INSQTI(data, &fqb->nf_dforw); 379 } 380 WAITREG(NI_PCR, PCR_OWN); 381 NI_WREG(NI_PCR, PCR_FREEQNE|PCR_DFREEQ|PCR_OWN); 382 WAITREG(NI_PCR, PCR_OWN); 383 384 /* recv buffers */ 385 ni_getpgs(sc, NRXBUF * 512, &va, 0); 386 for (i = 0; i < NRXBUF; i++) { 387 struct ni_dg *data; 388 int idx; 389 390 data = (void *)(va + i * 512); 391 data->nd_len = RXADD; 392 data->nd_opcode = BVP_DGRAMRX; 393 data->nd_ptdbidx = 2; 394 data->bufs[0]._key = 1; 395 396 idx = NTXBUF * NTXFRAGS + i; 397 if (ni_add_rxbuf(sc, data, idx)) 398 panic("niattach: ni_add_rxbuf: out of mbufs"); 399 400 res = INSQTI(data, &fqb->nf_rforw); 401 } 402 WAITREG(NI_PCR, PCR_OWN); 403 NI_WREG(NI_PCR, PCR_FREEQNE|PCR_RFREEQ|PCR_OWN); 404 WAITREG(NI_PCR, PCR_OWN); 405 406 splx(s); 407 408 /* Set initial parameters */ 409 msg = REMQHI(&fqb->nf_mforw); 410 411 msg->nm_opcode = BVP_MSG; 412 msg->nm_status = 0; 413 msg->nm_len = sizeof(struct ni_param) + 6; 414 msg->nm_opcode2 = NI_WPARAM; 415 ((struct ni_param *)&msg->nm_text[0])->np_flags = NP_PAD; 416 417 endwait = retry = 0; 418 res = INSQTI(msg, &gvp->nc_forw0); 419 420 retry: WAITREG(NI_PCR, PCR_OWN); 421 NI_WREG(NI_PCR, PCR_CMDQNE|PCR_CMDQ0|PCR_OWN); 422 WAITREG(NI_PCR, PCR_OWN); 423 i = 1000; 424 while (endwait == 0 && --i) 425 DELAY(10000); 426 427 if (endwait == 0) { 428 if (++retry < 3) 429 goto retry; 430 printf("%s: no response to set params\n", sc->sc_dev.dv_xname); 431 return; 432 } 433 434 /* Clear counters */ 435 msg = REMQHI(&fqb->nf_mforw); 436 msg->nm_opcode = BVP_MSG; 437 msg->nm_status = 0; 438 msg->nm_len = sizeof(struct ni_param) + 6; 439 msg->nm_opcode2 = NI_RCCNTR; 440 441 res = INSQTI(msg, &gvp->nc_forw0); 442 443 WAITREG(NI_PCR, PCR_OWN); 444 NI_WREG(NI_PCR, PCR_CMDQNE|PCR_CMDQ0|PCR_OWN); 445 WAITREG(NI_PCR, PCR_OWN); 446 447 /* Enable transmit logic */ 448 msg = REMQHI(&fqb->nf_mforw); 449 450 msg->nm_opcode = BVP_MSG; 451 msg->nm_status = 0; 452 msg->nm_len = 18; 453 msg->nm_opcode2 = NI_STPTDB; 454 ptdb = (struct ni_ptdb *)&msg->nm_text[0]; 455 bzero(ptdb, sizeof(struct ni_ptdb)); 456 ptdb->np_index = 1; 457 ptdb->np_fque = 1; 458 459 res = INSQTI(msg, &gvp->nc_forw0); 460 461 WAITREG(NI_PCR, PCR_OWN); 462 NI_WREG(NI_PCR, PCR_CMDQNE|PCR_CMDQ0|PCR_OWN); 463 WAITREG(NI_PCR, PCR_OWN); 464 465 /* Wait for everything to finish */ 466 WAITREG(NI_PSR, PSR_OWN); 467 468 printf("%s: hardware address %s\n", sc->sc_dev.dv_xname, 469 ether_sprintf(sc->sc_enaddr)); 470 471 /* 472 * Attach the interface. 473 */ 474 if_attach(ifp); 475 ether_ifattach(ifp, sc->sc_enaddr); 476 if (shutdownhook_establish(ni_shutdown, sc) == 0) 477 printf("%s: WARNING: unable to establish shutdown hook\n", 478 sc->sc_dev.dv_xname); 479 } 480 481 /* 482 * Initialization of interface. 483 */ 484 void 485 niinit(sc) 486 struct ni_softc *sc; 487 { 488 struct ifnet *ifp = (struct ifnet *)&sc->sc_if; 489 490 /* 491 * Set flags (so ni_setup() do the right thing). 492 */ 493 ifp->if_flags |= IFF_RUNNING; 494 ifp->if_flags &= ~IFF_OACTIVE; 495 496 /* 497 * Send setup messages so that the rx/tx locic starts. 498 */ 499 ni_setup(sc); 500 501 } 502 503 /* 504 * Start output on interface. 505 */ 506 void 507 nistart(ifp) 508 struct ifnet *ifp; 509 { 510 struct ni_softc *sc = ifp->if_softc; 511 struct ni_dg *data; 512 struct ni_bbd *bdp; 513 struct mbuf *m, *m0; 514 int i, cnt, res, mlen; 515 516 if (ifp->if_flags & IFF_OACTIVE) 517 return; 518 #ifdef DEBUG 519 if (ifp->if_flags & IFF_DEBUG) 520 printf("%s: nistart\n", sc->sc_dev.dv_xname); 521 #endif 522 523 while (fqb->nf_dforw) { 524 IFQ_POLL(&ifp->if_snd, m); 525 if (m == 0) 526 break; 527 528 data = REMQHI(&fqb->nf_dforw); 529 if ((int)data == Q_EMPTY) { 530 ifp->if_flags |= IFF_OACTIVE; 531 break; 532 } 533 534 IFQ_DEQUEUE(&ifp->if_snd, m); 535 536 /* 537 * Count number of mbufs in chain. 538 * Always do DMA directly from mbufs, therefore the transmit 539 * ring is really big. 540 */ 541 for (m0 = m, cnt = 0; m0; m0 = m0->m_next) 542 if (m0->m_len) 543 cnt++; 544 if (cnt > NTXFRAGS) 545 panic("nistart"); /* XXX */ 546 547 #if NBPFILTER > 0 548 if (ifp->if_bpf) 549 bpf_mtap(ifp->if_bpf, m); 550 #endif 551 bdp = &bbd[(data->bufs[0]._index & 0x7fff)]; 552 for (m0 = m, i = 0, mlen = 0; m0; m0 = m0->m_next) { 553 if (m0->m_len == 0) 554 continue; 555 bdp->nb_status = (mtod(m0, u_int32_t) & NIBD_OFFSET) | 556 NIBD_VALID; 557 bdp->nb_pte = (u_int32_t)kvtopte(mtod(m0, void *)); 558 bdp->nb_len = m0->m_len; 559 data->bufs[i]._offset = 0; 560 data->bufs[i]._len = bdp->nb_len; 561 data->bufs[i]._index |= NIDG_CHAIN; 562 mlen += bdp->nb_len; 563 bdp++; 564 i++; 565 } 566 data->nd_opcode = BVP_DGRAM; 567 data->nd_pad3 = 1; 568 data->nd_ptdbidx = 1; 569 data->nd_len = 10 + i * 8; 570 data->bufs[i - 1]._index &= ~NIDG_CHAIN; 571 if (mlen < 64) 572 data->bufs[i - 1]._len = bdp[-1].nb_len += (64 - mlen); 573 data->nd_cmdref = (u_int32_t)m; 574 #ifdef DEBUG 575 if (ifp->if_flags & IFF_DEBUG) 576 printf("%s: sending %d bytes (%d segments)\n", 577 sc->sc_dev.dv_xname, mlen, i); 578 #endif 579 580 res = INSQTI(data, &gvp->nc_forw0); 581 if (res == Q_EMPTY) { 582 WAITREG(NI_PCR, PCR_OWN); 583 NI_WREG(NI_PCR, PCR_CMDQNE|PCR_CMDQ0|PCR_OWN); 584 } 585 } 586 } 587 588 void 589 niintr(void *arg) 590 { 591 struct ni_softc *sc = arg; 592 struct ni_dg *data; 593 struct ni_msg *msg; 594 struct ifnet *ifp = &sc->sc_if; 595 struct ni_bbd *bd; 596 struct mbuf *m; 597 int idx, res; 598 599 if ((NI_RREG(NI_PSR) & PSR_STATE) != PSR_ENABLED) 600 return; 601 602 if ((NI_RREG(NI_PSR) & PSR_ERR)) 603 printf("%s: PSR %x\n", sc->sc_dev.dv_xname, NI_RREG(NI_PSR)); 604 605 /* Got any response packets? */ 606 while ((NI_RREG(NI_PSR) & PSR_RSQ) && (data = REMQHI(&gvp->nc_forwr))) { 607 608 switch (data->nd_opcode) { 609 case BVP_DGRAMRX: /* Receive datagram */ 610 idx = data->bufs[0]._index; 611 bd = &bbd[idx]; 612 m = (void *)data->nd_cmdref; 613 m->m_pkthdr.len = m->m_len = data->bufs[0]._len; 614 m->m_pkthdr.rcvif = ifp; 615 if (ni_add_rxbuf(sc, data, idx)) { 616 bd->nb_len = (m->m_ext.ext_size - 2); 617 bd->nb_pte = 618 (long)kvtopte(m->m_ext.ext_buf); 619 bd->nb_status = 2 | NIBD_VALID; 620 bd->nb_key = 1; 621 } 622 data->nd_len = RXADD; 623 data->nd_status = 0; 624 res = INSQTI(data, &fqb->nf_rforw); 625 if (res == Q_EMPTY) { 626 WAITREG(NI_PCR, PCR_OWN); 627 NI_WREG(NI_PCR, PCR_FREEQNE|PCR_RFREEQ|PCR_OWN); 628 } 629 if (m == (void *)data->nd_cmdref) 630 break; /* Out of mbufs */ 631 632 #if NBPFILTER > 0 633 if (ifp->if_bpf) 634 bpf_mtap(ifp->if_bpf, m); 635 #endif 636 (*ifp->if_input)(ifp, m); 637 break; 638 639 case BVP_DGRAM: 640 m = (struct mbuf *)data->nd_cmdref; 641 ifp->if_flags &= ~IFF_OACTIVE; 642 m_freem(m); 643 res = INSQTI(data, &fqb->nf_dforw); 644 if (res == Q_EMPTY) { 645 WAITREG(NI_PCR, PCR_OWN); 646 NI_WREG(NI_PCR, PCR_FREEQNE|PCR_DFREEQ|PCR_OWN); 647 } 648 break; 649 650 case BVP_MSGRX: 651 msg = (struct ni_msg *)data; 652 switch (msg->nm_opcode2) { 653 case NI_WPARAM: 654 bcopy(((struct ni_param *)&msg->nm_text[0])->np_dpa, sc->sc_enaddr, ETHER_ADDR_LEN); 655 endwait = 1; 656 break; 657 658 case NI_RCCNTR: 659 case NI_CLPTDB: 660 case NI_STPTDB: 661 break; 662 663 default: 664 printf("Unkn resp %d\n", 665 msg->nm_opcode2); 666 break; 667 } 668 res = INSQTI(data, &fqb->nf_mforw); 669 if (res == Q_EMPTY) { 670 WAITREG(NI_PCR, PCR_OWN); 671 NI_WREG(NI_PCR, PCR_FREEQNE|PCR_MFREEQ|PCR_OWN); 672 } 673 break; 674 675 default: 676 printf("Unknown opcode %d\n", data->nd_opcode); 677 res = INSQTI(data, &fqb->nf_mforw); 678 if (res == Q_EMPTY) { 679 WAITREG(NI_PCR, PCR_OWN); 680 NI_WREG(NI_PCR, PCR_FREEQNE|PCR_MFREEQ|PCR_OWN); 681 } 682 } 683 } 684 685 /* Try to kick on the start routine again */ 686 nistart(ifp); 687 688 NI_WREG(NI_PSR, NI_RREG(NI_PSR) & ~(PSR_OWN|PSR_RSQ)); 689 } 690 691 /* 692 * Process an ioctl request. 693 */ 694 int 695 niioctl(ifp, cmd, data) 696 register struct ifnet *ifp; 697 u_long cmd; 698 caddr_t data; 699 { 700 struct ni_softc *sc = ifp->if_softc; 701 struct ifreq *ifr = (struct ifreq *)data; 702 struct ifaddr *ifa = (struct ifaddr *)data; 703 int s = splnet(), error = 0; 704 705 switch (cmd) { 706 707 case SIOCSIFADDR: 708 ifp->if_flags |= IFF_UP; 709 switch(ifa->ifa_addr->sa_family) { 710 #ifdef INET 711 case AF_INET: 712 niinit(sc); 713 arp_ifinit(ifp, ifa); 714 break; 715 #endif 716 } 717 break; 718 719 case SIOCSIFFLAGS: 720 if ((ifp->if_flags & IFF_UP) == 0 && 721 (ifp->if_flags & IFF_RUNNING) != 0) { 722 /* 723 * If interface is marked down and it is running, 724 * stop it. 725 */ 726 ifp->if_flags &= ~IFF_RUNNING; 727 ni_setup(sc); 728 } else if ((ifp->if_flags & IFF_UP) != 0 && 729 (ifp->if_flags & IFF_RUNNING) == 0) { 730 /* 731 * If interface it marked up and it is stopped, then 732 * start it. 733 */ 734 niinit(sc); 735 } else if ((ifp->if_flags & IFF_UP) != 0) { 736 /* 737 * Send a new setup packet to match any new changes. 738 * (Like IFF_PROMISC etc) 739 */ 740 ni_setup(sc); 741 } 742 break; 743 744 case SIOCADDMULTI: 745 case SIOCDELMULTI: 746 /* 747 * Update our multicast list. 748 */ 749 error = (cmd == SIOCADDMULTI) ? 750 ether_addmulti(ifr, &sc->sc_ec): 751 ether_delmulti(ifr, &sc->sc_ec); 752 753 if (error == ENETRESET) { 754 /* 755 * Multicast list has changed; set the hardware filter 756 * accordingly. 757 */ 758 ni_setup(sc); 759 error = 0; 760 } 761 break; 762 763 default: 764 error = EINVAL; 765 766 } 767 splx(s); 768 return (error); 769 } 770 771 /* 772 * Add a receive buffer to the indicated descriptor. 773 */ 774 int 775 ni_add_rxbuf(struct ni_softc *sc, struct ni_dg *data, int idx) 776 { 777 struct ni_bbd *bd = &bbd[idx]; 778 struct mbuf *m; 779 780 MGETHDR(m, M_DONTWAIT, MT_DATA); 781 if (m == NULL) 782 return (ENOBUFS); 783 784 MCLGET(m, M_DONTWAIT); 785 if ((m->m_flags & M_EXT) == 0) { 786 m_freem(m); 787 return (ENOBUFS); 788 } 789 790 m->m_data += 2; 791 bd->nb_len = (m->m_ext.ext_size - 2); 792 bd->nb_pte = (long)kvtopte(m->m_ext.ext_buf); 793 bd->nb_status = 2 | NIBD_VALID; 794 bd->nb_key = 1; 795 796 data->bufs[0]._offset = 0; 797 data->bufs[0]._len = bd->nb_len; 798 data->bufs[0]._index = idx; 799 data->nd_cmdref = (long)m; 800 801 return (0); 802 } 803 804 /* 805 * Create setup packet and put in queue for sending. 806 */ 807 void 808 ni_setup(struct ni_softc *sc) 809 { 810 struct ifnet *ifp = &sc->sc_if; 811 struct ni_msg *msg; 812 struct ni_ptdb *ptdb; 813 struct ether_multi *enm; 814 struct ether_multistep step; 815 int i, res; 816 817 msg = REMQHI(&fqb->nf_mforw); 818 if ((int)msg == Q_EMPTY) 819 return; /* What to do? */ 820 821 ptdb = (struct ni_ptdb *)&msg->nm_text[0]; 822 bzero(ptdb, sizeof(struct ni_ptdb)); 823 824 msg->nm_opcode = BVP_MSG; 825 msg->nm_len = 18; 826 ptdb->np_index = 2; /* definition type index */ 827 ptdb->np_fque = 2; /* Free queue */ 828 if (ifp->if_flags & IFF_RUNNING) { 829 msg->nm_opcode2 = NI_STPTDB; 830 ptdb->np_type = ETHERTYPE_IP; 831 ptdb->np_flags = PTDB_UNKN|PTDB_BDC; 832 if (ifp->if_flags & IFF_PROMISC) 833 ptdb->np_flags |= PTDB_PROMISC; 834 memset(ptdb->np_mcast[0], 0xff, ETHER_ADDR_LEN); /* Broadcast */ 835 ptdb->np_adrlen = 1; 836 msg->nm_len += 8; 837 ifp->if_flags &= ~IFF_ALLMULTI; 838 if ((ifp->if_flags & IFF_PROMISC) == 0) { 839 ETHER_FIRST_MULTI(step, &sc->sc_ec, enm); 840 i = 1; 841 while (enm != NULL) { 842 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6)) { 843 ifp->if_flags |= IFF_ALLMULTI; 844 ptdb->np_flags |= PTDB_AMC; 845 break; 846 } 847 msg->nm_len += 8; 848 ptdb->np_adrlen++; 849 bcopy(enm->enm_addrlo, ptdb->np_mcast[i++], 850 ETHER_ADDR_LEN); 851 ETHER_NEXT_MULTI(step, enm); 852 } 853 } 854 } else 855 msg->nm_opcode2 = NI_CLPTDB; 856 857 res = INSQTI(msg, &gvp->nc_forw0); 858 if (res == Q_EMPTY) { 859 WAITREG(NI_PCR, PCR_OWN); 860 NI_WREG(NI_PCR, PCR_CMDQNE|PCR_CMDQ0|PCR_OWN); 861 } 862 } 863 864 /* 865 * Check for dead transmit logic. Not uncommon. 866 */ 867 void 868 nitimeout(ifp) 869 struct ifnet *ifp; 870 { 871 #if 0 872 struct ni_softc *sc = ifp->if_softc; 873 874 if (sc->sc_inq == 0) 875 return; 876 877 printf("%s: xmit logic died, resetting...\n", sc->sc_dev.dv_xname); 878 /* 879 * Do a reset of interface, to get it going again. 880 * Will it work by just restart the transmit logic? 881 */ 882 niinit(sc); 883 #endif 884 } 885 886 /* 887 * Shutdown hook. Make sure the interface is stopped at reboot. 888 */ 889 void 890 ni_shutdown(arg) 891 void *arg; 892 { 893 struct ni_softc *sc = arg; 894 895 WAITREG(NI_PCR, PCR_OWN); 896 NI_WREG(NI_PCR, PCR_OWN|PCR_SHUTDOWN); 897 WAITREG(NI_PCR, PCR_OWN); 898 WAITREG(NI_PSR, PSR_OWN); 899 900 } 901 902
Indexes created Fri Oct 17 03:10:13 GMT 2025