if_cemacvar.h revision 1.7 1 /* $NetBSD: if_cemacvar.h,v 1.7 2024/10/15 00:58:15 lloyd Exp $ */
2 /*-
3 * Copyright (c) 2015 Genetec Corporation. All rights reserved.
4 * Written by Hashimoto Kenichi for Genetec Corporation.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
16 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
17 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
18 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
19 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 #ifndef _IF_CEMACVAR_H_
29 #define _IF_CEMACVAR_H_
30
31 #include <net/if.h>
32 #include <net/if_media.h>
33 #include <net/if_ether.h>
34 #include <net/if_media.h>
35
36 #include <dev/mii/miivar.h>
37
38 #define RX_QLEN 64
39 #define TX_QLEN 2 /* I'm very sorry but that's where we can get */
40
41 struct cemac_qmeta {
42 struct mbuf *m;
43 bus_dmamap_t m_dmamap;
44 };
45
46 struct cemac_softc {
47 device_t sc_dev;
48 bus_space_tag_t sc_iot;
49 bus_space_handle_t sc_ioh;
50 bus_dma_tag_t sc_dmat;
51 uint8_t sc_enaddr[ETHER_ADDR_LEN];
52 struct ethercom sc_ethercom;
53 mii_data_t sc_mii;
54 int sc_phyno;
55
56 void *rbqpage;
57 unsigned rbqlen;
58 bus_addr_t rbqpage_dsaddr;
59 bus_dmamap_t rbqpage_dmamap;
60 void *tbqpage;
61 unsigned tbqlen;
62 bus_addr_t tbqpage_dsaddr;
63 bus_dmamap_t tbqpage_dmamap;
64
65 volatile struct eth_dsc *RDSC;
66 int rxqi;
67 struct cemac_qmeta rxq[RX_QLEN];
68 volatile struct eth_dsc *TDSC;
69 int txqi, txqc;
70 struct cemac_qmeta txq[TX_QLEN];
71 callout_t cemac_tick_ch;
72
73 unsigned cemac_flags;
74 #define CEMAC_FLAG_GEM __BIT(0)
75
76 kmutex_t *sc_mcast_lock; /* m: lock for SIOCADD/DELMULTI */
77 kmutex_t *sc_intr_lock; /* i: lock for interrupt operations */
78
79 u_short sc_if_flags; /* m: if_flags cache */
80 time_t sc_tx_lastsent; /* i: time of last tx */
81 bool sc_txbusy; /* i: no Tx because down or busy */
82 bool sc_stopping; /* i: ignore intr because down */
83 bool sc_tx_sending; /* i: expecting tx complete irq */
84 bool sc_trigger_reset; /* i */
85
86 struct workqueue *sc_reset_wq;
87 struct work sc_reset_work; /* i */
88 volatile unsigned sc_reset_pending;
89 };
90
91 int cemac_intr(void *);
92
93 void cemac_attach_common(struct cemac_softc *);
94
95
96 #endif /* _IF_CEMACVAR_H_ */
97