adv_cardbus.c revision 1.16
1/* $NetBSD: adv_cardbus.c,v 1.16 2007/10/19 11:59:37 ad Exp $ */ 2 3/*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40/* 41 * this file was brought from ahc_cardbus.c and adv_pci.c 42 * and modified by YAMAMOTO Takashi. 43 */ 44 45#include <sys/cdefs.h> 46__KERNEL_RCSID(0, "$NetBSD: adv_cardbus.c,v 1.16 2007/10/19 11:59:37 ad Exp $"); 47 48#include <sys/param.h> 49#include <sys/systm.h> 50#include <sys/malloc.h> 51#include <sys/kernel.h> 52#include <sys/queue.h> 53#include <sys/device.h> 54 55#include <sys/bus.h> 56#include <sys/intr.h> 57 58#include <dev/scsipi/scsi_all.h> 59#include <dev/scsipi/scsipi_all.h> 60#include <dev/scsipi/scsiconf.h> 61 62#include <dev/pci/pcireg.h> 63#include <dev/pci/pcidevs.h> 64 65#include <dev/cardbus/cardbusvar.h> 66#include <dev/pci/pcidevs.h> 67 68#include <dev/ic/advlib.h> 69#include <dev/ic/adv.h> 70 71#define ADV_CARDBUS_IOBA CARDBUS_BASE0_REG 72#define ADV_CARDBUS_MMBA CARDBUS_BASE1_REG 73 74#define ADV_CARDBUS_DEBUG 75#define ADV_CARDBUS_ALLOW_MEMIO 76 77#define DEVNAME(sc) sc->sc_dev.dv_xname 78 79struct adv_cardbus_softc { 80 struct asc_softc sc_adv; /* real ADV */ 81 82 /* CardBus-specific goo. */ 83 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 84 int sc_intrline; /* our interrupt line */ 85 cardbustag_t sc_tag; 86 87 int sc_cbenable; /* what CardBus access type to enable */ 88 int sc_csr; /* CSR bits */ 89 bus_size_t sc_size; 90}; 91 92int adv_cardbus_match(struct device *, struct cfdata *, void *); 93void adv_cardbus_attach(struct device *, struct device *, void *); 94int adv_cardbus_detach(struct device *, int); 95 96CFATTACH_DECL(adv_cardbus, sizeof(struct adv_cardbus_softc), 97 adv_cardbus_match, adv_cardbus_attach, adv_cardbus_detach, NULL); 98 99int 100adv_cardbus_match(struct device *parent, struct cfdata *match, 101 void *aux) 102{ 103 struct cardbus_attach_args *ca = aux; 104 105 if (CARDBUS_VENDOR(ca->ca_id) == PCI_VENDOR_ADVSYS && 106 CARDBUS_PRODUCT(ca->ca_id) == PCI_PRODUCT_ADVSYS_ULTRA) 107 return (1); 108 109 return (0); 110} 111 112void 113adv_cardbus_attach(struct device *parent, struct device *self, 114 void *aux) 115{ 116 struct cardbus_attach_args *ca = aux; 117 struct adv_cardbus_softc *csc = device_private(self); 118 struct asc_softc *sc = &csc->sc_adv; 119 cardbus_devfunc_t ct = ca->ca_ct; 120 cardbus_chipset_tag_t cc = ct->ct_cc; 121 cardbus_function_tag_t cf = ct->ct_cf; 122 bus_space_tag_t iot; 123 bus_space_handle_t ioh; 124 pcireg_t reg; 125 u_int8_t latency = 0x20; 126 127 sc->sc_flags = 0; 128 129 if (PCI_VENDOR(ca->ca_id) == PCI_VENDOR_ADVSYS) { 130 switch (PCI_PRODUCT(ca->ca_id)) { 131 case PCI_PRODUCT_ADVSYS_1200A: 132 printf(": AdvanSys ASC1200A SCSI adapter\n"); 133 latency = 0; 134 break; 135 136 case PCI_PRODUCT_ADVSYS_1200B: 137 printf(": AdvanSys ASC1200B SCSI adapter\n"); 138 latency = 0; 139 break; 140 141 case PCI_PRODUCT_ADVSYS_ULTRA: 142 switch (PCI_REVISION(ca->ca_class)) { 143 case ASC_PCI_REVISION_3050: 144 printf(": AdvanSys ABP-9xxUA SCSI adapter\n"); 145 break; 146 147 case ASC_PCI_REVISION_3150: 148 printf(": AdvanSys ABP-9xxU SCSI adapter\n"); 149 break; 150 } 151 break; 152 153 default: 154 printf(": unknown model!\n"); 155 return; 156 } 157 } 158 159 csc->sc_ct = ct; 160 csc->sc_tag = ca->ca_tag; 161 csc->sc_intrline = ca->ca_intrline; 162 csc->sc_cbenable = 0; 163 164 /* 165 * Map the device. 166 */ 167 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE; 168 169#ifdef ADV_CARDBUS_ALLOW_MEMIO 170 if (Cardbus_mapreg_map(csc->sc_ct, ADV_CARDBUS_MMBA, 171 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 172 &iot, &ioh, NULL, &csc->sc_size) == 0) { 173#ifdef ADV_CARDBUS_DEBUG 174 printf("%s: memio enabled\n", DEVNAME(sc)); 175#endif 176 csc->sc_cbenable = CARDBUS_MEM_ENABLE; 177 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE; 178 } else 179#endif 180 if (Cardbus_mapreg_map(csc->sc_ct, ADV_CARDBUS_IOBA, 181 PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, NULL, &csc->sc_size) == 0) { 182#ifdef ADV_CARDBUS_DEBUG 183 printf("%s: io enabled\n", DEVNAME(sc)); 184#endif 185 csc->sc_cbenable = CARDBUS_IO_ENABLE; 186 csc->sc_csr |= PCI_COMMAND_IO_ENABLE; 187 } else { 188 printf("%s: unable to map device registers\n", 189 DEVNAME(sc)); 190 return; 191 } 192 193 /* Make sure the right access type is on the CardBus bridge. */ 194 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cbenable); 195 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 196 197 /* Enable the appropriate bits in the PCI CSR. */ 198 reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG); 199 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 200 reg |= csc->sc_csr; 201 cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg); 202 203 /* 204 * Make sure the latency timer is set to some reasonable 205 * value. 206 */ 207 reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG); 208 if (PCI_LATTIMER(reg) < latency) { 209 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 210 reg |= (latency << PCI_LATTIMER_SHIFT); 211 cardbus_conf_write(cc, cf, ca->ca_tag, PCI_BHLC_REG, reg); 212 } 213 214 ASC_SET_CHIP_CONTROL(iot, ioh, ASC_CC_HALT); 215 ASC_SET_CHIP_STATUS(iot, ioh, 0); 216 217 sc->sc_iot = iot; 218 sc->sc_ioh = ioh; 219 sc->sc_dmat = ca->ca_dmat; 220 sc->pci_device_id = ca->ca_id; 221 sc->bus_type = ASC_IS_PCI; 222 sc->chip_version = ASC_GET_CHIP_VER_NO(iot, ioh); 223 224 /* 225 * Initialize the board 226 */ 227 if (adv_init(sc)) { 228 printf("adv_init failed\n"); 229 return; 230 } 231 232 /* 233 * Establish the interrupt. 234 */ 235 sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_BIO, 236 adv_intr, sc); 237 if (sc->sc_ih == NULL) { 238 printf("%s: unable to establish interrupt at %d\n", 239 DEVNAME(sc), ca->ca_intrline); 240 return; 241 } 242 printf("%s: interrupting at %d\n", DEVNAME(sc), ca->ca_intrline); 243 244 /* 245 * Attach. 246 */ 247 adv_attach(sc); 248} 249 250int 251adv_cardbus_detach(self, flags) 252 struct device *self; 253 int flags; 254{ 255 struct adv_cardbus_softc *csc = device_private(self); 256 struct asc_softc *sc = &csc->sc_adv; 257 258 int rv; 259 260 rv = adv_detach(sc, flags); 261 if (rv) 262 return rv; 263 264 if (sc->sc_ih) { 265 cardbus_intr_disestablish(csc->sc_ct->ct_cc, 266 csc->sc_ct->ct_cf, sc->sc_ih); 267 sc->sc_ih = 0; 268 } 269 270 if (csc->sc_cbenable) { 271#ifdef ADV_CARDBUS_ALLOW_MEMIO 272 if (csc->sc_cbenable == CARDBUS_MEM_ENABLE) { 273 Cardbus_mapreg_unmap(csc->sc_ct, ADV_CARDBUS_MMBA, 274 sc->sc_iot, sc->sc_ioh, csc->sc_size); 275 } else { 276#endif 277 Cardbus_mapreg_unmap(csc->sc_ct, ADV_CARDBUS_IOBA, 278 sc->sc_iot, sc->sc_ioh, csc->sc_size); 279#ifdef ADV_CARDBUS_ALLOW_MEMIO 280 } 281#endif 282 csc->sc_cbenable = 0; 283 } 284 285 return 0; 286} 287