adv_cardbus.c revision 1.19 
1/*	$NetBSD: adv_cardbus.c,v 1.19 2008/06/24 19:44:52 drochner Exp $	*/
2
3/*-
4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33/*
34 * this file was brought from ahc_cardbus.c and adv_pci.c
35 * and modified by YAMAMOTO Takashi.
36 */
37
38#include <sys/cdefs.h>
39__KERNEL_RCSID(0, "$NetBSD: adv_cardbus.c,v 1.19 2008/06/24 19:44:52 drochner Exp $");
40
41#include <sys/param.h>
42#include <sys/systm.h>
43#include <sys/malloc.h>
44#include <sys/kernel.h>
45#include <sys/queue.h>
46#include <sys/device.h>
47
48#include <sys/bus.h>
49#include <sys/intr.h>
50
51#include <dev/scsipi/scsi_all.h>
52#include <dev/scsipi/scsipi_all.h>
53#include <dev/scsipi/scsiconf.h>
54
55#include <dev/pci/pcireg.h>
56#include <dev/pci/pcidevs.h>
57
58#include <dev/cardbus/cardbusvar.h>
59#include <dev/pci/pcidevs.h>
60
61#include <dev/ic/advlib.h>
62#include <dev/ic/adv.h>
63
64#define ADV_CARDBUS_IOBA CARDBUS_BASE0_REG
65#define ADV_CARDBUS_MMBA CARDBUS_BASE1_REG
66
67#define ADV_CARDBUS_DEBUG
68#define ADV_CARDBUS_ALLOW_MEMIO
69
70#define DEVNAME(sc) device_xname(&(sc)->sc_dev)
71
72struct adv_cardbus_softc {
73	struct asc_softc sc_adv;	/* real ADV */
74
75	/* CardBus-specific goo. */
76	cardbus_devfunc_t sc_ct;	/* our CardBus devfuncs */
77	cardbus_intr_line_t sc_intrline; /* our interrupt line */
78	cardbustag_t sc_tag;
79
80	int	sc_cbenable;		/* what CardBus access type to enable */
81	int	sc_csr;			/* CSR bits */
82	bus_size_t sc_size;
83};
84
85int	adv_cardbus_match(struct device *, struct cfdata *, void *);
86void	adv_cardbus_attach(struct device *, struct device *, void *);
87int	adv_cardbus_detach(struct device *, int);
88
89CFATTACH_DECL(adv_cardbus, sizeof(struct adv_cardbus_softc),
90    adv_cardbus_match, adv_cardbus_attach, adv_cardbus_detach, NULL);
91
92int
93adv_cardbus_match(struct device *parent, struct cfdata *match,
94    void *aux)
95{
96	struct cardbus_attach_args *ca = aux;
97
98	if (CARDBUS_VENDOR(ca->ca_id) == PCI_VENDOR_ADVSYS &&
99	    CARDBUS_PRODUCT(ca->ca_id) == PCI_PRODUCT_ADVSYS_ULTRA)
100		return (1);
101
102	return (0);
103}
104
105void
106adv_cardbus_attach(struct device *parent, struct device *self,
107    void *aux)
108{
109	struct cardbus_attach_args *ca = aux;
110	struct adv_cardbus_softc *csc = device_private(self);
111	struct asc_softc *sc = &csc->sc_adv;
112	cardbus_devfunc_t ct = ca->ca_ct;
113	cardbus_chipset_tag_t cc = ct->ct_cc;
114	cardbus_function_tag_t cf = ct->ct_cf;
115	bus_space_tag_t iot;
116	bus_space_handle_t ioh;
117	pcireg_t reg;
118	u_int8_t latency = 0x20;
119
120	sc->sc_flags = 0;
121
122	if (PCI_VENDOR(ca->ca_id) == PCI_VENDOR_ADVSYS) {
123		switch (PCI_PRODUCT(ca->ca_id)) {
124		case PCI_PRODUCT_ADVSYS_1200A:
125			printf(": AdvanSys ASC1200A SCSI adapter\n");
126			latency = 0;
127			break;
128
129		case PCI_PRODUCT_ADVSYS_1200B:
130			printf(": AdvanSys ASC1200B SCSI adapter\n");
131			latency = 0;
132			break;
133
134		case PCI_PRODUCT_ADVSYS_ULTRA:
135			switch (PCI_REVISION(ca->ca_class)) {
136			case ASC_PCI_REVISION_3050:
137				printf(": AdvanSys ABP-9xxUA SCSI adapter\n");
138				break;
139
140			case ASC_PCI_REVISION_3150:
141				printf(": AdvanSys ABP-9xxU SCSI adapter\n");
142				break;
143			}
144			break;
145
146		default:
147			printf(": unknown model!\n");
148			return;
149		}
150	}
151
152	csc->sc_ct = ct;
153	csc->sc_tag = ca->ca_tag;
154	csc->sc_intrline = ca->ca_intrline;
155	csc->sc_cbenable = 0;
156
157	/*
158	 * Map the device.
159	 */
160	csc->sc_csr = PCI_COMMAND_MASTER_ENABLE;
161
162#ifdef ADV_CARDBUS_ALLOW_MEMIO
163	if (Cardbus_mapreg_map(csc->sc_ct, ADV_CARDBUS_MMBA,
164	    PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
165	    &iot, &ioh, NULL, &csc->sc_size) == 0) {
166#ifdef ADV_CARDBUS_DEBUG
167		printf("%s: memio enabled\n", DEVNAME(sc));
168#endif
169		csc->sc_cbenable = CARDBUS_MEM_ENABLE;
170		csc->sc_csr |= PCI_COMMAND_MEM_ENABLE;
171	} else
172#endif
173	if (Cardbus_mapreg_map(csc->sc_ct, ADV_CARDBUS_IOBA,
174	    PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, NULL, &csc->sc_size) == 0) {
175#ifdef ADV_CARDBUS_DEBUG
176		printf("%s: io enabled\n", DEVNAME(sc));
177#endif
178		csc->sc_cbenable = CARDBUS_IO_ENABLE;
179		csc->sc_csr |= PCI_COMMAND_IO_ENABLE;
180	} else {
181		aprint_error_dev(&sc->sc_dev, "unable to map device registers\n");
182		return;
183	}
184
185	/* Make sure the right access type is on the CardBus bridge. */
186	(*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cbenable);
187	(*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
188
189	/* Enable the appropriate bits in the PCI CSR. */
190	reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG);
191	reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
192	reg |= csc->sc_csr;
193	cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg);
194
195	/*
196	 * Make sure the latency timer is set to some reasonable
197	 * value.
198	 */
199	reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG);
200	if (PCI_LATTIMER(reg) < latency) {
201		reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
202		reg |= (latency << PCI_LATTIMER_SHIFT);
203		cardbus_conf_write(cc, cf, ca->ca_tag, PCI_BHLC_REG, reg);
204	}
205
206	ASC_SET_CHIP_CONTROL(iot, ioh, ASC_CC_HALT);
207	ASC_SET_CHIP_STATUS(iot, ioh, 0);
208
209	sc->sc_iot = iot;
210	sc->sc_ioh = ioh;
211	sc->sc_dmat = ca->ca_dmat;
212	sc->pci_device_id = ca->ca_id;
213	sc->bus_type = ASC_IS_PCI;
214	sc->chip_version = ASC_GET_CHIP_VER_NO(iot, ioh);
215
216	/*
217	 * Initialize the board
218	 */
219	if (adv_init(sc)) {
220		printf("adv_init failed\n");
221		return;
222	}
223
224	/*
225	 * Establish the interrupt.
226	 */
227	sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_BIO,
228	    adv_intr, sc);
229	if (sc->sc_ih == NULL) {
230		aprint_error_dev(&sc->sc_dev,
231				 "unable to establish interrupt\n");
232		return;
233	}
234
235	/*
236	 * Attach.
237	 */
238	adv_attach(sc);
239}
240
241int
242adv_cardbus_detach(self, flags)
243	struct device *self;
244	int flags;
245{
246	struct adv_cardbus_softc *csc = device_private(self);
247	struct asc_softc *sc = &csc->sc_adv;
248
249	int rv;
250
251	rv = adv_detach(sc, flags);
252	if (rv)
253		return rv;
254
255	if (sc->sc_ih) {
256		cardbus_intr_disestablish(csc->sc_ct->ct_cc,
257		    csc->sc_ct->ct_cf, sc->sc_ih);
258		sc->sc_ih = 0;
259	}
260
261	if (csc->sc_cbenable) {
262#ifdef ADV_CARDBUS_ALLOW_MEMIO
263		if (csc->sc_cbenable == CARDBUS_MEM_ENABLE) {
264			Cardbus_mapreg_unmap(csc->sc_ct, ADV_CARDBUS_MMBA,
265			    sc->sc_iot, sc->sc_ioh, csc->sc_size);
266		} else {
267#endif
268			Cardbus_mapreg_unmap(csc->sc_ct, ADV_CARDBUS_IOBA,
269			    sc->sc_iot, sc->sc_ioh, csc->sc_size);
270#ifdef ADV_CARDBUS_ALLOW_MEMIO
271		}
272#endif
273		csc->sc_cbenable = 0;
274	}
275
276	return 0;
277}
278