adv_cardbus.c revision 1.4 
1/*	$NetBSD: adv_cardbus.c,v 1.4 2001/09/29 02:16:21 yamt Exp $	*/
2
3/*-
4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 *    must display the following acknowledgement:
21 *	This product includes software developed by the NetBSD
22 *	Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 *    contributors may be used to endorse or promote products derived
25 *    from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40/*
41 * this file was brought from ahc_cardbus.c and adv_pci.c
42 * and modified by YAMAMOTO Takashi.
43 */
44
45#include <sys/param.h>
46#include <sys/systm.h>
47#include <sys/malloc.h>
48#include <sys/kernel.h>
49#include <sys/queue.h>
50#include <sys/device.h>
51
52#include <machine/bus.h>
53#include <machine/intr.h>
54
55#include <dev/scsipi/scsi_all.h>
56#include <dev/scsipi/scsipi_all.h>
57#include <dev/scsipi/scsiconf.h>
58
59#include <dev/pci/pcireg.h>
60#include <dev/pci/pcidevs.h>
61
62#include <dev/cardbus/cardbusvar.h>
63#include <dev/cardbus/cardbusdevs.h>
64
65#include <dev/ic/advlib.h>
66#include <dev/ic/adv.h>
67
68#define ADV_CARDBUS_IOBA CARDBUS_BASE0_REG
69#define ADV_CARDBUS_MMBA CARDBUS_BASE1_REG
70
71#define ADV_CARDBUS_DEBUG
72#define ADV_CARDBUS_ALLOW_MEMIO
73
74#define DEVNAME(sc) sc->sc_dev.dv_xname
75
76struct adv_cardbus_softc {
77	struct asc_softc sc_adv;	/* real ADV */
78
79	/* CardBus-specific goo. */
80	cardbus_devfunc_t sc_ct;	/* our CardBus devfuncs */
81	int	sc_intrline;		/* our interrupt line */
82	cardbustag_t sc_tag;
83
84	int	sc_cbenable;		/* what CardBus access type to enable */
85	int	sc_csr;			/* CSR bits */
86	bus_size_t sc_size;
87};
88
89int	adv_cardbus_match __P((struct device *, struct cfdata *, void *));
90void	adv_cardbus_attach __P((struct device *, struct device *, void *));
91int	adv_cardbus_detach __P((struct device *, int));
92
93struct cfattach adv_cardbus_ca = {
94	sizeof(struct adv_cardbus_softc), adv_cardbus_match, adv_cardbus_attach,
95	adv_cardbus_detach
96};
97
98int
99adv_cardbus_match(parent, match, aux)
100	struct device *parent;
101	struct cfdata *match;
102	void *aux;
103{
104	struct cardbus_attach_args *ca = aux;
105
106	if (CARDBUS_VENDOR(ca->ca_id) == CARDBUS_VENDOR_ADVSYS &&
107	    CARDBUS_PRODUCT(ca->ca_id) == CARDBUS_PRODUCT_ADVSYS_ULTRA)
108		return (1);
109
110	return (0);
111}
112
113void
114adv_cardbus_attach(parent, self, aux)
115	struct device *parent, *self;
116	void *aux;
117{
118	struct cardbus_attach_args *ca = aux;
119	struct adv_cardbus_softc *csc = (void *) self;
120	struct asc_softc *sc = &csc->sc_adv;
121	cardbus_devfunc_t ct = ca->ca_ct;
122	cardbus_chipset_tag_t cc = ct->ct_cc;
123	cardbus_function_tag_t cf = ct->ct_cf;
124	bus_space_tag_t iot;
125	bus_space_handle_t ioh;
126	pcireg_t reg;
127	u_int8_t latency = 0x20;
128
129	sc->sc_flags = 0;
130
131	if (PCI_VENDOR(ca->ca_id) == PCI_VENDOR_ADVSYS) {
132		switch (PCI_PRODUCT(ca->ca_id)) {
133		case PCI_PRODUCT_ADVSYS_1200A:
134			printf(": AdvanSys ASC1200A SCSI adapter\n");
135			latency = 0;
136			break;
137
138		case PCI_PRODUCT_ADVSYS_1200B:
139			printf(": AdvanSys ASC1200B SCSI adapter\n");
140			latency = 0;
141			break;
142
143		case PCI_PRODUCT_ADVSYS_ULTRA:
144			switch (PCI_REVISION(ca->ca_class)) {
145			case ASC_PCI_REVISION_3050:
146				printf(": AdvanSys ABP-9xxUA SCSI adapter\n");
147				break;
148
149			case ASC_PCI_REVISION_3150:
150				printf(": AdvanSys ABP-9xxU SCSI adapter\n");
151				break;
152			}
153			break;
154
155		default:
156			printf(": unknown model!\n");
157			return;
158		}
159	}
160
161	csc->sc_ct = ct;
162	csc->sc_tag = ca->ca_tag;
163	csc->sc_intrline = ca->ca_intrline;
164	csc->sc_cbenable = 0;
165
166	/*
167	 * Map the device.
168	 */
169	csc->sc_csr = PCI_COMMAND_MASTER_ENABLE;
170
171#ifdef ADV_CARDBUS_ALLOW_MEMIO
172	if (Cardbus_mapreg_map(csc->sc_ct, ADV_CARDBUS_MMBA,
173	    PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
174	    &iot, &ioh, NULL, &csc->sc_size) == 0) {
175#ifdef ADV_CARDBUS_DEBUG
176		printf("%s: memio enabled\n", DEVNAME(sc));
177#endif
178		csc->sc_cbenable = CARDBUS_MEM_ENABLE;
179		csc->sc_csr |= PCI_COMMAND_MEM_ENABLE;
180	} else
181#endif
182	if (Cardbus_mapreg_map(csc->sc_ct, ADV_CARDBUS_IOBA,
183	    PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, NULL, &csc->sc_size) == 0) {
184#ifdef ADV_CARDBUS_DEBUG
185		printf("%s: io enabled\n", DEVNAME(sc));
186#endif
187		csc->sc_cbenable = CARDBUS_IO_ENABLE;
188		csc->sc_csr |= PCI_COMMAND_IO_ENABLE;
189	} else {
190		printf("%s: unable to map device registers\n",
191		    DEVNAME(sc));
192		return;
193	}
194
195	/* Make sure the right access type is on the CardBus bridge. */
196	(*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cbenable);
197	(*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
198
199	/* Enable the appropriate bits in the PCI CSR. */
200	reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG);
201	reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
202	reg |= csc->sc_csr;
203	cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg);
204
205	/*
206	 * Make sure the latency timer is set to some reasonable
207	 * value.
208	 */
209	reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG);
210	if (PCI_LATTIMER(reg) < latency) {
211		reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
212		reg |= (latency << PCI_LATTIMER_SHIFT);
213		cardbus_conf_write(cc, cf, ca->ca_tag, PCI_BHLC_REG, reg);
214	}
215
216	ASC_SET_CHIP_CONTROL(iot, ioh, ASC_CC_HALT);
217	ASC_SET_CHIP_STATUS(iot, ioh, 0);
218
219	sc->sc_iot = iot;
220	sc->sc_ioh = ioh;
221	sc->sc_dmat = ca->ca_dmat;
222	sc->pci_device_id = ca->ca_id;
223	sc->bus_type = ASC_IS_PCI;
224	sc->chip_version = ASC_GET_CHIP_VER_NO(iot, ioh);
225
226	/*
227	 * Initialize the board
228	 */
229	if (adv_init(sc)) {
230		printf("adv_init failed\n");
231		return;
232	}
233
234	/*
235	 * Establish the interrupt.
236	 */
237	sc->sc_ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_BIO,
238	    adv_intr, sc);
239	if (sc->sc_ih == NULL) {
240		printf("%s: unable to establish interrupt at %d\n",
241		    DEVNAME(sc), ca->ca_intrline);
242		return;
243	}
244	printf("%s: interrupting at %d\n", DEVNAME(sc), ca->ca_intrline);
245
246	/*
247	 * Attach.
248	 */
249	adv_attach(sc);
250}
251
252int
253adv_cardbus_detach(self, flags)
254	struct device *self;
255	int flags;
256{
257	struct adv_cardbus_softc *csc = (void*)self;
258	struct asc_softc *sc = &csc->sc_adv;
259
260	int rv;
261
262	rv = adv_detach(sc, flags);
263	if (rv)
264		return rv;
265
266	if (sc->sc_ih) {
267		cardbus_intr_disestablish(csc->sc_ct->ct_cc,
268		    csc->sc_ct->ct_cf, sc->sc_ih);
269		sc->sc_ih = 0;
270	}
271
272	if (csc->sc_cbenable) {
273#ifdef ADV_CARDBUS_ALLOW_MEMIO
274		if (csc->sc_cbenable == CARDBUS_MEM_ENABLE) {
275			Cardbus_mapreg_unmap(csc->sc_ct, ADV_CARDBUS_MMBA,
276			    sc->sc_iot, sc->sc_ioh, csc->sc_size);
277		} else {
278#endif
279			Cardbus_mapreg_unmap(csc->sc_ct, ADV_CARDBUS_IOBA,
280			    sc->sc_iot, sc->sc_ioh, csc->sc_size);
281#ifdef ADV_CARDBUS_ALLOW_MEMIO
282		}
283#endif
284		csc->sc_cbenable = 0;
285	}
286
287	return 0;
288}
289