ahc_cardbus.c revision 1.3.6.2
1 /* $NetBSD: ahc_cardbus.c,v 1.3.6.2 2000/11/20 11:39:52 bouyer Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * CardBus front-end for the Adaptec AIC-7xxx family of SCSI controllers. 42 * 43 * TODO: 44 * - power management 45 */ 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/malloc.h> 50 #include <sys/kernel.h> 51 #include <sys/queue.h> 52 #include <sys/device.h> 53 54 #include <machine/bus.h> 55 #include <machine/intr.h> 56 57 #include <dev/scsipi/scsi_all.h> 58 #include <dev/scsipi/scsipi_all.h> 59 #include <dev/scsipi/scsiconf.h> 60 61 #include <dev/pci/pcireg.h> 62 63 #include <dev/cardbus/cardbusvar.h> 64 #include <dev/cardbus/cardbusdevs.h> 65 66 #include <dev/ic/aic7xxxvar.h> 67 68 #include <dev/microcode/aic7xxx/aic7xxx_reg.h> 69 70 #define AHC_CARDBUS_IOBA 0x10 71 #define AHC_CARDBUS_MMBA 0x14 72 73 struct ahc_cardbus_softc { 74 struct ahc_softc sc_ahc; /* real AHC */ 75 76 /* CardBus-specific goo. */ 77 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 78 int sc_intrline; /* our interrupt line */ 79 cardbustag_t sc_tag; 80 81 int sc_cbenable; /* what CardBus access type to enable */ 82 int sc_csr; /* CSR bits */ 83 }; 84 85 int ahc_cardbus_match __P((struct device *, struct cfdata *, void *)); 86 void ahc_cardbus_attach __P((struct device *, struct device *, void *)); 87 88 struct cfattach ahc_cardbus_ca = { 89 sizeof(struct ahc_softc), ahc_cardbus_match, ahc_cardbus_attach, 90 }; 91 92 int 93 ahc_cardbus_match(parent, match, aux) 94 struct device *parent; 95 struct cfdata *match; 96 void *aux; 97 { 98 struct cardbus_attach_args *ca = aux; 99 100 if (CARDBUS_VENDOR(ca->ca_id) == CARDBUS_VENDOR_ADP && 101 CARDBUS_PRODUCT(ca->ca_id) == CARDBUS_PRODUCT_ADP_1480) 102 return (1); 103 104 return (0); 105 } 106 107 void 108 ahc_cardbus_attach(parent, self, aux) 109 struct device *parent, *self; 110 void *aux; 111 { 112 struct cardbus_attach_args *ca = aux; 113 struct ahc_cardbus_softc *csc = (void *) self; 114 struct ahc_softc *ahc = &csc->sc_ahc; 115 cardbus_devfunc_t ct = ca->ca_ct; 116 cardbus_chipset_tag_t cc = ct->ct_cc; 117 cardbus_function_tag_t cf = ct->ct_cf; 118 bus_space_tag_t bst; 119 bus_space_handle_t bsh; 120 pcireg_t reg; 121 u_int sxfrctl1 = 0; 122 ahc_chip ahc_t = AHC_NONE; 123 ahc_feature ahc_fe = AHC_FENONE; 124 ahc_flag ahc_f = AHC_FNONE; 125 126 127 csc->sc_ct = ct; 128 csc->sc_tag = ca->ca_tag; 129 csc->sc_intrline = ca->ca_intrline; 130 131 printf(": Adaptec ADP-1480 SCSI\n"); 132 133 /* 134 * Map the device. 135 */ 136 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE; 137 if (Cardbus_mapreg_map(csc->sc_ct, AHC_CARDBUS_MMBA, 138 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 139 &bst, &bsh, NULL, NULL) == 0) { 140 csc->sc_cbenable = CARDBUS_MEM_ENABLE; 141 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE; 142 } else if (Cardbus_mapreg_map(csc->sc_ct, AHC_CARDBUS_IOBA, 143 PCI_MAPREG_TYPE_IO, 0, &bst, &bsh, NULL, NULL) == 0) { 144 csc->sc_cbenable = CARDBUS_IO_ENABLE; 145 csc->sc_csr |= PCI_COMMAND_IO_ENABLE; 146 } else { 147 printf("%s: unable to map device registers\n", 148 ahc_name(ahc)); 149 return; 150 } 151 152 /* Make sure the right access type is on the CardBus bridge. */ 153 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cbenable); 154 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 155 156 /* Enable the appropriate bits in the PCI CSR. */ 157 reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG); 158 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 159 reg |= csc->sc_csr; 160 cardbus_conf_write(cc, cf, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg); 161 162 /* 163 * Make sure the latency timer is set to some reasonable 164 * value. 165 */ 166 reg = cardbus_conf_read(cc, cf, ca->ca_tag, PCI_BHLC_REG); 167 if (PCI_LATTIMER(reg) < 0x20) { 168 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 169 reg |= (0x20 << PCI_LATTIMER_SHIFT); 170 cardbus_conf_write(cc, cf, ca->ca_tag, PCI_BHLC_REG, reg); 171 } 172 173 /* 174 * ADP-1480 is always an AIC-7860. 175 */ 176 ahc_t = AHC_AIC7860; 177 ahc_fe = AHC_AIC7860_FE; 178 179 /* 180 * On all CardBus adapters, we allow SCB paging. 181 */ 182 ahc_f = AHC_PAGESCBS; 183 184 if (ahc_alloc(ahc, bsh, bst, ca->ca_dmat, ahc_t | AHC_PCI /* XXX */, 185 ahc_fe, ahc_f) < 0) { 186 printf("%s: unable to initialize softc\n", ahc_name(ahc)); 187 return; 188 } 189 190 ahc->channel = 'A'; 191 192 ahc_reset(ahc); 193 194 /* 195 * Establish the interrupt. 196 */ 197 ahc->ih = cardbus_intr_establish(cc, cf, ca->ca_intrline, IPL_BIO, 198 ahc_intr, ahc); 199 if (ahc->ih == NULL) { 200 printf("%s: unable to establish interrupt at %d\n", 201 ahc_name(ahc), ca->ca_intrline); 202 return; 203 } 204 printf("%s: interrupting at %d\n", ahc_name(ahc), ca->ca_intrline); 205 206 /* 207 * Do chip-specific initialization. 208 */ 209 { 210 u_char sblkctl; 211 const char *id_string; 212 213 switch (ahc->chip & AHC_CHIPID_MASK) { 214 case AHC_AIC7860: 215 id_string = "aic7860 "; 216 check_extport(ahc, &sxfrctl1); 217 break; 218 219 default: 220 printf("%s: unknown controller type\n", ahc_name(ahc)); 221 ahc_free(ahc); 222 return; 223 } 224 225 /* 226 * Take the LED out of diagnostic mode. 227 */ 228 sblkctl = ahc_inb(ahc, SBLKCTL); 229 ahc_outb(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON))); 230 231 /* 232 * I don't know where this is set in the SEEPROM or by the 233 * BIOS, so we default to 100%. 234 */ 235 ahc_outb(ahc, DSPCISTATUS, DFTHRSH_100); 236 237 if (ahc->flags & AHC_USEDEFAULTS) { 238 /* 239 * We can't "use defaults", as we have no way 240 * of knowing what default settings hould be. 241 */ 242 printf("%s: CardBus device requires an SEEPROM\n", 243 ahc_name(ahc)); 244 return; 245 } 246 247 printf("%s: %s", ahc_name(ahc), id_string); 248 } 249 250 /* 251 * XXX does this card have external SRAM? - fvdl 252 */ 253 254 /* 255 * Record our termination setting for the 256 * generic initialization routine. 257 */ 258 if ((sxfrctl1 & STPWEN) != 0) 259 ahc->flags |= AHC_TERM_ENB_A; 260 261 if (ahc_init(ahc)) { 262 ahc_free(ahc); 263 return; 264 } 265 266 ahc_attach(ahc); 267 } 268
Indexes created Sun Oct 12 09:09:55 GMT 2025