cardbus.c revision 1.81
1 /* $NetBSD: cardbus.c,v 1.81 2007/12/09 20:27:55 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998, 1999 and 2000 5 * HAYAKAWA Koichi. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by HAYAKAWA Koichi. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 30 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 31 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: cardbus.c,v 1.81 2007/12/09 20:27:55 jmcneill Exp $"); 37 38 #include "opt_cardbus.h" 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/device.h> 43 #include <sys/malloc.h> 44 #include <sys/kernel.h> 45 #include <sys/syslog.h> 46 #include <sys/proc.h> 47 #include <sys/reboot.h> /* for AB_* needed by bootverbose */ 48 49 #include <sys/bus.h> 50 51 #include <dev/cardbus/cardbusvar.h> 52 #include <dev/pci/pcidevs.h> 53 54 #include <dev/cardbus/cardbus_exrom.h> 55 56 #include <dev/pci/pcivar.h> /* XXX */ 57 #include <dev/pci/pcireg.h> /* XXX */ 58 59 #include <dev/pcmcia/pcmciareg.h> 60 61 #include "locators.h" 62 63 #if defined CARDBUS_DEBUG 64 #define STATIC 65 #define DPRINTF(a) printf a 66 #else 67 #define STATIC static 68 #define DPRINTF(a) 69 #endif 70 71 72 STATIC void cardbusattach(struct device *, struct device *, void *); 73 STATIC int cardbusmatch(struct device *, struct cfdata *, void *); 74 int cardbus_rescan(struct device *, const char *, const int *); 75 void cardbus_childdetached(struct device *, struct device *); 76 static int cardbusprint(void *, const char *); 77 78 typedef void (*tuple_decode_func)(u_int8_t*, int, void*); 79 80 static int decode_tuples(u_int8_t *, int, tuple_decode_func, void*); 81 #ifdef CARDBUS_DEBUG 82 static void print_tuple(u_int8_t*, int, void*); 83 #endif 84 85 static int cardbus_read_tuples(struct cardbus_attach_args *, 86 cardbusreg_t, u_int8_t *, size_t); 87 88 static void enable_function(struct cardbus_softc *, int, int); 89 static void disable_function(struct cardbus_softc *, int); 90 91 static bool cardbus_child_register(device_t); 92 93 CFATTACH_DECL2(cardbus, sizeof(struct cardbus_softc), 94 cardbusmatch, cardbusattach, NULL, NULL, 95 cardbus_rescan, cardbus_childdetached); 96 97 #ifndef __NetBSD_Version__ 98 struct cfdriver cardbus_cd = { 99 NULL, "cardbus", DV_DULL 100 }; 101 #endif 102 103 104 STATIC int 105 cardbusmatch(struct device *parent, struct cfdata *cf, void *aux) 106 { 107 struct cbslot_attach_args *cba = aux; 108 109 if (strcmp(cba->cba_busname, cf->cf_name)) { 110 DPRINTF(("cardbusmatch: busname differs %s <=> %s\n", 111 cba->cba_busname, cf->cf_name)); 112 return (0); 113 } 114 115 return (1); 116 } 117 118 STATIC void 119 cardbusattach(struct device *parent, struct device *self, void *aux) 120 { 121 struct cardbus_softc *sc = device_private(self); 122 struct cbslot_attach_args *cba = aux; 123 124 sc->sc_bus = cba->cba_bus; 125 sc->sc_intrline = cba->cba_intrline; 126 sc->sc_cacheline = cba->cba_cacheline; 127 sc->sc_max_lattimer = MIN(0xf8, cba->cba_max_lattimer); 128 129 aprint_naive("\n"); 130 aprint_normal(": bus %d", sc->sc_bus); 131 if (bootverbose) 132 aprint_normal(" cacheline 0x%x, lattimer 0x%x", 133 sc->sc_cacheline, sc->sc_max_lattimer); 134 aprint_normal("\n"); 135 136 sc->sc_iot = cba->cba_iot; /* CardBus I/O space tag */ 137 sc->sc_memt = cba->cba_memt; /* CardBus MEM space tag */ 138 sc->sc_dmat = cba->cba_dmat; /* DMA tag */ 139 sc->sc_cc = cba->cba_cc; 140 sc->sc_cf = cba->cba_cf; 141 142 #if rbus 143 sc->sc_rbus_iot = cba->cba_rbus_iot; 144 sc->sc_rbus_memt = cba->cba_rbus_memt; 145 #endif 146 147 if (!pmf_device_register(self, NULL, NULL)) 148 aprint_error_dev(self, "couldn't establish power handler\n"); 149 } 150 151 static int 152 cardbus_read_tuples(struct cardbus_attach_args *ca, cardbusreg_t cis_ptr, 153 u_int8_t *tuples, size_t len) 154 { 155 struct cardbus_softc *sc = ca->ca_ct->ct_sc; 156 cardbus_chipset_tag_t cc = ca->ca_ct->ct_cc; 157 cardbus_function_tag_t cf = ca->ca_ct->ct_cf; 158 cardbustag_t tag = ca->ca_tag; 159 cardbusreg_t command; 160 bus_space_tag_t bar_tag; 161 bus_space_handle_t bar_memh; 162 bus_size_t bar_size; 163 bus_addr_t bar_addr; 164 cardbusreg_t reg; 165 int found = 0; 166 int cardbus_space = cis_ptr & CARDBUS_CIS_ASIMASK; 167 int i, j; 168 169 memset(tuples, 0, len); 170 171 cis_ptr = cis_ptr & CARDBUS_CIS_ADDRMASK; 172 173 switch (cardbus_space) { 174 case CARDBUS_CIS_ASI_TUPLE: 175 DPRINTF(("%s: reading CIS data from configuration space\n", 176 sc->sc_dev.dv_xname)); 177 for (i = cis_ptr, j = 0; i < 0xff; i += 4) { 178 u_int32_t e = (*cf->cardbus_conf_read)(cc, tag, i); 179 tuples[j] = 0xff & e; 180 e >>= 8; 181 tuples[j + 1] = 0xff & e; 182 e >>= 8; 183 tuples[j + 2] = 0xff & e; 184 e >>= 8; 185 tuples[j + 3] = 0xff & e; 186 j += 4; 187 } 188 found++; 189 break; 190 191 case CARDBUS_CIS_ASI_BAR0: 192 case CARDBUS_CIS_ASI_BAR1: 193 case CARDBUS_CIS_ASI_BAR2: 194 case CARDBUS_CIS_ASI_BAR3: 195 case CARDBUS_CIS_ASI_BAR4: 196 case CARDBUS_CIS_ASI_BAR5: 197 case CARDBUS_CIS_ASI_ROM: 198 if (cardbus_space == CARDBUS_CIS_ASI_ROM) { 199 reg = CARDBUS_ROM_REG; 200 DPRINTF(("%s: reading CIS data from ROM\n", 201 sc->sc_dev.dv_xname)); 202 } else { 203 reg = CARDBUS_CIS_ASI_BAR(cardbus_space); 204 DPRINTF(("%s: reading CIS data from BAR%d\n", 205 sc->sc_dev.dv_xname, cardbus_space - 1)); 206 } 207 208 /* 209 * XXX zero register so mapreg_map doesn't get confused by old 210 * contents. 211 */ 212 cardbus_conf_write(cc, cf, tag, reg, 0); 213 if (Cardbus_mapreg_map(ca->ca_ct, reg, 214 CARDBUS_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 215 0, &bar_tag, &bar_memh, &bar_addr, &bar_size)) { 216 printf("%s: failed to map memory\n", 217 sc->sc_dev.dv_xname); 218 return (1); 219 } 220 221 if (cardbus_space == CARDBUS_CIS_ASI_ROM) { 222 cardbusreg_t exrom; 223 int save; 224 struct cardbus_rom_image_head rom_image; 225 struct cardbus_rom_image *p; 226 227 save = splhigh(); 228 /* enable rom address decoder */ 229 exrom = cardbus_conf_read(cc, cf, tag, reg); 230 cardbus_conf_write(cc, cf, tag, reg, exrom | 1); 231 232 command = cardbus_conf_read(cc, cf, tag, 233 CARDBUS_COMMAND_STATUS_REG); 234 cardbus_conf_write(cc, cf, tag, 235 CARDBUS_COMMAND_STATUS_REG, 236 command | CARDBUS_COMMAND_MEM_ENABLE); 237 238 if (cardbus_read_exrom(ca->ca_memt, bar_memh, 239 &rom_image)) 240 goto out; 241 242 SIMPLEQ_FOREACH(p, &rom_image, next) { 243 if (p->rom_image == 244 CARDBUS_CIS_ASI_ROM_IMAGE(cis_ptr)) { 245 bus_space_read_region_1(p->romt, 246 p->romh, CARDBUS_CIS_ADDR(cis_ptr), 247 tuples, MIN(p->image_size, len)); 248 found++; 249 break; 250 } 251 } 252 while ((p = SIMPLEQ_FIRST(&rom_image)) != NULL) { 253 SIMPLEQ_REMOVE_HEAD(&rom_image, next); 254 free(p, M_DEVBUF); 255 } 256 out: 257 exrom = cardbus_conf_read(cc, cf, tag, reg); 258 cardbus_conf_write(cc, cf, tag, reg, exrom & ~1); 259 splx(save); 260 } else { 261 command = cardbus_conf_read(cc, cf, tag, 262 CARDBUS_COMMAND_STATUS_REG); 263 cardbus_conf_write(cc, cf, tag, 264 CARDBUS_COMMAND_STATUS_REG, 265 command | CARDBUS_COMMAND_MEM_ENABLE); 266 /* XXX byte order? */ 267 bus_space_read_region_1(ca->ca_memt, bar_memh, 268 cis_ptr, tuples, MIN(bar_size, len)); 269 found++; 270 } 271 command = cardbus_conf_read(cc, cf, tag, 272 CARDBUS_COMMAND_STATUS_REG); 273 cardbus_conf_write(cc, cf, tag, CARDBUS_COMMAND_STATUS_REG, 274 command & ~CARDBUS_COMMAND_MEM_ENABLE); 275 cardbus_conf_write(cc, cf, tag, reg, 0); 276 277 Cardbus_mapreg_unmap(ca->ca_ct, reg, bar_tag, bar_memh, 278 bar_size); 279 break; 280 281 #ifdef DIAGNOSTIC 282 default: 283 panic("%s: bad CIS space (%d)", sc->sc_dev.dv_xname, 284 cardbus_space); 285 #endif 286 } 287 return (!found); 288 } 289 290 static void 291 parse_tuple(u_int8_t *tuple, int len, void *data) 292 { 293 struct cardbus_cis_info *cis = data; 294 char *p; 295 int i, bar_index; 296 297 switch (tuple[0]) { 298 case PCMCIA_CISTPL_MANFID: 299 if (tuple[1] != 4) { 300 DPRINTF(("%s: wrong length manufacturer id (%d)\n", 301 __func__, tuple[1])); 302 break; 303 } 304 cis->manufacturer = tuple[2] | (tuple[3] << 8); 305 cis->product = tuple[4] | (tuple[5] << 8); 306 break; 307 308 case PCMCIA_CISTPL_VERS_1: 309 memcpy(cis->cis1_info_buf, tuple + 2, tuple[1]); 310 i = 0; 311 p = cis->cis1_info_buf + 2; 312 while (i < 313 sizeof(cis->cis1_info) / sizeof(cis->cis1_info[0])) { 314 if (p >= cis->cis1_info_buf + tuple[1] || *p == '\xff') 315 break; 316 cis->cis1_info[i++] = p; 317 while (*p != '\0' && *p != '\xff') 318 p++; 319 if (*p == '\0') 320 p++; 321 } 322 break; 323 324 case PCMCIA_CISTPL_BAR: 325 if (tuple[1] != 6) { 326 DPRINTF(("%s: BAR with short length (%d)\n", 327 __func__, tuple[1])); 328 break; 329 } 330 bar_index = tuple[2] & 7; 331 if (bar_index == 0) { 332 DPRINTF(("%s: invalid ASI in BAR tuple\n", __func__)); 333 break; 334 } 335 bar_index--; 336 cis->bar[bar_index].flags = tuple[2]; 337 cis->bar[bar_index].size = 338 (tuple[4] << 0) | 339 (tuple[5] << 8) | 340 (tuple[6] << 16) | 341 (tuple[7] << 24); 342 break; 343 344 case PCMCIA_CISTPL_FUNCID: 345 cis->funcid = tuple[2]; 346 break; 347 348 case PCMCIA_CISTPL_FUNCE: 349 switch (cis->funcid) { 350 case PCMCIA_FUNCTION_SERIAL: 351 if (tuple[1] >= 2 && 352 /* XXX PCMCIA_TPLFE_TYPE_SERIAL_??? */ 353 tuple[2] == 0) { 354 cis->funce.serial.uart_type = tuple[3] & 0x1f; 355 cis->funce.serial.uart_present = 1; 356 } 357 break; 358 359 case PCMCIA_FUNCTION_NETWORK: 360 if (tuple[1] >= 8 && 361 tuple[2] == PCMCIA_TPLFE_TYPE_LAN_NID) { 362 if (tuple[3] > 363 sizeof(cis->funce.network.netid)) { 364 DPRINTF(("%s: unknown network id type " 365 "(len = %d)\n", 366 __func__, tuple[3])); 367 } else { 368 cis->funce.network.netid_present = 1; 369 memcpy(cis->funce.network.netid, 370 tuple + 4, tuple[3]); 371 } 372 } 373 break; 374 } 375 break; 376 } 377 } 378 379 /* 380 * int cardbus_attach_card(struct cardbus_softc *sc) 381 * 382 * This function attaches the card on the slot: turns on power, 383 * reads and analyses tuple, sets configuration index. 384 * 385 * This function returns the number of recognised device functions. 386 * If no functions are recognised, return 0. 387 */ 388 int 389 cardbus_attach_card(struct cardbus_softc *sc) 390 { 391 cardbus_chipset_tag_t cc; 392 cardbus_function_tag_t cf; 393 int cdstatus; 394 static int wildcard[CARDBUSCF_NLOCS] = { 395 CARDBUSCF_FUNCTION_DEFAULT 396 }; 397 398 cc = sc->sc_cc; 399 cf = sc->sc_cf; 400 401 DPRINTF(("cardbus_attach_card: cb%d start\n", 402 device_unit(&sc->sc_dev))); 403 404 /* inspect initial voltage */ 405 if ((cdstatus = (*cf->cardbus_ctrl)(cc, CARDBUS_CD)) == 0) { 406 DPRINTF(("%s: no CardBus card on cb%d\n", __func__, 407 device_unit(&sc->sc_dev))); 408 return (0); 409 } 410 411 device_pmf_driver_set_child_register(&sc->sc_dev, cardbus_child_register); 412 cardbus_rescan(&sc->sc_dev, "cardbus", wildcard); 413 return (1); /* XXX */ 414 } 415 416 int 417 cardbus_rescan(struct device *self, const char *ifattr, 418 const int *locators) 419 { 420 struct cardbus_softc *sc = device_private(self); 421 cardbus_chipset_tag_t cc; 422 cardbus_function_tag_t cf; 423 cardbustag_t tag; 424 cardbusreg_t id, class, cis_ptr; 425 cardbusreg_t bhlc, icr, lattimer; 426 int cdstatus; 427 int function, nfunction; 428 struct device *csc; 429 cardbus_devfunc_t ct; 430 431 cc = sc->sc_cc; 432 cf = sc->sc_cf; 433 434 /* inspect initial voltage */ 435 if ((cdstatus = (*cf->cardbus_ctrl)(cc, CARDBUS_CD)) == 0) { 436 DPRINTF(("%s: no CardBus card on cb%d\n", __func__, 437 device_unit(&sc->sc_dev))); 438 return (0); 439 } 440 441 /* 442 * XXX use fake function 8 to keep power on during whole 443 * configuration. 444 */ 445 enable_function(sc, cdstatus, 8); 446 function = 0; 447 448 tag = cardbus_make_tag(cc, cf, sc->sc_bus, function); 449 450 /* 451 * Wait until power comes up. Maxmum 500 ms. 452 * 453 * XXX What is this for? The bridge driver ought to have waited 454 * XXX already. 455 */ 456 { 457 int i; 458 459 for (i = 0; i < 5; ++i) { 460 id = cardbus_conf_read(cc, cf, tag, CARDBUS_ID_REG); 461 if (id != 0xffffffff && id != 0) { 462 break; 463 } 464 if (cold) { /* before kernel thread invoked */ 465 delay(100 * 1000); 466 } else { /* thread context */ 467 if (tsleep((void *)sc, PCATCH, "cardbus", 468 hz / 10) != EWOULDBLOCK) { 469 break; 470 } 471 } 472 } 473 if (i == 5) { 474 return (EIO); 475 } 476 } 477 478 bhlc = cardbus_conf_read(cc, cf, tag, CARDBUS_BHLC_REG); 479 DPRINTF(("%s bhlc 0x%08x -> ", sc->sc_dev.dv_xname, bhlc)); 480 nfunction = CARDBUS_HDRTYPE_MULTIFN(bhlc) ? 8 : 1; 481 482 for (function = 0; function < nfunction; function++) { 483 struct cardbus_attach_args ca; 484 int locs[CARDBUSCF_NLOCS]; 485 486 if (locators[CARDBUSCF_FUNCTION] != 487 CARDBUSCF_FUNCTION_DEFAULT && 488 locators[CARDBUSCF_FUNCTION] != function) 489 continue; 490 491 if (sc->sc_funcs[function]) 492 continue; 493 494 tag = cardbus_make_tag(cc, cf, sc->sc_bus, function); 495 496 id = cardbus_conf_read(cc, cf, tag, CARDBUS_ID_REG); 497 class = cardbus_conf_read(cc, cf, tag, CARDBUS_CLASS_REG); 498 cis_ptr = cardbus_conf_read(cc, cf, tag, CARDBUS_CIS_REG); 499 500 /* Invalid vendor ID value? */ 501 if (CARDBUS_VENDOR(id) == PCI_VENDOR_INVALID) { 502 continue; 503 } 504 505 DPRINTF(("cardbus_attach_card: " 506 "Vendor 0x%x, Product 0x%x, CIS 0x%x\n", 507 CARDBUS_VENDOR(id), CARDBUS_PRODUCT(id), cis_ptr)); 508 509 enable_function(sc, cdstatus, function); 510 511 /* clean up every BAR */ 512 cardbus_conf_write(cc, cf, tag, CARDBUS_BASE0_REG, 0); 513 cardbus_conf_write(cc, cf, tag, CARDBUS_BASE1_REG, 0); 514 cardbus_conf_write(cc, cf, tag, CARDBUS_BASE2_REG, 0); 515 cardbus_conf_write(cc, cf, tag, CARDBUS_BASE3_REG, 0); 516 cardbus_conf_write(cc, cf, tag, CARDBUS_BASE4_REG, 0); 517 cardbus_conf_write(cc, cf, tag, CARDBUS_BASE5_REG, 0); 518 cardbus_conf_write(cc, cf, tag, CARDBUS_ROM_REG, 0); 519 520 /* set initial latency and cacheline size */ 521 bhlc = cardbus_conf_read(cc, cf, tag, CARDBUS_BHLC_REG); 522 icr = cardbus_conf_read(cc, cf, tag, CARDBUS_INTERRUPT_REG); 523 DPRINTF(("%s func%d icr 0x%08x bhlc 0x%08x -> ", 524 device_xname(&sc->sc_dev), function, icr, bhlc)); 525 bhlc &= ~(CARDBUS_CACHELINE_MASK << CARDBUS_CACHELINE_SHIFT); 526 bhlc |= (sc->sc_cacheline & CARDBUS_CACHELINE_MASK) << 527 CARDBUS_CACHELINE_SHIFT; 528 /* 529 * Set the initial value of the Latency Timer. 530 * 531 * While a PCI device owns the bus, its Latency 532 * Timer counts down bus cycles from its initial 533 * value to 0. Minimum Grant tells for how long 534 * the device wants to own the bus once it gets 535 * access, in units of 250ns. 536 * 537 * On a 33 MHz bus, there are 8 cycles per 250ns. 538 * So I multiply the Minimum Grant by 8 to find 539 * out the initial value of the Latency Timer. 540 * 541 * Avoid setting a Latency Timer less than 0x10, 542 * since the old code did not do that. 543 */ 544 lattimer = 545 MIN(sc->sc_max_lattimer, MAX(0x10, 8 * PCI_MIN_GNT(icr))); 546 if (PCI_LATTIMER(bhlc) < lattimer) { 547 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 548 bhlc |= (lattimer << PCI_LATTIMER_SHIFT); 549 } 550 551 cardbus_conf_write(cc, cf, tag, CARDBUS_BHLC_REG, bhlc); 552 bhlc = cardbus_conf_read(cc, cf, tag, CARDBUS_BHLC_REG); 553 DPRINTF(("0x%08x\n", bhlc)); 554 555 /* 556 * We need to allocate the ct here, since we might 557 * need it when reading the CIS 558 */ 559 if ((ct = malloc(sizeof(struct cardbus_devfunc), 560 M_DEVBUF, M_NOWAIT)) == NULL) { 561 panic("no room for cardbus_tag"); 562 } 563 564 ct->ct_bhlc = bhlc; 565 ct->ct_cc = sc->sc_cc; 566 ct->ct_cf = sc->sc_cf; 567 ct->ct_bus = sc->sc_bus; 568 ct->ct_func = function; 569 ct->ct_sc = sc; 570 sc->sc_funcs[function] = ct; 571 572 memset(&ca, 0, sizeof(ca)); 573 574 ca.ca_ct = ct; 575 576 ca.ca_iot = sc->sc_iot; 577 ca.ca_memt = sc->sc_memt; 578 ca.ca_dmat = sc->sc_dmat; 579 580 #if rbus 581 ca.ca_rbus_iot = sc->sc_rbus_iot; 582 ca.ca_rbus_memt= sc->sc_rbus_memt; 583 #endif 584 585 ca.ca_tag = tag; 586 ca.ca_bus = sc->sc_bus; 587 ca.ca_function = function; 588 ca.ca_id = id; 589 ca.ca_class = class; 590 591 ca.ca_intrline = sc->sc_intrline; 592 593 if (cis_ptr != 0) { 594 #define TUPLESIZE 2048 595 u_int8_t *tuple = malloc(TUPLESIZE, M_DEVBUF, M_WAITOK); 596 if (cardbus_read_tuples(&ca, cis_ptr, 597 tuple, TUPLESIZE)) { 598 printf("cardbus_attach_card: " 599 "failed to read CIS\n"); 600 } else { 601 #ifdef CARDBUS_DEBUG 602 decode_tuples(tuple, TUPLESIZE, 603 print_tuple, NULL); 604 #endif 605 decode_tuples(tuple, TUPLESIZE, 606 parse_tuple, &ca.ca_cis); 607 } 608 free(tuple, M_DEVBUF); 609 } 610 611 locs[CARDBUSCF_FUNCTION] = function; 612 613 if ((csc = config_found_sm_loc((void *)sc, "cardbus", locs, 614 &ca, cardbusprint, config_stdsubmatch)) == NULL) { 615 /* do not match */ 616 disable_function(sc, function); 617 sc->sc_funcs[function] = NULL; 618 free(ct, M_DEVBUF); 619 } else { 620 /* found */ 621 ct->ct_device = csc; 622 } 623 } 624 /* 625 * XXX power down pseudo function 8 (this will power down the card 626 * if no functions were attached). 627 */ 628 disable_function(sc, 8); 629 630 return (0); 631 } 632 633 static int 634 cardbusprint(void *aux, const char *pnp) 635 { 636 struct cardbus_attach_args *ca = aux; 637 char devinfo[256]; 638 int i; 639 640 if (pnp) { 641 pci_devinfo(ca->ca_id, ca->ca_class, 1, devinfo, 642 sizeof(devinfo)); 643 for (i = 0; i < 4; i++) { 644 if (ca->ca_cis.cis1_info[i] == NULL) 645 break; 646 if (i) 647 aprint_normal(", "); 648 aprint_normal("%s", ca->ca_cis.cis1_info[i]); 649 } 650 aprint_verbose("%s(manufacturer 0x%x, product 0x%x)", 651 i ? " " : "", 652 ca->ca_cis.manufacturer, ca->ca_cis.product); 653 aprint_normal(" %s at %s", devinfo, pnp); 654 } 655 aprint_normal(" function %d", ca->ca_function); 656 657 return (UNCONF); 658 } 659 660 /* 661 * void cardbus_detach_card(struct cardbus_softc *sc) 662 * 663 * This function detaches the card on the slot: detach device data 664 * structure and turns off the power. 665 * 666 * This function must not be called under interrupt context. 667 */ 668 void 669 cardbus_detach_card(struct cardbus_softc *sc) 670 { 671 int f; 672 struct cardbus_devfunc *ct; 673 674 for (f = 0; f < 8; f++) { 675 ct = sc->sc_funcs[f]; 676 if (!ct) 677 continue; 678 679 DPRINTF(("%s: detaching %s\n", sc->sc_dev.dv_xname, 680 ct->ct_device->dv_xname)); 681 /* call device detach function */ 682 683 if (config_detach(ct->ct_device, 0) != 0) { 684 printf("%s: cannot detach dev %s, function %d\n", 685 sc->sc_dev.dv_xname, ct->ct_device->dv_xname, 686 ct->ct_func); 687 } 688 } 689 690 sc->sc_poweron_func = 0; 691 (*sc->sc_cf->cardbus_power)(sc->sc_cc, 692 CARDBUS_VCC_0V | CARDBUS_VPP_0V); 693 } 694 695 void 696 cardbus_childdetached(struct device *self, struct device *child) 697 { 698 struct cardbus_softc *sc = device_private(self); 699 struct cardbus_devfunc *ct; 700 701 ct = sc->sc_funcs[device_locator(child, CARDBUSCF_FUNCTION)]; 702 KASSERT(ct->ct_device == child); 703 704 sc->sc_poweron_func &= ~(1 << ct->ct_func); 705 sc->sc_funcs[ct->ct_func] = NULL; 706 free(ct, M_DEVBUF); 707 } 708 709 /* 710 * void *cardbus_intr_establish(cc, cf, irq, level, func, arg) 711 * Interrupt handler of pccard. 712 * args: 713 * cardbus_chipset_tag_t *cc 714 * int irq: 715 */ 716 void * 717 cardbus_intr_establish(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 718 cardbus_intr_handle_t irq, int level, int (*func)(void *), void *arg) 719 { 720 721 DPRINTF(("- cardbus_intr_establish: irq %d\n", irq)); 722 return ((*cf->cardbus_intr_establish)(cc, irq, level, func, arg)); 723 } 724 725 /* 726 * void cardbus_intr_disestablish(cc, cf, handler) 727 * Interrupt handler of pccard. 728 * args: 729 * cardbus_chipset_tag_t *cc 730 */ 731 void 732 cardbus_intr_disestablish(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 733 void *handler) 734 { 735 736 DPRINTF(("- pccard_intr_disestablish\n")); 737 (*cf->cardbus_intr_disestablish)(cc, handler); 738 } 739 740 /* 741 * XXX this should be merged with cardbus_function_{enable,disable}, 742 * but we don't have a ct when these functions are called. 743 */ 744 static void 745 enable_function(struct cardbus_softc *sc, int cdstatus, int function) 746 { 747 748 if (sc->sc_poweron_func == 0) { 749 /* switch to 3V and/or wait for power to stabilize */ 750 if (cdstatus & CARDBUS_3V_CARD) { 751 /* 752 * sc_poweron_func must be substituted before 753 * entering sleep, in order to avoid turn on 754 * power twice. 755 */ 756 sc->sc_poweron_func |= (1 << function); 757 (*sc->sc_cf->cardbus_power)(sc->sc_cc, CARDBUS_VCC_3V); 758 } else { 759 /* No cards other than 3.3V cards. */ 760 return; 761 } 762 (*sc->sc_cf->cardbus_ctrl)(sc->sc_cc, CARDBUS_RESET); 763 } 764 sc->sc_poweron_func |= (1 << function); 765 } 766 767 static void 768 disable_function(struct cardbus_softc *sc, int function) 769 { 770 771 sc->sc_poweron_func &= ~(1 << function); 772 if (sc->sc_poweron_func == 0) { 773 /* power-off because no functions are enabled */ 774 (*sc->sc_cf->cardbus_power)(sc->sc_cc, CARDBUS_VCC_0V); 775 } 776 } 777 778 /* 779 * int cardbus_function_enable(struct cardbus_softc *sc, int func) 780 * 781 * This function enables a function on a card. When no power is 782 * applied on the card, power will be applied on it. 783 */ 784 int 785 cardbus_function_enable(struct cardbus_softc *sc, int func) 786 { 787 cardbus_chipset_tag_t cc = sc->sc_cc; 788 cardbus_function_tag_t cf = sc->sc_cf; 789 cardbus_devfunc_t ct; 790 cardbusreg_t command; 791 cardbustag_t tag; 792 793 DPRINTF(("entering cardbus_function_enable... ")); 794 795 /* entering critical area */ 796 797 /* XXX: sc_vold should be used */ 798 enable_function(sc, CARDBUS_3V_CARD, func); 799 800 /* exiting critical area */ 801 802 tag = cardbus_make_tag(cc, cf, sc->sc_bus, func); 803 804 command = cardbus_conf_read(cc, cf, tag, CARDBUS_COMMAND_STATUS_REG); 805 command |= (CARDBUS_COMMAND_MEM_ENABLE | CARDBUS_COMMAND_IO_ENABLE | 806 CARDBUS_COMMAND_MASTER_ENABLE); /* XXX: good guess needed */ 807 808 cardbus_conf_write(cc, cf, tag, CARDBUS_COMMAND_STATUS_REG, command); 809 810 if ((ct = sc->sc_funcs[func]) != NULL) 811 Cardbus_conf_write(ct, tag, CARDBUS_BHLC_REG, ct->ct_bhlc); 812 813 cardbus_free_tag(cc, cf, tag); 814 815 DPRINTF(("%x\n", sc->sc_poweron_func)); 816 817 return (0); 818 } 819 820 /* 821 * int cardbus_function_disable(struct cardbus_softc *, int func) 822 * 823 * This function disable a function on a card. When no functions are 824 * enabled, it turns off the power. 825 */ 826 int 827 cardbus_function_disable(struct cardbus_softc *sc, int func) 828 { 829 830 DPRINTF(("entering cardbus_function_disable... ")); 831 832 disable_function(sc, func); 833 834 return (0); 835 } 836 837 /* 838 * int cardbus_get_capability(cardbus_chipset_tag_t cc, 839 * cardbus_function_tag_t cf, cardbustag_t tag, int capid, int *offset, 840 * cardbusreg_t *value) 841 * 842 * Find the specified PCI capability. 843 */ 844 int 845 cardbus_get_capability(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 846 cardbustag_t tag, int capid, int *offset, cardbusreg_t *value) 847 { 848 cardbusreg_t reg; 849 unsigned int ofs; 850 851 reg = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG); 852 if (!(reg & PCI_STATUS_CAPLIST_SUPPORT)) 853 return (0); 854 855 ofs = PCI_CAPLIST_PTR(cardbus_conf_read(cc, cf, tag, 856 PCI_CAPLISTPTR_REG)); 857 while (ofs != 0) { 858 #ifdef DIAGNOSTIC 859 if ((ofs & 3) || (ofs < 0x40)) 860 panic("cardbus_get_capability"); 861 #endif 862 reg = cardbus_conf_read(cc, cf, tag, ofs); 863 if (PCI_CAPLIST_CAP(reg) == capid) { 864 if (offset) 865 *offset = ofs; 866 if (value) 867 *value = reg; 868 return (1); 869 } 870 ofs = PCI_CAPLIST_NEXT(reg); 871 } 872 873 return (0); 874 } 875 876 /* 877 * below this line, there are some functions for decoding tuples. 878 * They should go out from this file. 879 */ 880 881 static u_int8_t * 882 decode_tuple(u_int8_t *, u_int8_t *, tuple_decode_func, void *); 883 884 static int 885 decode_tuples(u_int8_t *tuple, int buflen, tuple_decode_func func, void *data) 886 { 887 u_int8_t *tp = tuple; 888 889 if (PCMCIA_CISTPL_LINKTARGET != *tuple) { 890 DPRINTF(("WRONG TUPLE: 0x%x\n", *tuple)); 891 return (0); 892 } 893 894 while ((tp = decode_tuple(tp, tuple + buflen, func, data)) != NULL) 895 ; 896 897 return (1); 898 } 899 900 static u_int8_t * 901 decode_tuple(u_int8_t *tuple, u_int8_t *end, 902 tuple_decode_func func, void *data) 903 { 904 u_int8_t type; 905 u_int8_t len; 906 907 type = tuple[0]; 908 switch (type) { 909 case PCMCIA_CISTPL_NULL: 910 case PCMCIA_CISTPL_END: 911 len = 1; 912 break; 913 default: 914 if (tuple + 2 > end) 915 return (NULL); 916 len = tuple[1] + 2; 917 break; 918 } 919 920 if (tuple + len > end) 921 return (NULL); 922 923 (*func)(tuple, len, data); 924 925 if (type == PCMCIA_CISTPL_END || tuple + len == end) 926 return (NULL); 927 928 return (tuple + len); 929 } 930 931 /* 932 * XXX: this is another reason why this code should be shared with PCI. 933 */ 934 static int 935 cardbus_get_powerstate_int(cardbus_devfunc_t ct, cardbustag_t tag, 936 cardbusreg_t *state, int offset) 937 { 938 cardbusreg_t value, now; 939 cardbus_chipset_tag_t cc = ct->ct_cc; 940 cardbus_function_tag_t cf = ct->ct_cf; 941 942 value = cardbus_conf_read(cc, cf, tag, offset + PCI_PMCSR); 943 now = value & PCI_PMCSR_STATE_MASK; 944 switch (now) { 945 case PCI_PMCSR_STATE_D0: 946 case PCI_PMCSR_STATE_D1: 947 case PCI_PMCSR_STATE_D2: 948 case PCI_PMCSR_STATE_D3: 949 *state = now; 950 return 0; 951 default: 952 return EINVAL; 953 } 954 } 955 956 int 957 cardbus_get_powerstate(cardbus_devfunc_t ct, cardbustag_t tag, 958 cardbusreg_t *state) 959 { 960 cardbus_chipset_tag_t cc = ct->ct_cc; 961 cardbus_function_tag_t cf = ct->ct_cf; 962 int offset; 963 cardbusreg_t value; 964 965 if (!cardbus_get_capability(cc, cf, tag, PCI_CAP_PWRMGMT, &offset, &value)) 966 return EOPNOTSUPP; 967 968 return cardbus_get_powerstate_int(ct, tag, state, offset); 969 } 970 971 static int 972 cardbus_set_powerstate_int(cardbus_devfunc_t ct, cardbustag_t tag, 973 cardbusreg_t state, int offset, cardbusreg_t cap_reg) 974 { 975 cardbus_chipset_tag_t cc = ct->ct_cc; 976 cardbus_function_tag_t cf = ct->ct_cf; 977 978 cardbusreg_t value, cap, now; 979 980 cap = cap_reg >> PCI_PMCR_SHIFT; 981 value = cardbus_conf_read(cc, cf, tag, offset + PCI_PMCSR); 982 now = value & PCI_PMCSR_STATE_MASK; 983 value &= ~PCI_PMCSR_STATE_MASK; 984 985 if (now == state) 986 return 0; 987 switch (state) { 988 case PCI_PMCSR_STATE_D0: 989 value |= PCI_PMCSR_STATE_D0; 990 break; 991 case PCI_PMCSR_STATE_D1: 992 if (now == PCI_PMCSR_STATE_D2 || now == PCI_PMCSR_STATE_D3) { 993 printf("invalid transition from %d to D1\n", (int)now); 994 return EINVAL; 995 } 996 if (!(cap & PCI_PMCR_D1SUPP)) { 997 printf("D1 not supported\n"); 998 return EOPNOTSUPP; 999 } 1000 value |= PCI_PMCSR_STATE_D1; 1001 break; 1002 case PCI_PMCSR_STATE_D2: 1003 if (now == PCI_PMCSR_STATE_D3) { 1004 printf("invalid transition from %d to D2\n", (int)now); 1005 return EINVAL; 1006 } 1007 if (!(cap & PCI_PMCR_D2SUPP)) { 1008 printf("D2 not supported\n"); 1009 return EOPNOTSUPP; 1010 } 1011 value |= PCI_PMCSR_STATE_D2; 1012 break; 1013 case PCI_PMCSR_STATE_D3: 1014 value |= PCI_PMCSR_STATE_D3; 1015 break; 1016 default: 1017 return EINVAL; 1018 } 1019 1020 cardbus_conf_write(cc, cf, tag, offset + PCI_PMCSR, value); 1021 DELAY(1000); 1022 1023 return 0; 1024 } 1025 1026 int 1027 cardbus_set_powerstate(cardbus_devfunc_t ct, cardbustag_t tag, cardbusreg_t state) 1028 { 1029 cardbus_chipset_tag_t cc = ct->ct_cc; 1030 cardbus_function_tag_t cf = ct->ct_cf; 1031 int offset; 1032 cardbusreg_t value; 1033 1034 if (!cardbus_get_capability(cc, cf, tag, PCI_CAP_PWRMGMT, &offset, 1035 &value)) 1036 return EOPNOTSUPP; 1037 1038 return cardbus_set_powerstate_int(ct, tag, state, offset, value); 1039 } 1040 1041 #ifdef CARDBUS_DEBUG 1042 static const char *tuple_name(int); 1043 static const char *tuple_names[] = { 1044 "TPL_NULL", "TPL_DEVICE", "Reserved", "Reserved", /* 0-3 */ 1045 "CONFIG_CB", "CFTABLE_ENTRY_CB", "Reserved", "BAR", /* 4-7 */ 1046 "Reserved", "Reserved", "Reserved", "Reserved", /* 8-B */ 1047 "Reserved", "Reserved", "Reserved", "Reserved", /* C-F */ 1048 "CHECKSUM", "LONGLINK_A", "LONGLINK_C", "LINKTARGET", /* 10-13 */ 1049 "NO_LINK", "VERS_1", "ALTSTR", "DEVICE_A", 1050 "JEDEC_C", "JEDEC_A", "CONFIG", "CFTABLE_ENTRY", 1051 "DEVICE_OC", "DEVICE_OA", "DEVICE_GEO", "DEVICE_GEO_A", 1052 "MANFID", "FUNCID", "FUNCE", "SWIL", /* 20-23 */ 1053 "Reserved", "Reserved", "Reserved", "Reserved", /* 24-27 */ 1054 "Reserved", "Reserved", "Reserved", "Reserved", /* 28-2B */ 1055 "Reserved", "Reserved", "Reserved", "Reserved", /* 2C-2F */ 1056 "Reserved", "Reserved", "Reserved", "Reserved", /* 30-33 */ 1057 "Reserved", "Reserved", "Reserved", "Reserved", /* 34-37 */ 1058 "Reserved", "Reserved", "Reserved", "Reserved", /* 38-3B */ 1059 "Reserved", "Reserved", "Reserved", "Reserved", /* 3C-3F */ 1060 "VERS_2", "FORMAT", "GEOMETRY", "BYTEORDER", 1061 "DATE", "BATTERY", "ORG" 1062 }; 1063 #define NAME_LEN(x) (sizeof x / sizeof(x[0])) 1064 1065 static const char * 1066 tuple_name(int type) 1067 { 1068 1069 if (0 <= type && type < NAME_LEN(tuple_names)) { 1070 return (tuple_names[type]); 1071 } else if (type == 0xff) { 1072 return ("END"); 1073 } else { 1074 return ("Reserved"); 1075 } 1076 } 1077 1078 static void 1079 print_tuple(u_int8_t *tuple, int len, void *data) 1080 { 1081 int i; 1082 1083 printf("tuple: %s len %d\n", tuple_name(tuple[0]), len); 1084 1085 for (i = 0; i < len; ++i) { 1086 if (i % 16 == 0) { 1087 printf(" 0x%2x:", i); 1088 } 1089 printf(" %x", tuple[i]); 1090 if (i % 16 == 15) { 1091 printf("\n"); 1092 } 1093 } 1094 if (i % 16 != 0) { 1095 printf("\n"); 1096 } 1097 } 1098 #endif 1099 1100 void 1101 cardbus_conf_capture(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 1102 cardbustag_t tag, struct cardbus_conf_state *pcs) 1103 { 1104 int off; 1105 1106 for (off = 0; off < 16; off++) 1107 pcs->reg[off] = cardbus_conf_read(cc, cf, tag, (off * 4)); 1108 } 1109 1110 void 1111 cardbus_conf_restore(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 1112 cardbustag_t tag, struct cardbus_conf_state *pcs) 1113 { 1114 int off; 1115 cardbusreg_t val; 1116 1117 for (off = 15; off >= 0; off--) { 1118 val = cardbus_conf_read(cc, cf, tag, (off * 4)); 1119 if (val != pcs->reg[off]) 1120 cardbus_conf_write(cc, cf,tag, (off * 4), pcs->reg[off]); 1121 } 1122 } 1123 1124 void 1125 cardbus_disable_retry(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 1126 cardbustag_t tag) 1127 { 1128 cardbusreg_t retry; 1129 1130 /* 1131 * Disable retry timeout to keep PCI Tx retries from 1132 * interfering with ACPI C3 CPU state. 1133 */ 1134 retry = cardbus_conf_read(cc, cf, tag, PCI_RETRY_TIMEOUT_REG); 1135 retry &= ~PCI_RETRY_TIMEOUT_REG_MASK; 1136 cardbus_conf_write(cc, cf, tag, PCI_RETRY_TIMEOUT_REG, retry); 1137 } 1138 1139 struct cardbus_child_power { 1140 struct cardbus_conf_state p_cardbusconf; 1141 cardbus_devfunc_t p_ct; 1142 cardbustag_t p_tag; 1143 cardbus_chipset_tag_t p_cc; 1144 cardbus_function_tag_t p_cf; 1145 cardbusreg_t p_pm_cap; 1146 bool p_has_pm; 1147 int p_pm_offset; 1148 }; 1149 1150 static bool 1151 cardbus_child_suspend(device_t dv) 1152 { 1153 struct cardbus_child_power *priv = device_pmf_bus_private(dv); 1154 1155 cardbus_conf_capture(priv->p_cc, priv->p_cf, priv->p_tag, 1156 &priv->p_cardbusconf); 1157 1158 if (priv->p_has_pm && 1159 cardbus_set_powerstate_int(priv->p_ct, priv->p_tag, 1160 PCI_PMCSR_STATE_D3, priv->p_pm_offset, priv->p_pm_cap)) { 1161 aprint_error_dev(dv, "unsupported state, continuing.\n"); 1162 return false; 1163 } 1164 1165 Cardbus_function_disable(priv->p_ct); 1166 1167 return true; 1168 } 1169 1170 static bool 1171 cardbus_child_resume(device_t dv) 1172 { 1173 struct cardbus_child_power *priv = device_pmf_bus_private(dv); 1174 1175 Cardbus_function_enable(priv->p_ct); 1176 1177 if (priv->p_has_pm && 1178 cardbus_set_powerstate_int(priv->p_ct, priv->p_tag, 1179 PCI_PMCSR_STATE_D0, priv->p_pm_offset, priv->p_pm_cap)) { 1180 aprint_error_dev(dv, "unsupported state, continuing.\n"); 1181 return false; 1182 } 1183 1184 cardbus_conf_restore(priv->p_cc, priv->p_cf, priv->p_tag, 1185 &priv->p_cardbusconf); 1186 1187 return true; 1188 } 1189 1190 static void 1191 cardbus_child_deregister(device_t dv) 1192 { 1193 struct cardbus_child_power *priv = device_pmf_bus_private(dv); 1194 1195 free(priv, M_DEVBUF); 1196 } 1197 1198 static bool 1199 cardbus_child_register(device_t child) 1200 { 1201 device_t self = device_parent(child); 1202 struct cardbus_softc *sc = device_private(self); 1203 struct cardbus_devfunc *ct; 1204 struct cardbus_child_power *priv; 1205 int off; 1206 cardbusreg_t reg; 1207 1208 ct = sc->sc_funcs[device_locator(child, CARDBUSCF_FUNCTION)]; 1209 1210 priv = malloc(sizeof(*priv), M_DEVBUF, M_WAITOK); 1211 1212 priv->p_ct = ct; 1213 priv->p_cc = ct->ct_cf; 1214 priv->p_cf = ct->ct_cf; 1215 priv->p_tag = cardbus_make_tag(priv->p_cc, priv->p_cf, ct->ct_bus, 1216 ct->ct_func); 1217 1218 if (cardbus_get_capability(priv->p_cc, priv->p_cf, priv->p_tag, 1219 PCI_CAP_PWRMGMT, &off, ®)) { 1220 priv->p_has_pm = true; 1221 priv->p_pm_offset = off; 1222 priv->p_pm_cap = reg; 1223 } else { 1224 priv->p_has_pm = false; 1225 priv->p_pm_offset = -1; 1226 } 1227 1228 device_pmf_bus_register(child, priv, cardbus_child_suspend, 1229 cardbus_child_resume, cardbus_child_deregister); 1230 1231 return true; 1232 } 1233
Indexes created Wed Oct 01 07:09:59 GMT 2025