cardbus.c revision 1.82
1 /* $NetBSD: cardbus.c,v 1.82 2007/12/16 21:28:30 dyoung Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998, 1999 and 2000 5 * HAYAKAWA Koichi. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by HAYAKAWA Koichi. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 30 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 31 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: cardbus.c,v 1.82 2007/12/16 21:28:30 dyoung Exp $"); 37 38 #include "opt_cardbus.h" 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/device.h> 43 #include <sys/malloc.h> 44 #include <sys/kernel.h> 45 #include <sys/syslog.h> 46 #include <sys/proc.h> 47 #include <sys/reboot.h> /* for AB_* needed by bootverbose */ 48 49 #include <sys/bus.h> 50 51 #include <dev/cardbus/cardbusvar.h> 52 #include <dev/pci/pcidevs.h> 53 54 #include <dev/cardbus/cardbus_exrom.h> 55 56 #include <dev/pci/pcivar.h> /* XXX */ 57 #include <dev/pci/pcireg.h> /* XXX */ 58 59 #include <dev/pcmcia/pcmciareg.h> 60 61 #include "locators.h" 62 63 #if defined CARDBUS_DEBUG 64 #define STATIC 65 #define DPRINTF(a) printf a 66 #else 67 #define STATIC static 68 #define DPRINTF(a) 69 #endif 70 71 72 STATIC void cardbusattach(struct device *, struct device *, void *); 73 STATIC int cardbusdetach(device_t, int); 74 STATIC int cardbusmatch(struct device *, struct cfdata *, void *); 75 int cardbus_rescan(struct device *, const char *, const int *); 76 void cardbus_childdetached(struct device *, struct device *); 77 static int cardbusprint(void *, const char *); 78 79 typedef void (*tuple_decode_func)(u_int8_t*, int, void*); 80 81 static int decode_tuples(u_int8_t *, int, tuple_decode_func, void*); 82 #ifdef CARDBUS_DEBUG 83 static void print_tuple(u_int8_t*, int, void*); 84 #endif 85 86 static int cardbus_read_tuples(struct cardbus_attach_args *, 87 cardbusreg_t, u_int8_t *, size_t); 88 89 static void enable_function(struct cardbus_softc *, int, int); 90 static void disable_function(struct cardbus_softc *, int); 91 92 static bool cardbus_child_register(device_t); 93 94 CFATTACH_DECL2(cardbus, sizeof(struct cardbus_softc), 95 cardbusmatch, cardbusattach, cardbusdetach, NULL, 96 cardbus_rescan, cardbus_childdetached); 97 98 #ifndef __NetBSD_Version__ 99 struct cfdriver cardbus_cd = { 100 NULL, "cardbus", DV_DULL 101 }; 102 #endif 103 104 105 STATIC int 106 cardbusmatch(struct device *parent, struct cfdata *cf, void *aux) 107 { 108 struct cbslot_attach_args *cba = aux; 109 110 if (strcmp(cba->cba_busname, cf->cf_name)) { 111 DPRINTF(("cardbusmatch: busname differs %s <=> %s\n", 112 cba->cba_busname, cf->cf_name)); 113 return (0); 114 } 115 116 return (1); 117 } 118 119 STATIC void 120 cardbusattach(struct device *parent, struct device *self, void *aux) 121 { 122 struct cardbus_softc *sc = device_private(self); 123 struct cbslot_attach_args *cba = aux; 124 125 sc->sc_bus = cba->cba_bus; 126 sc->sc_intrline = cba->cba_intrline; 127 sc->sc_cacheline = cba->cba_cacheline; 128 sc->sc_max_lattimer = MIN(0xf8, cba->cba_max_lattimer); 129 130 aprint_naive("\n"); 131 aprint_normal(": bus %d", sc->sc_bus); 132 if (bootverbose) 133 aprint_normal(" cacheline 0x%x, lattimer 0x%x", 134 sc->sc_cacheline, sc->sc_max_lattimer); 135 aprint_normal("\n"); 136 137 sc->sc_iot = cba->cba_iot; /* CardBus I/O space tag */ 138 sc->sc_memt = cba->cba_memt; /* CardBus MEM space tag */ 139 sc->sc_dmat = cba->cba_dmat; /* DMA tag */ 140 sc->sc_cc = cba->cba_cc; 141 sc->sc_cf = cba->cba_cf; 142 143 #if rbus 144 sc->sc_rbus_iot = cba->cba_rbus_iot; 145 sc->sc_rbus_memt = cba->cba_rbus_memt; 146 #endif 147 148 if (!pmf_device_register(self, NULL, NULL)) 149 aprint_error_dev(self, "couldn't establish power handler\n"); 150 } 151 152 STATIC int 153 cardbusdetach(device_t self, int flags) 154 { 155 int rc; 156 157 if ((rc = config_detach_children(self, flags)) != 0) 158 return rc; 159 160 pmf_device_deregister(self); 161 return 0; 162 } 163 164 static int 165 cardbus_read_tuples(struct cardbus_attach_args *ca, cardbusreg_t cis_ptr, 166 u_int8_t *tuples, size_t len) 167 { 168 struct cardbus_softc *sc = ca->ca_ct->ct_sc; 169 cardbus_chipset_tag_t cc = ca->ca_ct->ct_cc; 170 cardbus_function_tag_t cf = ca->ca_ct->ct_cf; 171 cardbustag_t tag = ca->ca_tag; 172 cardbusreg_t command; 173 bus_space_tag_t bar_tag; 174 bus_space_handle_t bar_memh; 175 bus_size_t bar_size; 176 bus_addr_t bar_addr; 177 cardbusreg_t reg; 178 int found = 0; 179 int cardbus_space = cis_ptr & CARDBUS_CIS_ASIMASK; 180 int i, j; 181 182 memset(tuples, 0, len); 183 184 cis_ptr = cis_ptr & CARDBUS_CIS_ADDRMASK; 185 186 switch (cardbus_space) { 187 case CARDBUS_CIS_ASI_TUPLE: 188 DPRINTF(("%s: reading CIS data from configuration space\n", 189 sc->sc_dev.dv_xname)); 190 for (i = cis_ptr, j = 0; i < 0xff; i += 4) { 191 u_int32_t e = (*cf->cardbus_conf_read)(cc, tag, i); 192 tuples[j] = 0xff & e; 193 e >>= 8; 194 tuples[j + 1] = 0xff & e; 195 e >>= 8; 196 tuples[j + 2] = 0xff & e; 197 e >>= 8; 198 tuples[j + 3] = 0xff & e; 199 j += 4; 200 } 201 found++; 202 break; 203 204 case CARDBUS_CIS_ASI_BAR0: 205 case CARDBUS_CIS_ASI_BAR1: 206 case CARDBUS_CIS_ASI_BAR2: 207 case CARDBUS_CIS_ASI_BAR3: 208 case CARDBUS_CIS_ASI_BAR4: 209 case CARDBUS_CIS_ASI_BAR5: 210 case CARDBUS_CIS_ASI_ROM: 211 if (cardbus_space == CARDBUS_CIS_ASI_ROM) { 212 reg = CARDBUS_ROM_REG; 213 DPRINTF(("%s: reading CIS data from ROM\n", 214 sc->sc_dev.dv_xname)); 215 } else { 216 reg = CARDBUS_CIS_ASI_BAR(cardbus_space); 217 DPRINTF(("%s: reading CIS data from BAR%d\n", 218 sc->sc_dev.dv_xname, cardbus_space - 1)); 219 } 220 221 /* 222 * XXX zero register so mapreg_map doesn't get confused by old 223 * contents. 224 */ 225 cardbus_conf_write(cc, cf, tag, reg, 0); 226 if (Cardbus_mapreg_map(ca->ca_ct, reg, 227 CARDBUS_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 228 0, &bar_tag, &bar_memh, &bar_addr, &bar_size)) { 229 printf("%s: failed to map memory\n", 230 sc->sc_dev.dv_xname); 231 return (1); 232 } 233 234 if (cardbus_space == CARDBUS_CIS_ASI_ROM) { 235 cardbusreg_t exrom; 236 int save; 237 struct cardbus_rom_image_head rom_image; 238 struct cardbus_rom_image *p; 239 240 save = splhigh(); 241 /* enable rom address decoder */ 242 exrom = cardbus_conf_read(cc, cf, tag, reg); 243 cardbus_conf_write(cc, cf, tag, reg, exrom | 1); 244 245 command = cardbus_conf_read(cc, cf, tag, 246 CARDBUS_COMMAND_STATUS_REG); 247 cardbus_conf_write(cc, cf, tag, 248 CARDBUS_COMMAND_STATUS_REG, 249 command | CARDBUS_COMMAND_MEM_ENABLE); 250 251 if (cardbus_read_exrom(ca->ca_memt, bar_memh, 252 &rom_image)) 253 goto out; 254 255 SIMPLEQ_FOREACH(p, &rom_image, next) { 256 if (p->rom_image == 257 CARDBUS_CIS_ASI_ROM_IMAGE(cis_ptr)) { 258 bus_space_read_region_1(p->romt, 259 p->romh, CARDBUS_CIS_ADDR(cis_ptr), 260 tuples, MIN(p->image_size, len)); 261 found++; 262 break; 263 } 264 } 265 while ((p = SIMPLEQ_FIRST(&rom_image)) != NULL) { 266 SIMPLEQ_REMOVE_HEAD(&rom_image, next); 267 free(p, M_DEVBUF); 268 } 269 out: 270 exrom = cardbus_conf_read(cc, cf, tag, reg); 271 cardbus_conf_write(cc, cf, tag, reg, exrom & ~1); 272 splx(save); 273 } else { 274 command = cardbus_conf_read(cc, cf, tag, 275 CARDBUS_COMMAND_STATUS_REG); 276 cardbus_conf_write(cc, cf, tag, 277 CARDBUS_COMMAND_STATUS_REG, 278 command | CARDBUS_COMMAND_MEM_ENABLE); 279 /* XXX byte order? */ 280 bus_space_read_region_1(ca->ca_memt, bar_memh, 281 cis_ptr, tuples, MIN(bar_size, len)); 282 found++; 283 } 284 command = cardbus_conf_read(cc, cf, tag, 285 CARDBUS_COMMAND_STATUS_REG); 286 cardbus_conf_write(cc, cf, tag, CARDBUS_COMMAND_STATUS_REG, 287 command & ~CARDBUS_COMMAND_MEM_ENABLE); 288 cardbus_conf_write(cc, cf, tag, reg, 0); 289 290 Cardbus_mapreg_unmap(ca->ca_ct, reg, bar_tag, bar_memh, 291 bar_size); 292 break; 293 294 #ifdef DIAGNOSTIC 295 default: 296 panic("%s: bad CIS space (%d)", sc->sc_dev.dv_xname, 297 cardbus_space); 298 #endif 299 } 300 return (!found); 301 } 302 303 static void 304 parse_tuple(u_int8_t *tuple, int len, void *data) 305 { 306 struct cardbus_cis_info *cis = data; 307 char *p; 308 int i, bar_index; 309 310 switch (tuple[0]) { 311 case PCMCIA_CISTPL_MANFID: 312 if (tuple[1] != 4) { 313 DPRINTF(("%s: wrong length manufacturer id (%d)\n", 314 __func__, tuple[1])); 315 break; 316 } 317 cis->manufacturer = tuple[2] | (tuple[3] << 8); 318 cis->product = tuple[4] | (tuple[5] << 8); 319 break; 320 321 case PCMCIA_CISTPL_VERS_1: 322 memcpy(cis->cis1_info_buf, tuple + 2, tuple[1]); 323 i = 0; 324 p = cis->cis1_info_buf + 2; 325 while (i < 326 sizeof(cis->cis1_info) / sizeof(cis->cis1_info[0])) { 327 if (p >= cis->cis1_info_buf + tuple[1] || *p == '\xff') 328 break; 329 cis->cis1_info[i++] = p; 330 while (*p != '\0' && *p != '\xff') 331 p++; 332 if (*p == '\0') 333 p++; 334 } 335 break; 336 337 case PCMCIA_CISTPL_BAR: 338 if (tuple[1] != 6) { 339 DPRINTF(("%s: BAR with short length (%d)\n", 340 __func__, tuple[1])); 341 break; 342 } 343 bar_index = tuple[2] & 7; 344 if (bar_index == 0) { 345 DPRINTF(("%s: invalid ASI in BAR tuple\n", __func__)); 346 break; 347 } 348 bar_index--; 349 cis->bar[bar_index].flags = tuple[2]; 350 cis->bar[bar_index].size = 351 (tuple[4] << 0) | 352 (tuple[5] << 8) | 353 (tuple[6] << 16) | 354 (tuple[7] << 24); 355 break; 356 357 case PCMCIA_CISTPL_FUNCID: 358 cis->funcid = tuple[2]; 359 break; 360 361 case PCMCIA_CISTPL_FUNCE: 362 switch (cis->funcid) { 363 case PCMCIA_FUNCTION_SERIAL: 364 if (tuple[1] >= 2 && 365 /* XXX PCMCIA_TPLFE_TYPE_SERIAL_??? */ 366 tuple[2] == 0) { 367 cis->funce.serial.uart_type = tuple[3] & 0x1f; 368 cis->funce.serial.uart_present = 1; 369 } 370 break; 371 372 case PCMCIA_FUNCTION_NETWORK: 373 if (tuple[1] >= 8 && 374 tuple[2] == PCMCIA_TPLFE_TYPE_LAN_NID) { 375 if (tuple[3] > 376 sizeof(cis->funce.network.netid)) { 377 DPRINTF(("%s: unknown network id type " 378 "(len = %d)\n", 379 __func__, tuple[3])); 380 } else { 381 cis->funce.network.netid_present = 1; 382 memcpy(cis->funce.network.netid, 383 tuple + 4, tuple[3]); 384 } 385 } 386 break; 387 } 388 break; 389 } 390 } 391 392 /* 393 * int cardbus_attach_card(struct cardbus_softc *sc) 394 * 395 * This function attaches the card on the slot: turns on power, 396 * reads and analyses tuple, sets configuration index. 397 * 398 * This function returns the number of recognised device functions. 399 * If no functions are recognised, return 0. 400 */ 401 int 402 cardbus_attach_card(struct cardbus_softc *sc) 403 { 404 cardbus_chipset_tag_t cc; 405 cardbus_function_tag_t cf; 406 int cdstatus; 407 static int wildcard[CARDBUSCF_NLOCS] = { 408 CARDBUSCF_FUNCTION_DEFAULT 409 }; 410 411 cc = sc->sc_cc; 412 cf = sc->sc_cf; 413 414 DPRINTF(("cardbus_attach_card: cb%d start\n", 415 device_unit(&sc->sc_dev))); 416 417 /* inspect initial voltage */ 418 if ((cdstatus = (*cf->cardbus_ctrl)(cc, CARDBUS_CD)) == 0) { 419 DPRINTF(("%s: no CardBus card on cb%d\n", __func__, 420 device_unit(&sc->sc_dev))); 421 return (0); 422 } 423 424 device_pmf_driver_set_child_register(&sc->sc_dev, cardbus_child_register); 425 cardbus_rescan(&sc->sc_dev, "cardbus", wildcard); 426 return (1); /* XXX */ 427 } 428 429 int 430 cardbus_rescan(struct device *self, const char *ifattr, 431 const int *locators) 432 { 433 struct cardbus_softc *sc = device_private(self); 434 cardbus_chipset_tag_t cc; 435 cardbus_function_tag_t cf; 436 cardbustag_t tag; 437 cardbusreg_t id, class, cis_ptr; 438 cardbusreg_t bhlc, icr, lattimer; 439 int cdstatus; 440 int function, nfunction; 441 struct device *csc; 442 cardbus_devfunc_t ct; 443 444 cc = sc->sc_cc; 445 cf = sc->sc_cf; 446 447 /* inspect initial voltage */ 448 if ((cdstatus = (*cf->cardbus_ctrl)(cc, CARDBUS_CD)) == 0) { 449 DPRINTF(("%s: no CardBus card on cb%d\n", __func__, 450 device_unit(&sc->sc_dev))); 451 return (0); 452 } 453 454 /* 455 * XXX use fake function 8 to keep power on during whole 456 * configuration. 457 */ 458 enable_function(sc, cdstatus, 8); 459 function = 0; 460 461 tag = cardbus_make_tag(cc, cf, sc->sc_bus, function); 462 463 /* 464 * Wait until power comes up. Maxmum 500 ms. 465 * 466 * XXX What is this for? The bridge driver ought to have waited 467 * XXX already. 468 */ 469 { 470 int i; 471 472 for (i = 0; i < 5; ++i) { 473 id = cardbus_conf_read(cc, cf, tag, CARDBUS_ID_REG); 474 if (id != 0xffffffff && id != 0) { 475 break; 476 } 477 if (cold) { /* before kernel thread invoked */ 478 delay(100 * 1000); 479 } else { /* thread context */ 480 if (tsleep((void *)sc, PCATCH, "cardbus", 481 hz / 10) != EWOULDBLOCK) { 482 break; 483 } 484 } 485 } 486 if (i == 5) { 487 return (EIO); 488 } 489 } 490 491 bhlc = cardbus_conf_read(cc, cf, tag, CARDBUS_BHLC_REG); 492 DPRINTF(("%s bhlc 0x%08x -> ", sc->sc_dev.dv_xname, bhlc)); 493 nfunction = CARDBUS_HDRTYPE_MULTIFN(bhlc) ? 8 : 1; 494 495 for (function = 0; function < nfunction; function++) { 496 struct cardbus_attach_args ca; 497 int locs[CARDBUSCF_NLOCS]; 498 499 if (locators[CARDBUSCF_FUNCTION] != 500 CARDBUSCF_FUNCTION_DEFAULT && 501 locators[CARDBUSCF_FUNCTION] != function) 502 continue; 503 504 if (sc->sc_funcs[function]) 505 continue; 506 507 tag = cardbus_make_tag(cc, cf, sc->sc_bus, function); 508 509 id = cardbus_conf_read(cc, cf, tag, CARDBUS_ID_REG); 510 class = cardbus_conf_read(cc, cf, tag, CARDBUS_CLASS_REG); 511 cis_ptr = cardbus_conf_read(cc, cf, tag, CARDBUS_CIS_REG); 512 513 /* Invalid vendor ID value? */ 514 if (CARDBUS_VENDOR(id) == PCI_VENDOR_INVALID) { 515 continue; 516 } 517 518 DPRINTF(("cardbus_attach_card: " 519 "Vendor 0x%x, Product 0x%x, CIS 0x%x\n", 520 CARDBUS_VENDOR(id), CARDBUS_PRODUCT(id), cis_ptr)); 521 522 enable_function(sc, cdstatus, function); 523 524 /* clean up every BAR */ 525 cardbus_conf_write(cc, cf, tag, CARDBUS_BASE0_REG, 0); 526 cardbus_conf_write(cc, cf, tag, CARDBUS_BASE1_REG, 0); 527 cardbus_conf_write(cc, cf, tag, CARDBUS_BASE2_REG, 0); 528 cardbus_conf_write(cc, cf, tag, CARDBUS_BASE3_REG, 0); 529 cardbus_conf_write(cc, cf, tag, CARDBUS_BASE4_REG, 0); 530 cardbus_conf_write(cc, cf, tag, CARDBUS_BASE5_REG, 0); 531 cardbus_conf_write(cc, cf, tag, CARDBUS_ROM_REG, 0); 532 533 /* set initial latency and cacheline size */ 534 bhlc = cardbus_conf_read(cc, cf, tag, CARDBUS_BHLC_REG); 535 icr = cardbus_conf_read(cc, cf, tag, CARDBUS_INTERRUPT_REG); 536 DPRINTF(("%s func%d icr 0x%08x bhlc 0x%08x -> ", 537 device_xname(&sc->sc_dev), function, icr, bhlc)); 538 bhlc &= ~(CARDBUS_CACHELINE_MASK << CARDBUS_CACHELINE_SHIFT); 539 bhlc |= (sc->sc_cacheline & CARDBUS_CACHELINE_MASK) << 540 CARDBUS_CACHELINE_SHIFT; 541 /* 542 * Set the initial value of the Latency Timer. 543 * 544 * While a PCI device owns the bus, its Latency 545 * Timer counts down bus cycles from its initial 546 * value to 0. Minimum Grant tells for how long 547 * the device wants to own the bus once it gets 548 * access, in units of 250ns. 549 * 550 * On a 33 MHz bus, there are 8 cycles per 250ns. 551 * So I multiply the Minimum Grant by 8 to find 552 * out the initial value of the Latency Timer. 553 * 554 * Avoid setting a Latency Timer less than 0x10, 555 * since the old code did not do that. 556 */ 557 lattimer = 558 MIN(sc->sc_max_lattimer, MAX(0x10, 8 * PCI_MIN_GNT(icr))); 559 if (PCI_LATTIMER(bhlc) < lattimer) { 560 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 561 bhlc |= (lattimer << PCI_LATTIMER_SHIFT); 562 } 563 564 cardbus_conf_write(cc, cf, tag, CARDBUS_BHLC_REG, bhlc); 565 bhlc = cardbus_conf_read(cc, cf, tag, CARDBUS_BHLC_REG); 566 DPRINTF(("0x%08x\n", bhlc)); 567 568 /* 569 * We need to allocate the ct here, since we might 570 * need it when reading the CIS 571 */ 572 if ((ct = malloc(sizeof(struct cardbus_devfunc), 573 M_DEVBUF, M_NOWAIT)) == NULL) { 574 panic("no room for cardbus_tag"); 575 } 576 577 ct->ct_bhlc = bhlc; 578 ct->ct_cc = sc->sc_cc; 579 ct->ct_cf = sc->sc_cf; 580 ct->ct_bus = sc->sc_bus; 581 ct->ct_func = function; 582 ct->ct_sc = sc; 583 sc->sc_funcs[function] = ct; 584 585 memset(&ca, 0, sizeof(ca)); 586 587 ca.ca_ct = ct; 588 589 ca.ca_iot = sc->sc_iot; 590 ca.ca_memt = sc->sc_memt; 591 ca.ca_dmat = sc->sc_dmat; 592 593 #if rbus 594 ca.ca_rbus_iot = sc->sc_rbus_iot; 595 ca.ca_rbus_memt= sc->sc_rbus_memt; 596 #endif 597 598 ca.ca_tag = tag; 599 ca.ca_bus = sc->sc_bus; 600 ca.ca_function = function; 601 ca.ca_id = id; 602 ca.ca_class = class; 603 604 ca.ca_intrline = sc->sc_intrline; 605 606 if (cis_ptr != 0) { 607 #define TUPLESIZE 2048 608 u_int8_t *tuple = malloc(TUPLESIZE, M_DEVBUF, M_WAITOK); 609 if (cardbus_read_tuples(&ca, cis_ptr, 610 tuple, TUPLESIZE)) { 611 printf("cardbus_attach_card: " 612 "failed to read CIS\n"); 613 } else { 614 #ifdef CARDBUS_DEBUG 615 decode_tuples(tuple, TUPLESIZE, 616 print_tuple, NULL); 617 #endif 618 decode_tuples(tuple, TUPLESIZE, 619 parse_tuple, &ca.ca_cis); 620 } 621 free(tuple, M_DEVBUF); 622 } 623 624 locs[CARDBUSCF_FUNCTION] = function; 625 626 if ((csc = config_found_sm_loc((void *)sc, "cardbus", locs, 627 &ca, cardbusprint, config_stdsubmatch)) == NULL) { 628 /* do not match */ 629 disable_function(sc, function); 630 sc->sc_funcs[function] = NULL; 631 free(ct, M_DEVBUF); 632 } else { 633 /* found */ 634 ct->ct_device = csc; 635 } 636 } 637 /* 638 * XXX power down pseudo function 8 (this will power down the card 639 * if no functions were attached). 640 */ 641 disable_function(sc, 8); 642 643 return (0); 644 } 645 646 static int 647 cardbusprint(void *aux, const char *pnp) 648 { 649 struct cardbus_attach_args *ca = aux; 650 char devinfo[256]; 651 int i; 652 653 if (pnp) { 654 pci_devinfo(ca->ca_id, ca->ca_class, 1, devinfo, 655 sizeof(devinfo)); 656 for (i = 0; i < 4; i++) { 657 if (ca->ca_cis.cis1_info[i] == NULL) 658 break; 659 if (i) 660 aprint_normal(", "); 661 aprint_normal("%s", ca->ca_cis.cis1_info[i]); 662 } 663 aprint_verbose("%s(manufacturer 0x%x, product 0x%x)", 664 i ? " " : "", 665 ca->ca_cis.manufacturer, ca->ca_cis.product); 666 aprint_normal(" %s at %s", devinfo, pnp); 667 } 668 aprint_normal(" function %d", ca->ca_function); 669 670 return (UNCONF); 671 } 672 673 /* 674 * void cardbus_detach_card(struct cardbus_softc *sc) 675 * 676 * This function detaches the card on the slot: detach device data 677 * structure and turns off the power. 678 * 679 * This function must not be called under interrupt context. 680 */ 681 void 682 cardbus_detach_card(struct cardbus_softc *sc) 683 { 684 int f; 685 struct cardbus_devfunc *ct; 686 687 for (f = 0; f < 8; f++) { 688 ct = sc->sc_funcs[f]; 689 if (!ct) 690 continue; 691 692 DPRINTF(("%s: detaching %s\n", sc->sc_dev.dv_xname, 693 ct->ct_device->dv_xname)); 694 /* call device detach function */ 695 696 if (config_detach(ct->ct_device, 0) != 0) { 697 printf("%s: cannot detach dev %s, function %d\n", 698 sc->sc_dev.dv_xname, ct->ct_device->dv_xname, 699 ct->ct_func); 700 } 701 } 702 703 sc->sc_poweron_func = 0; 704 (*sc->sc_cf->cardbus_power)(sc->sc_cc, 705 CARDBUS_VCC_0V | CARDBUS_VPP_0V); 706 } 707 708 void 709 cardbus_childdetached(struct device *self, struct device *child) 710 { 711 struct cardbus_softc *sc = device_private(self); 712 struct cardbus_devfunc *ct; 713 714 ct = sc->sc_funcs[device_locator(child, CARDBUSCF_FUNCTION)]; 715 KASSERT(ct->ct_device == child); 716 717 sc->sc_poweron_func &= ~(1 << ct->ct_func); 718 sc->sc_funcs[ct->ct_func] = NULL; 719 free(ct, M_DEVBUF); 720 } 721 722 /* 723 * void *cardbus_intr_establish(cc, cf, irq, level, func, arg) 724 * Interrupt handler of pccard. 725 * args: 726 * cardbus_chipset_tag_t *cc 727 * int irq: 728 */ 729 void * 730 cardbus_intr_establish(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 731 cardbus_intr_handle_t irq, int level, int (*func)(void *), void *arg) 732 { 733 734 DPRINTF(("- cardbus_intr_establish: irq %d\n", irq)); 735 return ((*cf->cardbus_intr_establish)(cc, irq, level, func, arg)); 736 } 737 738 /* 739 * void cardbus_intr_disestablish(cc, cf, handler) 740 * Interrupt handler of pccard. 741 * args: 742 * cardbus_chipset_tag_t *cc 743 */ 744 void 745 cardbus_intr_disestablish(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 746 void *handler) 747 { 748 749 DPRINTF(("- pccard_intr_disestablish\n")); 750 (*cf->cardbus_intr_disestablish)(cc, handler); 751 } 752 753 /* 754 * XXX this should be merged with cardbus_function_{enable,disable}, 755 * but we don't have a ct when these functions are called. 756 */ 757 static void 758 enable_function(struct cardbus_softc *sc, int cdstatus, int function) 759 { 760 761 if (sc->sc_poweron_func == 0) { 762 /* switch to 3V and/or wait for power to stabilize */ 763 if (cdstatus & CARDBUS_3V_CARD) { 764 /* 765 * sc_poweron_func must be substituted before 766 * entering sleep, in order to avoid turn on 767 * power twice. 768 */ 769 sc->sc_poweron_func |= (1 << function); 770 (*sc->sc_cf->cardbus_power)(sc->sc_cc, CARDBUS_VCC_3V); 771 } else { 772 /* No cards other than 3.3V cards. */ 773 return; 774 } 775 (*sc->sc_cf->cardbus_ctrl)(sc->sc_cc, CARDBUS_RESET); 776 } 777 sc->sc_poweron_func |= (1 << function); 778 } 779 780 static void 781 disable_function(struct cardbus_softc *sc, int function) 782 { 783 784 sc->sc_poweron_func &= ~(1 << function); 785 if (sc->sc_poweron_func == 0) { 786 /* power-off because no functions are enabled */ 787 (*sc->sc_cf->cardbus_power)(sc->sc_cc, CARDBUS_VCC_0V); 788 } 789 } 790 791 /* 792 * int cardbus_function_enable(struct cardbus_softc *sc, int func) 793 * 794 * This function enables a function on a card. When no power is 795 * applied on the card, power will be applied on it. 796 */ 797 int 798 cardbus_function_enable(struct cardbus_softc *sc, int func) 799 { 800 cardbus_chipset_tag_t cc = sc->sc_cc; 801 cardbus_function_tag_t cf = sc->sc_cf; 802 cardbus_devfunc_t ct; 803 cardbusreg_t command; 804 cardbustag_t tag; 805 806 DPRINTF(("entering cardbus_function_enable... ")); 807 808 /* entering critical area */ 809 810 /* XXX: sc_vold should be used */ 811 enable_function(sc, CARDBUS_3V_CARD, func); 812 813 /* exiting critical area */ 814 815 tag = cardbus_make_tag(cc, cf, sc->sc_bus, func); 816 817 command = cardbus_conf_read(cc, cf, tag, CARDBUS_COMMAND_STATUS_REG); 818 command |= (CARDBUS_COMMAND_MEM_ENABLE | CARDBUS_COMMAND_IO_ENABLE | 819 CARDBUS_COMMAND_MASTER_ENABLE); /* XXX: good guess needed */ 820 821 cardbus_conf_write(cc, cf, tag, CARDBUS_COMMAND_STATUS_REG, command); 822 823 if ((ct = sc->sc_funcs[func]) != NULL) 824 Cardbus_conf_write(ct, tag, CARDBUS_BHLC_REG, ct->ct_bhlc); 825 826 cardbus_free_tag(cc, cf, tag); 827 828 DPRINTF(("%x\n", sc->sc_poweron_func)); 829 830 return (0); 831 } 832 833 /* 834 * int cardbus_function_disable(struct cardbus_softc *, int func) 835 * 836 * This function disable a function on a card. When no functions are 837 * enabled, it turns off the power. 838 */ 839 int 840 cardbus_function_disable(struct cardbus_softc *sc, int func) 841 { 842 843 DPRINTF(("entering cardbus_function_disable... ")); 844 845 disable_function(sc, func); 846 847 return (0); 848 } 849 850 /* 851 * int cardbus_get_capability(cardbus_chipset_tag_t cc, 852 * cardbus_function_tag_t cf, cardbustag_t tag, int capid, int *offset, 853 * cardbusreg_t *value) 854 * 855 * Find the specified PCI capability. 856 */ 857 int 858 cardbus_get_capability(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 859 cardbustag_t tag, int capid, int *offset, cardbusreg_t *value) 860 { 861 cardbusreg_t reg; 862 unsigned int ofs; 863 864 reg = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG); 865 if (!(reg & PCI_STATUS_CAPLIST_SUPPORT)) 866 return (0); 867 868 ofs = PCI_CAPLIST_PTR(cardbus_conf_read(cc, cf, tag, 869 PCI_CAPLISTPTR_REG)); 870 while (ofs != 0) { 871 #ifdef DIAGNOSTIC 872 if ((ofs & 3) || (ofs < 0x40)) 873 panic("cardbus_get_capability"); 874 #endif 875 reg = cardbus_conf_read(cc, cf, tag, ofs); 876 if (PCI_CAPLIST_CAP(reg) == capid) { 877 if (offset) 878 *offset = ofs; 879 if (value) 880 *value = reg; 881 return (1); 882 } 883 ofs = PCI_CAPLIST_NEXT(reg); 884 } 885 886 return (0); 887 } 888 889 /* 890 * below this line, there are some functions for decoding tuples. 891 * They should go out from this file. 892 */ 893 894 static u_int8_t * 895 decode_tuple(u_int8_t *, u_int8_t *, tuple_decode_func, void *); 896 897 static int 898 decode_tuples(u_int8_t *tuple, int buflen, tuple_decode_func func, void *data) 899 { 900 u_int8_t *tp = tuple; 901 902 if (PCMCIA_CISTPL_LINKTARGET != *tuple) { 903 DPRINTF(("WRONG TUPLE: 0x%x\n", *tuple)); 904 return (0); 905 } 906 907 while ((tp = decode_tuple(tp, tuple + buflen, func, data)) != NULL) 908 ; 909 910 return (1); 911 } 912 913 static u_int8_t * 914 decode_tuple(u_int8_t *tuple, u_int8_t *end, 915 tuple_decode_func func, void *data) 916 { 917 u_int8_t type; 918 u_int8_t len; 919 920 type = tuple[0]; 921 switch (type) { 922 case PCMCIA_CISTPL_NULL: 923 case PCMCIA_CISTPL_END: 924 len = 1; 925 break; 926 default: 927 if (tuple + 2 > end) 928 return (NULL); 929 len = tuple[1] + 2; 930 break; 931 } 932 933 if (tuple + len > end) 934 return (NULL); 935 936 (*func)(tuple, len, data); 937 938 if (type == PCMCIA_CISTPL_END || tuple + len == end) 939 return (NULL); 940 941 return (tuple + len); 942 } 943 944 /* 945 * XXX: this is another reason why this code should be shared with PCI. 946 */ 947 static int 948 cardbus_get_powerstate_int(cardbus_devfunc_t ct, cardbustag_t tag, 949 cardbusreg_t *state, int offset) 950 { 951 cardbusreg_t value, now; 952 cardbus_chipset_tag_t cc = ct->ct_cc; 953 cardbus_function_tag_t cf = ct->ct_cf; 954 955 value = cardbus_conf_read(cc, cf, tag, offset + PCI_PMCSR); 956 now = value & PCI_PMCSR_STATE_MASK; 957 switch (now) { 958 case PCI_PMCSR_STATE_D0: 959 case PCI_PMCSR_STATE_D1: 960 case PCI_PMCSR_STATE_D2: 961 case PCI_PMCSR_STATE_D3: 962 *state = now; 963 return 0; 964 default: 965 return EINVAL; 966 } 967 } 968 969 int 970 cardbus_get_powerstate(cardbus_devfunc_t ct, cardbustag_t tag, 971 cardbusreg_t *state) 972 { 973 cardbus_chipset_tag_t cc = ct->ct_cc; 974 cardbus_function_tag_t cf = ct->ct_cf; 975 int offset; 976 cardbusreg_t value; 977 978 if (!cardbus_get_capability(cc, cf, tag, PCI_CAP_PWRMGMT, &offset, &value)) 979 return EOPNOTSUPP; 980 981 return cardbus_get_powerstate_int(ct, tag, state, offset); 982 } 983 984 static int 985 cardbus_set_powerstate_int(cardbus_devfunc_t ct, cardbustag_t tag, 986 cardbusreg_t state, int offset, cardbusreg_t cap_reg) 987 { 988 cardbus_chipset_tag_t cc = ct->ct_cc; 989 cardbus_function_tag_t cf = ct->ct_cf; 990 991 cardbusreg_t value, cap, now; 992 993 cap = cap_reg >> PCI_PMCR_SHIFT; 994 value = cardbus_conf_read(cc, cf, tag, offset + PCI_PMCSR); 995 now = value & PCI_PMCSR_STATE_MASK; 996 value &= ~PCI_PMCSR_STATE_MASK; 997 998 if (now == state) 999 return 0; 1000 switch (state) { 1001 case PCI_PMCSR_STATE_D0: 1002 value |= PCI_PMCSR_STATE_D0; 1003 break; 1004 case PCI_PMCSR_STATE_D1: 1005 if (now == PCI_PMCSR_STATE_D2 || now == PCI_PMCSR_STATE_D3) { 1006 printf("invalid transition from %d to D1\n", (int)now); 1007 return EINVAL; 1008 } 1009 if (!(cap & PCI_PMCR_D1SUPP)) { 1010 printf("D1 not supported\n"); 1011 return EOPNOTSUPP; 1012 } 1013 value |= PCI_PMCSR_STATE_D1; 1014 break; 1015 case PCI_PMCSR_STATE_D2: 1016 if (now == PCI_PMCSR_STATE_D3) { 1017 printf("invalid transition from %d to D2\n", (int)now); 1018 return EINVAL; 1019 } 1020 if (!(cap & PCI_PMCR_D2SUPP)) { 1021 printf("D2 not supported\n"); 1022 return EOPNOTSUPP; 1023 } 1024 value |= PCI_PMCSR_STATE_D2; 1025 break; 1026 case PCI_PMCSR_STATE_D3: 1027 value |= PCI_PMCSR_STATE_D3; 1028 break; 1029 default: 1030 return EINVAL; 1031 } 1032 1033 cardbus_conf_write(cc, cf, tag, offset + PCI_PMCSR, value); 1034 DELAY(1000); 1035 1036 return 0; 1037 } 1038 1039 int 1040 cardbus_set_powerstate(cardbus_devfunc_t ct, cardbustag_t tag, cardbusreg_t state) 1041 { 1042 cardbus_chipset_tag_t cc = ct->ct_cc; 1043 cardbus_function_tag_t cf = ct->ct_cf; 1044 int offset; 1045 cardbusreg_t value; 1046 1047 if (!cardbus_get_capability(cc, cf, tag, PCI_CAP_PWRMGMT, &offset, 1048 &value)) 1049 return EOPNOTSUPP; 1050 1051 return cardbus_set_powerstate_int(ct, tag, state, offset, value); 1052 } 1053 1054 #ifdef CARDBUS_DEBUG 1055 static const char *tuple_name(int); 1056 static const char *tuple_names[] = { 1057 "TPL_NULL", "TPL_DEVICE", "Reserved", "Reserved", /* 0-3 */ 1058 "CONFIG_CB", "CFTABLE_ENTRY_CB", "Reserved", "BAR", /* 4-7 */ 1059 "Reserved", "Reserved", "Reserved", "Reserved", /* 8-B */ 1060 "Reserved", "Reserved", "Reserved", "Reserved", /* C-F */ 1061 "CHECKSUM", "LONGLINK_A", "LONGLINK_C", "LINKTARGET", /* 10-13 */ 1062 "NO_LINK", "VERS_1", "ALTSTR", "DEVICE_A", 1063 "JEDEC_C", "JEDEC_A", "CONFIG", "CFTABLE_ENTRY", 1064 "DEVICE_OC", "DEVICE_OA", "DEVICE_GEO", "DEVICE_GEO_A", 1065 "MANFID", "FUNCID", "FUNCE", "SWIL", /* 20-23 */ 1066 "Reserved", "Reserved", "Reserved", "Reserved", /* 24-27 */ 1067 "Reserved", "Reserved", "Reserved", "Reserved", /* 28-2B */ 1068 "Reserved", "Reserved", "Reserved", "Reserved", /* 2C-2F */ 1069 "Reserved", "Reserved", "Reserved", "Reserved", /* 30-33 */ 1070 "Reserved", "Reserved", "Reserved", "Reserved", /* 34-37 */ 1071 "Reserved", "Reserved", "Reserved", "Reserved", /* 38-3B */ 1072 "Reserved", "Reserved", "Reserved", "Reserved", /* 3C-3F */ 1073 "VERS_2", "FORMAT", "GEOMETRY", "BYTEORDER", 1074 "DATE", "BATTERY", "ORG" 1075 }; 1076 #define NAME_LEN(x) (sizeof x / sizeof(x[0])) 1077 1078 static const char * 1079 tuple_name(int type) 1080 { 1081 1082 if (0 <= type && type < NAME_LEN(tuple_names)) { 1083 return (tuple_names[type]); 1084 } else if (type == 0xff) { 1085 return ("END"); 1086 } else { 1087 return ("Reserved"); 1088 } 1089 } 1090 1091 static void 1092 print_tuple(u_int8_t *tuple, int len, void *data) 1093 { 1094 int i; 1095 1096 printf("tuple: %s len %d\n", tuple_name(tuple[0]), len); 1097 1098 for (i = 0; i < len; ++i) { 1099 if (i % 16 == 0) { 1100 printf(" 0x%2x:", i); 1101 } 1102 printf(" %x", tuple[i]); 1103 if (i % 16 == 15) { 1104 printf("\n"); 1105 } 1106 } 1107 if (i % 16 != 0) { 1108 printf("\n"); 1109 } 1110 } 1111 #endif 1112 1113 void 1114 cardbus_conf_capture(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 1115 cardbustag_t tag, struct cardbus_conf_state *pcs) 1116 { 1117 int off; 1118 1119 for (off = 0; off < 16; off++) 1120 pcs->reg[off] = cardbus_conf_read(cc, cf, tag, (off * 4)); 1121 } 1122 1123 void 1124 cardbus_conf_restore(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 1125 cardbustag_t tag, struct cardbus_conf_state *pcs) 1126 { 1127 int off; 1128 cardbusreg_t val; 1129 1130 for (off = 15; off >= 0; off--) { 1131 val = cardbus_conf_read(cc, cf, tag, (off * 4)); 1132 if (val != pcs->reg[off]) 1133 cardbus_conf_write(cc, cf,tag, (off * 4), pcs->reg[off]); 1134 } 1135 } 1136 1137 void 1138 cardbus_disable_retry(cardbus_chipset_tag_t cc, cardbus_function_tag_t cf, 1139 cardbustag_t tag) 1140 { 1141 cardbusreg_t retry; 1142 1143 /* 1144 * Disable retry timeout to keep PCI Tx retries from 1145 * interfering with ACPI C3 CPU state. 1146 */ 1147 retry = cardbus_conf_read(cc, cf, tag, PCI_RETRY_TIMEOUT_REG); 1148 retry &= ~PCI_RETRY_TIMEOUT_REG_MASK; 1149 cardbus_conf_write(cc, cf, tag, PCI_RETRY_TIMEOUT_REG, retry); 1150 } 1151 1152 struct cardbus_child_power { 1153 struct cardbus_conf_state p_cardbusconf; 1154 cardbus_devfunc_t p_ct; 1155 cardbustag_t p_tag; 1156 cardbus_chipset_tag_t p_cc; 1157 cardbus_function_tag_t p_cf; 1158 cardbusreg_t p_pm_cap; 1159 bool p_has_pm; 1160 int p_pm_offset; 1161 }; 1162 1163 static bool 1164 cardbus_child_suspend(device_t dv) 1165 { 1166 struct cardbus_child_power *priv = device_pmf_bus_private(dv); 1167 1168 cardbus_conf_capture(priv->p_cc, priv->p_cf, priv->p_tag, 1169 &priv->p_cardbusconf); 1170 1171 if (priv->p_has_pm && 1172 cardbus_set_powerstate_int(priv->p_ct, priv->p_tag, 1173 PCI_PMCSR_STATE_D3, priv->p_pm_offset, priv->p_pm_cap)) { 1174 aprint_error_dev(dv, "unsupported state, continuing.\n"); 1175 return false; 1176 } 1177 1178 Cardbus_function_disable(priv->p_ct); 1179 1180 return true; 1181 } 1182 1183 static bool 1184 cardbus_child_resume(device_t dv) 1185 { 1186 struct cardbus_child_power *priv = device_pmf_bus_private(dv); 1187 1188 Cardbus_function_enable(priv->p_ct); 1189 1190 if (priv->p_has_pm && 1191 cardbus_set_powerstate_int(priv->p_ct, priv->p_tag, 1192 PCI_PMCSR_STATE_D0, priv->p_pm_offset, priv->p_pm_cap)) { 1193 aprint_error_dev(dv, "unsupported state, continuing.\n"); 1194 return false; 1195 } 1196 1197 cardbus_conf_restore(priv->p_cc, priv->p_cf, priv->p_tag, 1198 &priv->p_cardbusconf); 1199 1200 return true; 1201 } 1202 1203 static void 1204 cardbus_child_deregister(device_t dv) 1205 { 1206 struct cardbus_child_power *priv = device_pmf_bus_private(dv); 1207 1208 free(priv, M_DEVBUF); 1209 } 1210 1211 static bool 1212 cardbus_child_register(device_t child) 1213 { 1214 device_t self = device_parent(child); 1215 struct cardbus_softc *sc = device_private(self); 1216 struct cardbus_devfunc *ct; 1217 struct cardbus_child_power *priv; 1218 int off; 1219 cardbusreg_t reg; 1220 1221 ct = sc->sc_funcs[device_locator(child, CARDBUSCF_FUNCTION)]; 1222 1223 priv = malloc(sizeof(*priv), M_DEVBUF, M_WAITOK); 1224 1225 priv->p_ct = ct; 1226 priv->p_cc = ct->ct_cf; 1227 priv->p_cf = ct->ct_cf; 1228 priv->p_tag = cardbus_make_tag(priv->p_cc, priv->p_cf, ct->ct_bus, 1229 ct->ct_func); 1230 1231 if (cardbus_get_capability(priv->p_cc, priv->p_cf, priv->p_tag, 1232 PCI_CAP_PWRMGMT, &off, ®)) { 1233 priv->p_has_pm = true; 1234 priv->p_pm_offset = off; 1235 priv->p_pm_cap = reg; 1236 } else { 1237 priv->p_has_pm = false; 1238 priv->p_pm_offset = -1; 1239 } 1240 1241 device_pmf_bus_register(child, priv, cardbus_child_suspend, 1242 cardbus_child_resume, cardbus_child_deregister); 1243 1244 return true; 1245 } 1246
Indexes created Wed Oct 01 15:09:59 GMT 2025