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cardbusvar.h revision 1.1
      1 /*	$Id: cardbusvar.h,v 1.1 1999/10/15 06:07:19 haya Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998 and 1999
      5  *       HAYAKAWA Koichi.  All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *	This product includes software developed by the author.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission.
     20  *
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     24  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     25  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
     26  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     27  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     28  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     30  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
     31  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     32  * POSSIBILITY OF SUCH DAMAGE.
     33  */
     34 
     35 #if !defined SYS_DEV_CARDBUS_CARDBUSVAR_H
     36 #define SYS_DEV_CARDBUS_CARDBUSVAR_H
     37 
     38 #include <dev/pci/pcivar.h>	/* for pcitag_t */
     39 
     40 #if 1
     41 #include <dev/cardbus/rbus.h>
     42 #endif
     43 
     44 
     45 
     46 typedef void *cardbus_chipset_tag_t;
     47 typedef int cardbus_intr_handle_t;
     48 
     49 
     50 /* XXX they must be in cardbusreg.h */
     51 typedef u_int32_t cardbusreg_t;
     52 typedef pcitag_t cardbustag_t;
     53 typedef int cardbus_intr_line_t;
     54 
     55 #define CARDBUS_ID_REG          0x00
     56 
     57 typedef u_int16_t cardbus_vendor_id_t;
     58 typedef u_int16_t cardbus_product_id_t;
     59 
     60 #  define CARDBUS_VENDOR_SHIFT  0
     61 #  define CARDBUS_VENDOR_MASK   0xffff
     62 #  define CARDBUS_VENDOR(id) \
     63 	    (((id) >> CARDBUS_VENDOR_SHIFT) & CARDBUS_VENDOR_MASK)
     64 
     65 #  define CARDBUS_PRODUCT_SHIFT  16
     66 #  define CARDBUS_PRODUCT_MASK   0xffff
     67 #  define CARDBUS_PRODUCT(id) \
     68 	    (((id) >> CARDBUS_PRODUCT_SHIFT) & CARDBUS_PRODUCT_MASK)
     69 
     70 
     71 #define	CARDBUS_COMMAND_STATUS_REG  0x04
     72 
     73 #  define CARDBUS_COMMAND_IO_ENABLE     0x00000001
     74 #  define CARDBUS_COMMAND_MEM_ENABLE    0x00000002
     75 #  define CARDBUS_COMMAND_MASTER_ENABLE 0x00000004
     76 
     77 
     78 #define CARDBUS_CLASS_REG       0x08
     79 
     80 /* BIST, Header Type, Latency Timer, Cache Line Size */
     81 #define CARDBUS_BHLC_REG        0x0c
     82 
     83 #define	CARDBUS_BIST_SHIFT        24
     84 #define	CARDBUS_BIST_MASK       0xff
     85 #define	CARDBUS_BIST(bhlcr) \
     86 	    (((bhlcr) >> CARDBUS_BIST_SHIFT) & CARDBUS_BIST_MASK)
     87 
     88 #define	CARDBUS_HDRTYPE_SHIFT     16
     89 #define	CARDBUS_HDRTYPE_MASK    0xff
     90 #define	CARDBUS_HDRTYPE(bhlcr) \
     91 	    (((bhlcr) >> CARDBUS_HDRTYPE_SHIFT) & CARDBUS_HDRTYPE_MASK)
     92 
     93 #define	CARDBUS_HDRTYPE_TYPE(bhlcr) \
     94 	    (CARDBUS_HDRTYPE(bhlcr) & 0x7f)
     95 #define	CARDBUS_HDRTYPE_MULTIFN(bhlcr) \
     96 	    ((CARDBUS_HDRTYPE(bhlcr) & 0x80) != 0)
     97 
     98 #define	CARDBUS_LATTIMER_SHIFT      8
     99 #define	CARDBUS_LATTIMER_MASK    0xff
    100 #define	CARDBUS_LATTIMER(bhlcr) \
    101 	    (((bhlcr) >> CARDBUS_LATTIMER_SHIFT) & CARDBUS_LATTIMER_MASK)
    102 
    103 #define	CARDBUS_CACHELINE_SHIFT     0
    104 #define	CARDBUS_CACHELINE_MASK   0xff
    105 #define	CARDBUS_CACHELINE(bhlcr) \
    106 	    (((bhlcr) >> CARDBUS_CACHELINE_SHIFT) & CARDBUS_CACHELINE_MASK)
    107 
    108 
    109 /* Base Resisters */
    110 #define CARDBUS_BASE0_REG  0x10
    111 #define CARDBUS_BASE1_REG  0x14
    112 #define CARDBUS_BASE2_REG  0x18
    113 #define CARDBUS_BASE3_REG  0x1C
    114 #define CARDBUS_BASE4_REG  0x20
    115 #define CARDBUS_BASE5_REG  0x24
    116 #define CARDBUS_CIS_REG    0x28
    117 #  define CARDBUS_CIS_ASIMASK 0x07
    118 #    define CARDBUS_CIS_ASI(x) (CARDBUS_CIS_ASIMASK & (x))
    119 #  define CARDBUS_CIS_ASI_TUPLE 0x00
    120 #  define CARDBUS_CIS_ASI_BAR0  0x01
    121 #  define CARDBUS_CIS_ASI_BAR1  0x02
    122 #  define CARDBUS_CIS_ASI_BAR2  0x03
    123 #  define CARDBUS_CIS_ASI_BAR3  0x04
    124 #  define CARDBUS_CIS_ASI_BAR4  0x05
    125 #  define CARDBUS_CIS_ASI_BAR5  0x06
    126 #  define CARDBUS_CIS_ASI_ROM   0x07
    127 #  define CARDBUS_CIS_ADDRMASK 0x0ffffff8
    128 #    define CARDBUS_CIS_ADDR(x) (CARDBUS_CIS_ADDRMASK & (x))
    129 #    define CARDBUS_CIS_ASI_BAR(x) (((CARDBUS_CIS_ASIMASK & (x))-1)*4+0x10)
    130 
    131 #define	CARDBUS_INTERRUPT_REG   0x3c
    132 
    133 #define CARDBUS_MAPREG_TYPE_MEM		0x00000000
    134 #define CARDBUS_MAPREG_TYPE_IO		0x00000001
    135 
    136 /* XXX end */
    137 
    138 #if rbus
    139 
    140 typedef struct cardbus_functions {
    141   int (*cardbus_space_alloc) __P((cardbus_chipset_tag_t, rbus_tag_t,
    142 				  bus_addr_t addr, bus_size_t size,
    143 				  bus_addr_t mask, bus_size_t align,
    144 				  int flags, bus_addr_t *addrp,
    145 				  bus_space_handle_t *bshp));
    146   int (*cardbus_space_free) __P((cardbus_chipset_tag_t, rbus_tag_t,
    147 				 bus_space_handle_t, bus_size_t));
    148   void *(*cardbus_intr_establish) __P((cardbus_chipset_tag_t, int irq, int level, int (*ih)(void *), void *sc));
    149   void (*cardbus_intr_disestablish) __P((cardbus_chipset_tag_t ct, void *ih));
    150   int (*cardbus_ctrl) __P((cardbus_chipset_tag_t, int));
    151   int (*cardbus_power) __P((cardbus_chipset_tag_t, int));
    152 
    153   cardbustag_t (*cardbus_make_tag) __P((cardbus_chipset_tag_t, int, int, int));
    154   void (*cardbus_free_tag) __P((cardbus_chipset_tag_t, cardbustag_t));
    155   cardbusreg_t (*cardbus_conf_read) __P((cardbus_chipset_tag_t, cardbustag_t, int));
    156   void (*cardbus_conf_write) __P((cardbus_chipset_tag_t, cardbustag_t, int, cardbusreg_t));
    157 } cardbus_function_t, *cardbus_function_tag_t;
    158 
    159 #else
    160 
    161 typedef struct cardbus_functions {
    162   int (*cardbus_ctrl) __P((cardbus_chipset_tag_t, int));
    163   int (*cardbus_power) __P((cardbus_chipset_tag_t, int));
    164   int (*cardbus_mem_open) __P((cardbus_chipset_tag_t, int, u_int32_t, u_int32_t));
    165   int (*cardbus_mem_close) __P((cardbus_chipset_tag_t, int));
    166   int (*cardbus_io_open) __P((cardbus_chipset_tag_t, int, u_int32_t, u_int32_t));
    167   int (*cardbus_io_close) __P((cardbus_chipset_tag_t, int));
    168   void *(*cardbus_intr_establish) __P((cardbus_chipset_tag_t, int irq, int level, int (*ih)(void *), void *sc));
    169   void (*cardbus_intr_disestablish) __P((cardbus_chipset_tag_t ct, void *ih));
    170 
    171   cardbustag_t (*cardbus_make_tag) __P((cardbus_chipset_tag_t, int, int, int));  cardbusreg_t (*cardbus_conf_read) __P((cardbus_chipset_tag_t, cardbustag_t, int));
    172   void (*cardbus_conf_write) __P((cardbus_chipset_tag_t, cardbustag_t, int, cardbusreg_t));
    173 } cardbus_function_t, *cardbus_function_tag_t;
    174 #endif /* rbus */
    175 
    176 /**********************************************************************
    177 * struct cbslot_attach_args is the attach argument for cardbus card.
    178 **********************************************************************/
    179 struct cbslot_attach_args {
    180   char *cba_busname;
    181   bus_space_tag_t cba_iot;	/* cardbus i/o space tag */
    182   bus_space_tag_t cba_memt;	/* cardbus mem space tag */
    183   bus_dma_tag_t cba_dmat;	/* DMA tag */
    184 
    185   int cba_bus;			/* cardbus bus number */
    186   int cba_function;		/* slot number on this Host Bus Adaptor */
    187 
    188   cardbus_chipset_tag_t cba_cc;	/* cardbus chipset */
    189   cardbus_function_tag_t cba_cf; /* cardbus functions */
    190   int cba_intrline;		/* interrupt line */
    191 
    192 #if rbus
    193   rbus_tag_t cba_rbus_iot;	/* CardBus i/o rbus tag */
    194   rbus_tag_t cba_rbus_memt;	/* CardBus mem rbus tag */
    195 #endif
    196 
    197   int cba_cacheline;		/* cache line size */
    198   int cba_lattimer;		/* latency timer */
    199 };
    200 
    201 
    202 #define cbslotcf_dev  cf_loc[0]
    203 #define cbslotcf_func cf_loc[1]
    204 #define CBSLOT_UNK_DEV -1
    205 #define CBSLOT_UNK_FUNC -1
    206 
    207 
    208 struct cardbus_devfunc;
    209 
    210 /**********************************************************************
    211 * struct cardbus_softc is the softc for cardbus card.
    212 **********************************************************************/
    213 struct cardbus_softc {
    214   struct device sc_dev;		/* fundamental device structure */
    215 
    216   int sc_bus;			/* cardbus bus number */
    217   int sc_device;		/* cardbus device number */
    218   int sc_intrline;		/* CardBus intrline */
    219 
    220   bus_space_tag_t sc_iot;	/* CardBus I/O space tag */
    221   bus_space_tag_t sc_memt;	/* CardBus MEM space tag */
    222   bus_dma_tag_t sc_dmat;	/* DMA tag */
    223 
    224   cardbus_chipset_tag_t sc_cc;	/* CardBus chipset */
    225   cardbus_function_tag_t sc_cf;	/* CardBus function */
    226 
    227 #if rbus
    228   rbus_tag_t sc_rbus_iot;	/* CardBus i/o rbus tag */
    229   rbus_tag_t sc_rbus_memt;	/* CardBus mem rbus tag */
    230 #endif
    231 
    232   int sc_cacheline;		/* cache line size */
    233   int sc_lattimer;		/* latency timer */
    234   int sc_volt;			/* applied Vcc voltage */
    235 #define PCCARD_33V  0x02
    236 #define PCCARD_XXV  0x04
    237 #define PCCARD_YYV  0x08
    238   int sc_poweron_func;
    239   struct cardbus_devfunc *sc_funcs;	/* list of cardbus device functions */
    240 };
    241 
    242 
    243 /**********************************************************************
    244  * struct cardbus_devfunc:
    245  *
    246  *   This is the data deposit for each function of a CardBus device.
    247  *   This structure is used for memory or i/o space allocation and
    248  *   disallocation.
    249  **********************************************************************/
    250 typedef struct cardbus_devfunc {
    251   cardbus_chipset_tag_t ct_cc;
    252   cardbus_function_tag_t ct_cf;
    253   struct cardbus_softc *ct_sc;	/* pointer to the parent */
    254   int ct_bus;			/* bus number */
    255   int ct_dev;			/* device number */
    256   int ct_func;			/* function number */
    257 
    258 #if rbus
    259   rbus_tag_t ct_rbus_iot;	/* CardBus i/o rbus tag */
    260   rbus_tag_t ct_rbus_memt;	/* CardBus mem rbus tag */
    261 #endif
    262 
    263   u_int32_t ct_bar[6];		/* Base Address Regs 0 to 6 */
    264   u_int32_t ct_lc;		/* Latency timer and cache line size */
    265   /* u_int32_t ct_cisreg; */    /* CIS reg: is it needed??? */
    266 
    267   struct device *ct_device;	/* pointer to the device */
    268 
    269   struct cardbus_devfunc *ct_next;
    270 
    271   /* some data structure needed for tuple??? */
    272 } *cardbus_devfunc_t;
    273 
    274 
    275 struct cardbus_attach_args {
    276   int ca_unit;
    277   cardbus_devfunc_t ca_ct;
    278 
    279   bus_space_tag_t ca_iot;	/* CardBus I/O space tag */
    280   bus_space_tag_t ca_memt;	/* CardBus MEM space tag */
    281   bus_dma_tag_t ca_dmat;	/* DMA tag */
    282 
    283   u_int ca_device;
    284   u_int ca_function;
    285   cardbustag_t ca_tag;
    286   cardbusreg_t ca_id;
    287   cardbusreg_t ca_class;
    288 
    289   /* interrupt information */
    290   cardbus_intr_line_t ca_intrline;
    291 
    292 #if rbus
    293   rbus_tag_t ca_rbus_iot;	/* CardBus i/o rbus tag */
    294   rbus_tag_t ca_rbus_memt;	/* CardBus mem rbus tag */
    295 #endif
    296 };
    297 
    298 
    299 #define CARDBUS_ENABLE  1	/* enable the channel */
    300 #define CARDBUS_DISABLE 2	/* disable the channel */
    301 #define CARDBUS_RESET   4
    302 #define CARDBUS_CD      7
    303 #  define CARDBUS_NOCARD 0
    304 #  define CARDBUS_5V_CARD 0x01	/* XXX: It must not exist */
    305 #  define CARDBUS_3V_CARD 0x02
    306 #  define CARDBUS_XV_CARD 0x04
    307 #  define CARDBUS_YV_CARD 0x08
    308 #define CARDBUS_IO_ENABLE    100
    309 #define CARDBUS_IO_DISABLE   101
    310 #define CARDBUS_MEM_ENABLE   102
    311 #define CARDBUS_MEM_DISABLE  103
    312 #define CARDBUS_BM_ENABLE    104 /* bus master */
    313 #define CARDBUS_BM_DISABLE   105
    314 
    315 #define CARDBUS_VCC_UC  0x0000
    316 #define CARDBUS_VCC_3V  0x0001
    317 #define CARDBUS_VCC_XV  0x0002
    318 #define CARDBUS_VCC_YV  0x0003
    319 #define CARDBUS_VCC_0V  0x0004
    320 #define CARDBUS_VCC_5V  0x0005	/* ??? */
    321 #define CARDBUS_VCCMASK 0x000f
    322 #define CARDBUS_VPP_UC  0x0000
    323 #define CARDBUS_VPP_VCC 0x0010
    324 #define CARDBUS_VPP_12V 0x0030
    325 #define CARDBUS_VPP_0V  0x0040
    326 #define CARDBUS_VPPMASK 0x00f0
    327 
    328 
    329 #include "locators.h"
    330 
    331 /*
    332  * Locators devies that attach to 'cardbus', as specified to config.
    333  */
    334 #define cardbuscf_dev cf_loc[CARDBUSCF_DEV]
    335 #define CARDBUS_UNK_DEV CARDBUSCF_DEV_DEFAULT
    336 
    337 #define cardbuscf_function cf_loc[CARDBUSCF_FUNCTION]
    338 #define CARDBUS_UNK_FUNCTION CARDBUSCF_FUNCTION_DEFAULT
    339 
    340 int cardbus_attach_card __P((struct cardbus_softc *));
    341 void *cardbus_intr_establish __P((cardbus_chipset_tag_t, cardbus_function_tag_t, cardbus_intr_handle_t irq, int level, int (*func) (void *), void *arg));
    342 void cardbus_intr_disestablish __P((cardbus_chipset_tag_t, cardbus_function_tag_t, void *handler));
    343 
    344 int cardbus_mapreg_map __P((cardbus_devfunc_t, int, cardbusreg_t,
    345 			    int, bus_space_tag_t *, bus_space_handle_t *,
    346 			    bus_addr_t *, bus_size_t *));
    347 
    348 int cardbus_save_bar __P((cardbus_devfunc_t));
    349 int cardbus_restore_bar __P((cardbus_devfunc_t));
    350 
    351 int cardbus_function_enable __P((cardbus_devfunc_t));
    352 int cardbus_function_disable __P((cardbus_devfunc_t));
    353 
    354 #define Cardbus_make_tag(ct) (*(ct)->ct_cf->cardbus_make_tag)((ct)->ct_cc, (ct)->ct_bus, (ct)->ct_dev, (ct)->ct_func)
    355 #define cardbus_make_tag(cc, cf, bus, device, function) ((cf)->cardbus_make_tag)((cc), (bus), (device), (function))
    356 
    357 #define Cardbus_free_tag(ct, tag) (*(ct)->ct_cf->cardbus_free_tag)((ct)->ct_cc, (tag))
    358 
    359 #define Cardbus_conf_read(ct, tag, offs) (*(ct)->ct_cf->cardbus_conf_read)((ct)->ct_cf, (tag), (offs))
    360 #define cardbus_conf_read(cc, cf, tag, offs) ((cf)->cardbus_conf_read)((cc), (tag), (offs))
    361 #define Cardbus_conf_write(ct, tag, offs, val) (*(cc)->ct_cf->cardbus_conf_write)((ct)->ct_cf, (tag), (offs), (val))
    362 #define cardbus_conf_write(cc, cf, tag, offs, val) ((cf)->cardbus_conf_write)((cc), (tag), (offs), (val))
    363 
    364 #endif /* SYS_DEV_CARDBUS_CARDBUSVAR_H */
    365 
    366