cardbusvar.h revision 1.4
1 /* $NetBSD: cardbusvar.h,v 1.4 1999/10/27 10:04:41 haya Exp $ */ 2 3 /* 4 * Copyright (c) 1998 and 1999 5 * HAYAKAWA Koichi. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by the author. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 26 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 27 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 30 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 31 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #if !defined SYS_DEV_CARDBUS_CARDBUSVAR_H 36 #define SYS_DEV_CARDBUS_CARDBUSVAR_H 37 38 #include <dev/pci/pcivar.h> /* for pcitag_t */ 39 40 #if 1 41 #include <dev/cardbus/rbus.h> 42 #endif 43 44 45 46 typedef void *cardbus_chipset_tag_t; 47 typedef int cardbus_intr_handle_t; 48 49 50 /* XXX they must be in cardbusreg.h */ 51 typedef u_int32_t cardbusreg_t; 52 typedef pcitag_t cardbustag_t; 53 typedef int cardbus_intr_line_t; 54 55 #define CARDBUS_ID_REG 0x00 56 57 typedef u_int16_t cardbus_vendor_id_t; 58 typedef u_int16_t cardbus_product_id_t; 59 60 # define CARDBUS_VENDOR_SHIFT 0 61 # define CARDBUS_VENDOR_MASK 0xffff 62 # define CARDBUS_VENDOR(id) \ 63 (((id) >> CARDBUS_VENDOR_SHIFT) & CARDBUS_VENDOR_MASK) 64 65 # define CARDBUS_PRODUCT_SHIFT 16 66 # define CARDBUS_PRODUCT_MASK 0xffff 67 # define CARDBUS_PRODUCT(id) \ 68 (((id) >> CARDBUS_PRODUCT_SHIFT) & CARDBUS_PRODUCT_MASK) 69 70 71 #define CARDBUS_COMMAND_STATUS_REG 0x04 72 73 # define CARDBUS_COMMAND_IO_ENABLE 0x00000001 74 # define CARDBUS_COMMAND_MEM_ENABLE 0x00000002 75 # define CARDBUS_COMMAND_MASTER_ENABLE 0x00000004 76 77 78 #define CARDBUS_CLASS_REG 0x08 79 80 #define CARDBUS_CLASS_SHIFT 24 81 #define CARDBUS_CLASS_MASK 0xff 82 #define CARDBUS_CLASS(cr) \ 83 (((cr) >> CARDBUS_CLASS_SHIFT) & CARDBUS_CLASS_MASK) 84 85 #define CARDBUS_SUBCLASS_SHIFT 16 86 #define CARDBUS_SUBCLASS_MASK 0xff 87 #define CARDBUS_SUBCLASS(cr) \ 88 (((cr) >> CARDBUS_SUBCLASS_SHIFT) & CARDBUS_SUBCLASS_MASK) 89 90 #define CARDBUS_INTERFACE_SHIFT 8 91 #define CARDBUS_INTERFACE_MASK 0xff 92 #define CARDBUS_INTERFACE(cr) \ 93 (((cr) >> CARDBUS_INTERFACE_SHIFT) & CARDBUS_INTERFACE_MASK) 94 95 #define CARDBUS_REVISION_SHIFT 0 96 #define CARDBUS_REVISION_MASK 0xff 97 #define CARDBUS_REVISION(cr) \ 98 (((cr) >> CARDBUS_REVISION_SHIFT) & CARDBUS_REVISION_MASK) 99 100 /* base classes */ 101 #define CARDBUS_CLASS_PREHISTORIC 0x00 102 #define CARDBUS_CLASS_MASS_STORAGE 0x01 103 #define CARDBUS_CLASS_NETWORK 0x02 104 #define CARDBUS_CLASS_DISPLAY 0x03 105 #define CARDBUS_CLASS_MULTIMEDIA 0x04 106 #define CARDBUS_CLASS_MEMORY 0x05 107 #define CARDBUS_CLASS_BRIDGE 0x06 108 #define CARDBUS_CLASS_COMMUNICATIONS 0x07 109 #define CARDBUS_CLASS_SYSTEM 0x08 110 #define CARDBUS_CLASS_INPUT 0x09 111 #define CARDBUS_CLASS_DOCK 0x0a 112 #define CARDBUS_CLASS_PROCESSOR 0x0b 113 #define CARDBUS_CLASS_SERIALBUS 0x0c 114 #define CARDBUS_CLASS_UNDEFINED 0xff 115 116 /* 0x0c serial bus subclasses */ 117 #define CARDBUS_SUBCLASS_SERIALBUS_FIREWIRE 0x00 118 #define CARDBUS_SUBCLASS_SERIALBUS_ACCESS 0x01 119 #define CARDBUS_SUBCLASS_SERIALBUS_SSA 0x02 120 #define CARDBUS_SUBCLASS_SERIALBUS_USB 0x03 121 #define CARDBUS_SUBCLASS_SERIALBUS_FIBER 0x04 122 123 /* BIST, Header Type, Latency Timer, Cache Line Size */ 124 #define CARDBUS_BHLC_REG 0x0c 125 126 #define CARDBUS_BIST_SHIFT 24 127 #define CARDBUS_BIST_MASK 0xff 128 #define CARDBUS_BIST(bhlcr) \ 129 (((bhlcr) >> CARDBUS_BIST_SHIFT) & CARDBUS_BIST_MASK) 130 131 #define CARDBUS_HDRTYPE_SHIFT 16 132 #define CARDBUS_HDRTYPE_MASK 0xff 133 #define CARDBUS_HDRTYPE(bhlcr) \ 134 (((bhlcr) >> CARDBUS_HDRTYPE_SHIFT) & CARDBUS_HDRTYPE_MASK) 135 136 #define CARDBUS_HDRTYPE_TYPE(bhlcr) \ 137 (CARDBUS_HDRTYPE(bhlcr) & 0x7f) 138 #define CARDBUS_HDRTYPE_MULTIFN(bhlcr) \ 139 ((CARDBUS_HDRTYPE(bhlcr) & 0x80) != 0) 140 141 #define CARDBUS_LATTIMER_SHIFT 8 142 #define CARDBUS_LATTIMER_MASK 0xff 143 #define CARDBUS_LATTIMER(bhlcr) \ 144 (((bhlcr) >> CARDBUS_LATTIMER_SHIFT) & CARDBUS_LATTIMER_MASK) 145 146 #define CARDBUS_CACHELINE_SHIFT 0 147 #define CARDBUS_CACHELINE_MASK 0xff 148 #define CARDBUS_CACHELINE(bhlcr) \ 149 (((bhlcr) >> CARDBUS_CACHELINE_SHIFT) & CARDBUS_CACHELINE_MASK) 150 151 152 /* Base Resisters */ 153 #define CARDBUS_BASE0_REG 0x10 154 #define CARDBUS_BASE1_REG 0x14 155 #define CARDBUS_BASE2_REG 0x18 156 #define CARDBUS_BASE3_REG 0x1C 157 #define CARDBUS_BASE4_REG 0x20 158 #define CARDBUS_BASE5_REG 0x24 159 #define CARDBUS_CIS_REG 0x28 160 # define CARDBUS_CIS_ASIMASK 0x07 161 # define CARDBUS_CIS_ASI(x) (CARDBUS_CIS_ASIMASK & (x)) 162 # define CARDBUS_CIS_ASI_TUPLE 0x00 163 # define CARDBUS_CIS_ASI_BAR0 0x01 164 # define CARDBUS_CIS_ASI_BAR1 0x02 165 # define CARDBUS_CIS_ASI_BAR2 0x03 166 # define CARDBUS_CIS_ASI_BAR3 0x04 167 # define CARDBUS_CIS_ASI_BAR4 0x05 168 # define CARDBUS_CIS_ASI_BAR5 0x06 169 # define CARDBUS_CIS_ASI_ROM 0x07 170 # define CARDBUS_CIS_ADDRMASK 0x0ffffff8 171 # define CARDBUS_CIS_ADDR(x) (CARDBUS_CIS_ADDRMASK & (x)) 172 # define CARDBUS_CIS_ASI_BAR(x) (((CARDBUS_CIS_ASIMASK & (x))-1)*4+0x10) 173 174 #define CARDBUS_INTERRUPT_REG 0x3c 175 176 #define CARDBUS_MAPREG_TYPE_MEM 0x00000000 177 #define CARDBUS_MAPREG_TYPE_IO 0x00000001 178 179 /* XXX end */ 180 181 #if rbus 182 183 typedef struct cardbus_functions { 184 int (*cardbus_space_alloc) __P((cardbus_chipset_tag_t, rbus_tag_t, 185 bus_addr_t addr, bus_size_t size, 186 bus_addr_t mask, bus_size_t align, 187 int flags, bus_addr_t *addrp, 188 bus_space_handle_t *bshp)); 189 int (*cardbus_space_free) __P((cardbus_chipset_tag_t, rbus_tag_t, 190 bus_space_handle_t, bus_size_t)); 191 void *(*cardbus_intr_establish) __P((cardbus_chipset_tag_t, int irq, int level, int (*ih)(void *), void *sc)); 192 void (*cardbus_intr_disestablish) __P((cardbus_chipset_tag_t ct, void *ih)); 193 int (*cardbus_ctrl) __P((cardbus_chipset_tag_t, int)); 194 int (*cardbus_power) __P((cardbus_chipset_tag_t, int)); 195 196 cardbustag_t (*cardbus_make_tag) __P((cardbus_chipset_tag_t, int, int, int)); 197 void (*cardbus_free_tag) __P((cardbus_chipset_tag_t, cardbustag_t)); 198 cardbusreg_t (*cardbus_conf_read) __P((cardbus_chipset_tag_t, cardbustag_t, int)); 199 void (*cardbus_conf_write) __P((cardbus_chipset_tag_t, cardbustag_t, int, cardbusreg_t)); 200 } cardbus_function_t, *cardbus_function_tag_t; 201 202 #else 203 204 typedef struct cardbus_functions { 205 int (*cardbus_ctrl) __P((cardbus_chipset_tag_t, int)); 206 int (*cardbus_power) __P((cardbus_chipset_tag_t, int)); 207 int (*cardbus_mem_open) __P((cardbus_chipset_tag_t, int, u_int32_t, u_int32_t)); 208 int (*cardbus_mem_close) __P((cardbus_chipset_tag_t, int)); 209 int (*cardbus_io_open) __P((cardbus_chipset_tag_t, int, u_int32_t, u_int32_t)); 210 int (*cardbus_io_close) __P((cardbus_chipset_tag_t, int)); 211 void *(*cardbus_intr_establish) __P((cardbus_chipset_tag_t, int irq, int level, int (*ih)(void *), void *sc)); 212 void (*cardbus_intr_disestablish) __P((cardbus_chipset_tag_t ct, void *ih)); 213 214 cardbustag_t (*cardbus_make_tag) __P((cardbus_chipset_tag_t, int, int, int)); cardbusreg_t (*cardbus_conf_read) __P((cardbus_chipset_tag_t, cardbustag_t, int)); 215 void (*cardbus_conf_write) __P((cardbus_chipset_tag_t, cardbustag_t, int, cardbusreg_t)); 216 } cardbus_function_t, *cardbus_function_tag_t; 217 #endif /* rbus */ 218 219 /********************************************************************** 220 * struct cbslot_attach_args is the attach argument for cardbus card. 221 **********************************************************************/ 222 struct cbslot_attach_args { 223 char *cba_busname; 224 bus_space_tag_t cba_iot; /* cardbus i/o space tag */ 225 bus_space_tag_t cba_memt; /* cardbus mem space tag */ 226 bus_dma_tag_t cba_dmat; /* DMA tag */ 227 228 int cba_bus; /* cardbus bus number */ 229 int cba_function; /* slot number on this Host Bus Adaptor */ 230 231 cardbus_chipset_tag_t cba_cc; /* cardbus chipset */ 232 cardbus_function_tag_t cba_cf; /* cardbus functions */ 233 int cba_intrline; /* interrupt line */ 234 235 #if rbus 236 rbus_tag_t cba_rbus_iot; /* CardBus i/o rbus tag */ 237 rbus_tag_t cba_rbus_memt; /* CardBus mem rbus tag */ 238 #endif 239 240 int cba_cacheline; /* cache line size */ 241 int cba_lattimer; /* latency timer */ 242 }; 243 244 245 #define cbslotcf_dev cf_loc[0] 246 #define cbslotcf_func cf_loc[1] 247 #define CBSLOT_UNK_DEV -1 248 #define CBSLOT_UNK_FUNC -1 249 250 251 struct cardbus_devfunc; 252 253 /********************************************************************** 254 * struct cardbus_softc is the softc for cardbus card. 255 **********************************************************************/ 256 struct cardbus_softc { 257 struct device sc_dev; /* fundamental device structure */ 258 259 int sc_bus; /* cardbus bus number */ 260 int sc_device; /* cardbus device number */ 261 int sc_intrline; /* CardBus intrline */ 262 263 bus_space_tag_t sc_iot; /* CardBus I/O space tag */ 264 bus_space_tag_t sc_memt; /* CardBus MEM space tag */ 265 bus_dma_tag_t sc_dmat; /* DMA tag */ 266 267 cardbus_chipset_tag_t sc_cc; /* CardBus chipset */ 268 cardbus_function_tag_t sc_cf; /* CardBus function */ 269 270 #if rbus 271 rbus_tag_t sc_rbus_iot; /* CardBus i/o rbus tag */ 272 rbus_tag_t sc_rbus_memt; /* CardBus mem rbus tag */ 273 #endif 274 275 int sc_cacheline; /* cache line size */ 276 int sc_lattimer; /* latency timer */ 277 int sc_volt; /* applied Vcc voltage */ 278 #define PCCARD_33V 0x02 279 #define PCCARD_XXV 0x04 280 #define PCCARD_YYV 0x08 281 int sc_poweron_func; 282 struct cardbus_devfunc *sc_funcs; /* list of cardbus device functions */ 283 }; 284 285 286 /********************************************************************** 287 * struct cardbus_devfunc: 288 * 289 * This is the data deposit for each function of a CardBus device. 290 * This structure is used for memory or i/o space allocation and 291 * disallocation. 292 **********************************************************************/ 293 typedef struct cardbus_devfunc { 294 cardbus_chipset_tag_t ct_cc; 295 cardbus_function_tag_t ct_cf; 296 struct cardbus_softc *ct_sc; /* pointer to the parent */ 297 int ct_bus; /* bus number */ 298 int ct_dev; /* device number */ 299 int ct_func; /* function number */ 300 301 #if rbus 302 rbus_tag_t ct_rbus_iot; /* CardBus i/o rbus tag */ 303 rbus_tag_t ct_rbus_memt; /* CardBus mem rbus tag */ 304 #endif 305 306 u_int32_t ct_bar[6]; /* Base Address Regs 0 to 6 */ 307 u_int32_t ct_lc; /* Latency timer and cache line size */ 308 /* u_int32_t ct_cisreg; */ /* CIS reg: is it needed??? */ 309 310 struct device *ct_device; /* pointer to the device */ 311 312 struct cardbus_devfunc *ct_next; 313 314 /* some data structure needed for tuple??? */ 315 } *cardbus_devfunc_t; 316 317 318 struct cardbus_attach_args { 319 int ca_unit; 320 cardbus_devfunc_t ca_ct; 321 322 bus_space_tag_t ca_iot; /* CardBus I/O space tag */ 323 bus_space_tag_t ca_memt; /* CardBus MEM space tag */ 324 bus_dma_tag_t ca_dmat; /* DMA tag */ 325 326 u_int ca_device; 327 u_int ca_function; 328 cardbustag_t ca_tag; 329 cardbusreg_t ca_id; 330 cardbusreg_t ca_class; 331 332 /* interrupt information */ 333 cardbus_intr_line_t ca_intrline; 334 335 #if rbus 336 rbus_tag_t ca_rbus_iot; /* CardBus i/o rbus tag */ 337 rbus_tag_t ca_rbus_memt; /* CardBus mem rbus tag */ 338 #endif 339 }; 340 341 342 #define CARDBUS_ENABLE 1 /* enable the channel */ 343 #define CARDBUS_DISABLE 2 /* disable the channel */ 344 #define CARDBUS_RESET 4 345 #define CARDBUS_CD 7 346 # define CARDBUS_NOCARD 0 347 # define CARDBUS_5V_CARD 0x01 /* XXX: It must not exist */ 348 # define CARDBUS_3V_CARD 0x02 349 # define CARDBUS_XV_CARD 0x04 350 # define CARDBUS_YV_CARD 0x08 351 #define CARDBUS_IO_ENABLE 100 352 #define CARDBUS_IO_DISABLE 101 353 #define CARDBUS_MEM_ENABLE 102 354 #define CARDBUS_MEM_DISABLE 103 355 #define CARDBUS_BM_ENABLE 104 /* bus master */ 356 #define CARDBUS_BM_DISABLE 105 357 358 #define CARDBUS_VCC_UC 0x0000 359 #define CARDBUS_VCC_3V 0x0001 360 #define CARDBUS_VCC_XV 0x0002 361 #define CARDBUS_VCC_YV 0x0003 362 #define CARDBUS_VCC_0V 0x0004 363 #define CARDBUS_VCC_5V 0x0005 /* ??? */ 364 #define CARDBUS_VCCMASK 0x000f 365 #define CARDBUS_VPP_UC 0x0000 366 #define CARDBUS_VPP_VCC 0x0010 367 #define CARDBUS_VPP_12V 0x0030 368 #define CARDBUS_VPP_0V 0x0040 369 #define CARDBUS_VPPMASK 0x00f0 370 371 372 #include "locators.h" 373 374 /* 375 * Locators devies that attach to 'cardbus', as specified to config. 376 */ 377 #define cardbuscf_dev cf_loc[CARDBUSCF_DEV] 378 #define CARDBUS_UNK_DEV CARDBUSCF_DEV_DEFAULT 379 380 #define cardbuscf_function cf_loc[CARDBUSCF_FUNCTION] 381 #define CARDBUS_UNK_FUNCTION CARDBUSCF_FUNCTION_DEFAULT 382 383 int cardbus_attach_card __P((struct cardbus_softc *)); 384 void *cardbus_intr_establish __P((cardbus_chipset_tag_t, cardbus_function_tag_t, cardbus_intr_handle_t irq, int level, int (*func) (void *), void *arg)); 385 void cardbus_intr_disestablish __P((cardbus_chipset_tag_t, cardbus_function_tag_t, void *handler)); 386 387 int cardbus_mapreg_map __P((struct cardbus_softc *, int, int, cardbusreg_t, 388 int, bus_space_tag_t *, bus_space_handle_t *, 389 bus_addr_t *, bus_size_t *)); 390 391 int cardbus_save_bar __P((cardbus_devfunc_t)); 392 int cardbus_restore_bar __P((cardbus_devfunc_t)); 393 394 int cardbus_function_enable __P((cardbus_devfunc_t)); 395 int cardbus_function_disable __P((cardbus_devfunc_t)); 396 397 #define Cardbus_mapreg_map(ct, reg, type, busflags, tagp, handlep, basep, sizep) \ 398 cardbus_mapreg_map((ct)->ct_sc, (ct->ct_func), (reg), (type),\ 399 (busflags), (tagp), (handlep), (basep), (sizep)) 400 401 #define Cardbus_make_tag(ct) (*(ct)->ct_cf->cardbus_make_tag)((ct)->ct_cc, (ct)->ct_bus, (ct)->ct_dev, (ct)->ct_func) 402 #define cardbus_make_tag(cc, cf, bus, device, function) ((cf)->cardbus_make_tag)((cc), (bus), (device), (function)) 403 404 #define Cardbus_free_tag(ct, tag) (*(ct)->ct_cf->cardbus_free_tag)((ct)->ct_cc, (tag)) 405 #define cardbus_free_tag(cc, cf, tag) (*(cf)->cardbus_free_tag)(cc, (tag)) 406 407 #define Cardbus_conf_read(ct, tag, offs) (*(ct)->ct_cf->cardbus_conf_read)((ct)->ct_cf, (tag), (offs)) 408 #define cardbus_conf_read(cc, cf, tag, offs) ((cf)->cardbus_conf_read)((cc), (tag), (offs)) 409 #define Cardbus_conf_write(ct, tag, offs, val) (*(cc)->ct_cf->cardbus_conf_write)((ct)->ct_cf, (tag), (offs), (val)) 410 #define cardbus_conf_write(cc, cf, tag, offs, val) ((cf)->cardbus_conf_write)((cc), (tag), (offs), (val)) 411 412 #endif /* SYS_DEV_CARDBUS_CARDBUSVAR_H */ 413 414
Indexes created Tue Sep 30 11:09:46 GMT 2025