ehci_cardbus.c revision 1.37
1 /* $NetBSD: ehci_cardbus.c,v 1.37 2021/08/07 16:19:10 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: ehci_cardbus.c,v 1.37 2021/08/07 16:19:10 thorpej Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/device.h> 40 #include <sys/proc.h> 41 42 #include <sys/bus.h> 43 44 #if defined pciinc 45 #include <dev/pci/pcidevs.h> 46 #endif 47 48 #include <dev/cardbus/cardbusvar.h> 49 #include <dev/pci/pcidevs.h> 50 51 #include <dev/cardbus/usb_cardbus.h> 52 53 #include <dev/usb/usb.h> 54 #include <dev/usb/usbdi.h> 55 #include <dev/usb/usbdivar.h> 56 #include <dev/usb/usb_mem.h> 57 58 #include <dev/usb/ehcireg.h> 59 #include <dev/usb/ehcivar.h> 60 61 #ifdef EHCI_DEBUG 62 #define DPRINTF(x) if (ehcidebug) printf x 63 extern int ehcidebug; 64 #else 65 #define DPRINTF(x) 66 #endif 67 68 int ehci_cardbus_match(device_t, cfdata_t, void *); 69 void ehci_cardbus_attach(device_t, device_t, void *); 70 int ehci_cardbus_detach(device_t, int); 71 72 struct ehci_cardbus_softc { 73 ehci_softc_t sc; 74 cardbus_chipset_tag_t sc_cc; 75 cardbus_function_tag_t sc_cf; 76 cardbus_devfunc_t sc_ct; 77 void *sc_ih; /* interrupt vectoring */ 78 }; 79 80 CFATTACH_DECL_NEW(ehci_cardbus, sizeof(struct ehci_cardbus_softc), 81 ehci_cardbus_match, ehci_cardbus_attach, ehci_cardbus_detach, 82 ehci_activate); 83 84 static TAILQ_HEAD(, usb_cardbus) ehci_cardbus_alldevs = 85 TAILQ_HEAD_INITIALIZER(ehci_cardbus_alldevs); 86 87 int 88 ehci_cardbus_match(device_t parent, cfdata_t match, void *aux) 89 { 90 struct cardbus_attach_args *ca = (struct cardbus_attach_args *)aux; 91 92 if (PCI_CLASS(ca->ca_class) == PCI_CLASS_SERIALBUS && 93 PCI_SUBCLASS(ca->ca_class) == PCI_SUBCLASS_SERIALBUS_USB && 94 PCI_INTERFACE(ca->ca_class) == PCI_INTERFACE_EHCI) 95 return 1; 96 97 return 0; 98 } 99 100 static bool 101 ehci_cardbus_suspend(device_t dv, const pmf_qual_t *qual) 102 { 103 ehci_suspend(dv, qual); 104 #if 0 105 struct ehci_cardbus_softc *sc = device_private(dv); 106 ehci_release_ownership(&sc->sc, sc->sc_pc, sc->sc_tag); 107 #endif 108 109 return true; 110 } 111 112 static bool 113 ehci_cardbus_resume(device_t dv, const pmf_qual_t *qual) 114 { 115 #if 0 116 struct ehci_cardbus_softc *sc = device_private(dv); 117 ehci_get_ownership(&sc->sc, sc->sc_pc, sc->sc_tag); 118 #endif 119 return ehci_resume(dv, qual); 120 } 121 122 void 123 ehci_cardbus_attach(device_t parent, device_t self, void *aux) 124 { 125 struct ehci_cardbus_softc *sc = device_private(self); 126 struct cardbus_attach_args *ca = aux; 127 cardbus_devfunc_t ct = ca->ca_ct; 128 cardbus_chipset_tag_t cc = ct->ct_cc; 129 cardbus_function_tag_t cf = ct->ct_cf; 130 pcireg_t csr; 131 char devinfo[256]; 132 u_int ncomp; 133 const char *devname = device_xname(self); 134 struct usb_cardbus *up; 135 136 sc->sc.sc_dev = self; 137 sc->sc.sc_bus.ub_hcpriv = sc; 138 139 aprint_naive("\n"); 140 pci_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo)); 141 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 142 PCI_REVISION(ca->ca_class)); 143 144 /* Map I/O registers */ 145 if (Cardbus_mapreg_map(ct, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0, 146 &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) { 147 aprint_error("%s: can't map mem space\n", devname); 148 return; 149 } 150 151 sc->sc_cc = cc; 152 sc->sc_cf = cf; 153 sc->sc_ct = ct; 154 sc->sc.sc_bus.ub_dmatag = ca->ca_dmat; 155 156 /* Enable the device. */ 157 csr = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG); 158 Cardbus_conf_write(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG, 159 csr | PCI_COMMAND_MASTER_ENABLE 160 | PCI_COMMAND_MEM_ENABLE); 161 162 /* Disable interrupts, so we don't get any spurious ones. */ 163 sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH); 164 DPRINTF(("%s: offs=%d\n", devname, sc->sc.sc_offs)); 165 EOWRITE2(&sc->sc, EHCI_USBINTR, 0); 166 167 sc->sc_ih = Cardbus_intr_establish(ct, IPL_USB, ehci_intr, sc); 168 if (sc->sc_ih == NULL) { 169 aprint_error("%s: couldn't establish interrupt\n", devname); 170 return; 171 } 172 173 /* 174 * Find companion controllers. According to the spec they always 175 * have lower function numbers so they should be enumerated already. 176 */ 177 ncomp = 0; 178 TAILQ_FOREACH(up, &ehci_cardbus_alldevs, next) { 179 if (up->bus == ca->ca_bus) { 180 DPRINTF(("ehci_cardbus_attach: companion %s\n", 181 device_xname(up->usb))); 182 sc->sc.sc_comps[ncomp++] = up->usb; 183 if (ncomp >= EHCI_COMPANION_MAX) 184 break; 185 } 186 } 187 sc->sc.sc_ncomp = ncomp; 188 189 int err = ehci_init(&sc->sc); 190 if (err) { 191 aprint_error("%s: init failed, error=%d\n", devname, err); 192 193 /* Avoid spurious interrupts. */ 194 Cardbus_intr_disestablish(ct, sc->sc_ih); 195 sc->sc_ih = NULL; 196 197 return; 198 } 199 200 if (!pmf_device_register1(self, ehci_cardbus_suspend, 201 ehci_cardbus_resume, ehci_shutdown)) 202 aprint_error_dev(self, "couldn't establish power handler\n"); 203 204 /* Attach usb device. */ 205 sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint, 206 CFARGS_NONE); 207 } 208 209 int 210 ehci_cardbus_detach(device_t self, int flags) 211 { 212 struct ehci_cardbus_softc *sc = device_private(self); 213 struct cardbus_devfunc *ct = sc->sc_ct; 214 int rv; 215 216 rv = ehci_detach(&sc->sc, flags); 217 if (rv) 218 return rv; 219 if (sc->sc_ih != NULL) { 220 Cardbus_intr_disestablish(ct, sc->sc_ih); 221 sc->sc_ih = NULL; 222 } 223 if (sc->sc.sc_size) { 224 Cardbus_mapreg_unmap(ct, PCI_CBMEM, sc->sc.iot, 225 sc->sc.ioh, sc->sc.sc_size); 226 sc->sc.sc_size = 0; 227 } 228 return 0; 229 } 230 231 void 232 usb_cardbus_add(struct usb_cardbus *up, struct cardbus_attach_args *ca, 233 device_t bu) 234 { 235 TAILQ_INSERT_TAIL(&ehci_cardbus_alldevs, up, next); 236 up->bus = ca->ca_bus; 237 up->function = ca->ca_function; 238 up->usb = bu; 239 } 240 241 void 242 usb_cardbus_rem(struct usb_cardbus *up) 243 { 244 TAILQ_REMOVE(&ehci_cardbus_alldevs, up, next); 245 } 246
Indexes created Tue Sep 30 20:09:53 GMT 2025