if_atw_cardbus.c revision 1.10.2.6
1 1.10.2.6 skrll /* $NetBSD: if_atw_cardbus.c,v 1.10.2.6 2005/03/04 16:41:05 skrll Exp $ */ 2 1.10.2.2 skrll 3 1.10.2.2 skrll /*- 4 1.10.2.2 skrll * Copyright (c) 1999, 2000, 2003 The NetBSD Foundation, Inc. 5 1.10.2.2 skrll * All rights reserved. 6 1.10.2.2 skrll * 7 1.10.2.2 skrll * This code is derived from software contributed to The NetBSD Foundation 8 1.10.2.2 skrll * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 1.10.2.2 skrll * NASA Ames Research Center. This code was adapted for the ADMtek ADM8211 10 1.10.2.2 skrll * by David Young. 11 1.10.2.2 skrll * 12 1.10.2.2 skrll * Redistribution and use in source and binary forms, with or without 13 1.10.2.2 skrll * modification, are permitted provided that the following conditions 14 1.10.2.2 skrll * are met: 15 1.10.2.2 skrll * 1. Redistributions of source code must retain the above copyright 16 1.10.2.2 skrll * notice, this list of conditions and the following disclaimer. 17 1.10.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 18 1.10.2.2 skrll * notice, this list of conditions and the following disclaimer in the 19 1.10.2.2 skrll * documentation and/or other materials provided with the distribution. 20 1.10.2.2 skrll * 3. All advertising materials mentioning features or use of this software 21 1.10.2.2 skrll * must display the following acknowledgement: 22 1.10.2.2 skrll * This product includes software developed by the NetBSD 23 1.10.2.2 skrll * Foundation, Inc. and its contributors. 24 1.10.2.2 skrll * 4. Neither the name of The NetBSD Foundation nor the names of its 25 1.10.2.2 skrll * contributors may be used to endorse or promote products derived 26 1.10.2.2 skrll * from this software without specific prior written permission. 27 1.10.2.2 skrll * 28 1.10.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 29 1.10.2.2 skrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 30 1.10.2.2 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 31 1.10.2.2 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 32 1.10.2.2 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 33 1.10.2.2 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 34 1.10.2.2 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 35 1.10.2.2 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 36 1.10.2.2 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 37 1.10.2.2 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 38 1.10.2.2 skrll * POSSIBILITY OF SUCH DAMAGE. 39 1.10.2.2 skrll */ 40 1.10.2.2 skrll 41 1.10.2.2 skrll /* 42 1.10.2.2 skrll * CardBus bus front-end for the ADMtek ADM8211 802.11 MAC/BBP driver. 43 1.10.2.2 skrll */ 44 1.10.2.2 skrll 45 1.10.2.2 skrll #include <sys/cdefs.h> 46 1.10.2.6 skrll __KERNEL_RCSID(0, "$NetBSD: if_atw_cardbus.c,v 1.10.2.6 2005/03/04 16:41:05 skrll Exp $"); 47 1.10.2.2 skrll 48 1.10.2.2 skrll #include "opt_inet.h" 49 1.10.2.2 skrll #include "opt_ns.h" 50 1.10.2.2 skrll #include "bpfilter.h" 51 1.10.2.2 skrll 52 1.10.2.2 skrll #include <sys/param.h> 53 1.10.2.6 skrll #include <sys/systm.h> 54 1.10.2.6 skrll #include <sys/mbuf.h> 55 1.10.2.2 skrll #include <sys/malloc.h> 56 1.10.2.2 skrll #include <sys/kernel.h> 57 1.10.2.2 skrll #include <sys/socket.h> 58 1.10.2.2 skrll #include <sys/ioctl.h> 59 1.10.2.2 skrll #include <sys/errno.h> 60 1.10.2.2 skrll #include <sys/device.h> 61 1.10.2.2 skrll 62 1.10.2.2 skrll #include <machine/endian.h> 63 1.10.2.6 skrll 64 1.10.2.2 skrll #include <net/if.h> 65 1.10.2.2 skrll #include <net/if_dl.h> 66 1.10.2.2 skrll #include <net/if_media.h> 67 1.10.2.2 skrll #include <net/if_ether.h> 68 1.10.2.2 skrll 69 1.10.2.2 skrll #include <net80211/ieee80211_compat.h> 70 1.10.2.2 skrll #include <net80211/ieee80211_radiotap.h> 71 1.10.2.2 skrll #include <net80211/ieee80211_var.h> 72 1.10.2.2 skrll 73 1.10.2.6 skrll #if NBPFILTER > 0 74 1.10.2.2 skrll #include <net/bpf.h> 75 1.10.2.6 skrll #endif 76 1.10.2.2 skrll 77 1.10.2.2 skrll #ifdef INET 78 1.10.2.6 skrll #include <netinet/in.h> 79 1.10.2.2 skrll #include <netinet/if_inarp.h> 80 1.10.2.2 skrll #endif 81 1.10.2.2 skrll 82 1.10.2.2 skrll #ifdef NS 83 1.10.2.2 skrll #include <netns/ns.h> 84 1.10.2.2 skrll #include <netns/ns_if.h> 85 1.10.2.2 skrll #endif 86 1.10.2.2 skrll 87 1.10.2.2 skrll #include <machine/bus.h> 88 1.10.2.2 skrll #include <machine/intr.h> 89 1.10.2.2 skrll 90 1.10.2.2 skrll #include <dev/ic/atwreg.h> 91 1.10.2.2 skrll #include <dev/ic/rf3000reg.h> 92 1.10.2.2 skrll #include <dev/ic/si4136reg.h> 93 1.10.2.2 skrll #include <dev/ic/atwvar.h> 94 1.10.2.2 skrll 95 1.10.2.2 skrll #include <dev/pci/pcivar.h> 96 1.10.2.2 skrll #include <dev/pci/pcireg.h> 97 1.10.2.2 skrll #include <dev/pci/pcidevs.h> 98 1.10.2.2 skrll 99 1.10.2.2 skrll #include <dev/cardbus/cardbusvar.h> 100 1.10.2.3 skrll #include <dev/pci/pcidevs.h> 101 1.10.2.2 skrll 102 1.10.2.2 skrll /* 103 1.10.2.2 skrll * PCI configuration space registers used by the ADM8211. 104 1.10.2.2 skrll */ 105 1.10.2.2 skrll #define ATW_PCI_IOBA 0x10 /* i/o mapped base */ 106 1.10.2.2 skrll #define ATW_PCI_MMBA 0x14 /* memory mapped base */ 107 1.10.2.2 skrll 108 1.10.2.2 skrll struct atw_cardbus_softc { 109 1.10.2.2 skrll struct atw_softc sc_atw; /* real ADM8211 softc */ 110 1.10.2.2 skrll 111 1.10.2.2 skrll /* CardBus-specific goo. */ 112 1.10.2.2 skrll void *sc_ih; /* interrupt handle */ 113 1.10.2.2 skrll cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 114 1.10.2.2 skrll cardbustag_t sc_tag; /* our CardBus tag */ 115 1.10.2.2 skrll int sc_csr; /* CSR bits */ 116 1.10.2.2 skrll bus_size_t sc_mapsize; /* the size of mapped bus space 117 1.10.2.2 skrll region */ 118 1.10.2.2 skrll 119 1.10.2.2 skrll int sc_cben; /* CardBus enables */ 120 1.10.2.2 skrll int sc_bar_reg; /* which BAR to use */ 121 1.10.2.2 skrll pcireg_t sc_bar_val; /* value of the BAR */ 122 1.10.2.2 skrll 123 1.10.2.2 skrll int sc_intrline; /* interrupt line */ 124 1.10.2.2 skrll }; 125 1.10.2.2 skrll 126 1.10.2.2 skrll int atw_cardbus_match(struct device *, struct cfdata *, void *); 127 1.10.2.2 skrll void atw_cardbus_attach(struct device *, struct device *, void *); 128 1.10.2.2 skrll int atw_cardbus_detach(struct device *, int); 129 1.10.2.2 skrll 130 1.10.2.2 skrll CFATTACH_DECL(atw_cardbus, sizeof(struct atw_cardbus_softc), 131 1.10.2.2 skrll atw_cardbus_match, atw_cardbus_attach, atw_cardbus_detach, atw_activate); 132 1.10.2.2 skrll 133 1.10.2.2 skrll void atw_cardbus_setup(struct atw_cardbus_softc *); 134 1.10.2.2 skrll 135 1.10.2.2 skrll int atw_cardbus_enable(struct atw_softc *); 136 1.10.2.2 skrll void atw_cardbus_disable(struct atw_softc *); 137 1.10.2.2 skrll void atw_cardbus_power(struct atw_softc *, int); 138 1.10.2.2 skrll 139 1.10.2.2 skrll static void atw_cardbus_intr_ack(struct atw_softc *); 140 1.10.2.2 skrll 141 1.10.2.2 skrll const struct atw_cardbus_product *atw_cardbus_lookup 142 1.10.2.2 skrll (const struct cardbus_attach_args *); 143 1.10.2.2 skrll 144 1.10.2.2 skrll const struct atw_cardbus_product { 145 1.10.2.2 skrll u_int32_t acp_vendor; /* PCI vendor ID */ 146 1.10.2.2 skrll u_int32_t acp_product; /* PCI product ID */ 147 1.10.2.2 skrll const char *acp_product_name; 148 1.10.2.2 skrll } atw_cardbus_products[] = { 149 1.10.2.2 skrll { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211, 150 1.10.2.2 skrll "ADMtek ADM8211 802.11 MAC/BBP" }, 151 1.10.2.2 skrll 152 1.10.2.2 skrll { 0, 0, NULL }, 153 1.10.2.2 skrll }; 154 1.10.2.2 skrll 155 1.10.2.2 skrll const struct atw_cardbus_product * 156 1.10.2.2 skrll atw_cardbus_lookup(const struct cardbus_attach_args *ca) 157 1.10.2.2 skrll { 158 1.10.2.2 skrll const struct atw_cardbus_product *acp; 159 1.10.2.2 skrll 160 1.10.2.2 skrll for (acp = atw_cardbus_products; 161 1.10.2.2 skrll acp->acp_product_name != NULL; 162 1.10.2.2 skrll acp++) { 163 1.10.2.2 skrll if (PCI_VENDOR(ca->ca_id) == acp->acp_vendor && 164 1.10.2.2 skrll PCI_PRODUCT(ca->ca_id) == acp->acp_product) 165 1.10.2.2 skrll return (acp); 166 1.10.2.2 skrll } 167 1.10.2.2 skrll return (NULL); 168 1.10.2.2 skrll } 169 1.10.2.2 skrll 170 1.10.2.2 skrll int 171 1.10.2.2 skrll atw_cardbus_match(struct device *parent, struct cfdata *match, void *aux) 172 1.10.2.2 skrll { 173 1.10.2.2 skrll struct cardbus_attach_args *ca = aux; 174 1.10.2.2 skrll 175 1.10.2.2 skrll if (atw_cardbus_lookup(ca) != NULL) 176 1.10.2.2 skrll return (1); 177 1.10.2.2 skrll 178 1.10.2.2 skrll return (0); 179 1.10.2.2 skrll } 180 1.10.2.2 skrll 181 1.10.2.2 skrll void 182 1.10.2.2 skrll atw_cardbus_attach(struct device *parent, struct device *self, void *aux) 183 1.10.2.2 skrll { 184 1.10.2.2 skrll struct atw_cardbus_softc *csc = (void *)self; 185 1.10.2.2 skrll struct atw_softc *sc = &csc->sc_atw; 186 1.10.2.2 skrll struct cardbus_attach_args *ca = aux; 187 1.10.2.2 skrll cardbus_devfunc_t ct = ca->ca_ct; 188 1.10.2.2 skrll const struct atw_cardbus_product *acp; 189 1.10.2.2 skrll bus_addr_t adr; 190 1.10.2.2 skrll 191 1.10.2.2 skrll sc->sc_dmat = ca->ca_dmat; 192 1.10.2.2 skrll csc->sc_ct = ct; 193 1.10.2.2 skrll csc->sc_tag = ca->ca_tag; 194 1.10.2.2 skrll 195 1.10.2.2 skrll acp = atw_cardbus_lookup(ca); 196 1.10.2.2 skrll if (acp == NULL) { 197 1.10.2.2 skrll printf("\n"); 198 1.10.2.2 skrll panic("atw_cardbus_attach: impossible"); 199 1.10.2.2 skrll } 200 1.10.2.2 skrll 201 1.10.2.2 skrll /* 202 1.10.2.2 skrll * Power management hooks. 203 1.10.2.2 skrll */ 204 1.10.2.2 skrll sc->sc_enable = atw_cardbus_enable; 205 1.10.2.2 skrll sc->sc_disable = atw_cardbus_disable; 206 1.10.2.2 skrll sc->sc_power = atw_cardbus_power; 207 1.10.2.2 skrll 208 1.10.2.2 skrll sc->sc_intr_ack = atw_cardbus_intr_ack; 209 1.10.2.2 skrll 210 1.10.2.2 skrll /* Get revision info. */ 211 1.10.2.3 skrll sc->sc_rev = PCI_REVISION(ca->ca_class); 212 1.10.2.2 skrll 213 1.10.2.3 skrll printf(": %s, revision %d.%d\n", acp->acp_product_name, 214 1.10.2.3 skrll (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 215 1.10.2.2 skrll 216 1.10.2.2 skrll #if 0 217 1.10.2.3 skrll printf("%s: signature %08x\n", sc->sc_dev.dv_xname, 218 1.10.2.2 skrll (rev >> 4) & 0xf, rev & 0xf, 219 1.10.2.2 skrll cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80)); 220 1.10.2.2 skrll #endif 221 1.10.2.2 skrll 222 1.10.2.2 skrll /* 223 1.10.2.2 skrll * Map the device. 224 1.10.2.2 skrll */ 225 1.10.2.2 skrll csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE; 226 1.10.2.2 skrll if (Cardbus_mapreg_map(ct, ATW_PCI_MMBA, 227 1.10.2.2 skrll CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr, 228 1.10.2.2 skrll &csc->sc_mapsize) == 0) { 229 1.10.2.2 skrll #if 0 230 1.10.2.2 skrll printf("%s: atw_cardbus_attach mapped %d bytes mem space\n", 231 1.10.2.2 skrll sc->sc_dev.dv_xname, csc->sc_mapsize); 232 1.10.2.2 skrll #endif 233 1.10.2.2 skrll #if rbus 234 1.10.2.2 skrll #else 235 1.10.2.2 skrll (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 236 1.10.2.2 skrll #endif 237 1.10.2.2 skrll csc->sc_cben = CARDBUS_MEM_ENABLE; 238 1.10.2.2 skrll csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE; 239 1.10.2.2 skrll csc->sc_bar_reg = ATW_PCI_MMBA; 240 1.10.2.2 skrll csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; 241 1.10.2.2 skrll } else if (Cardbus_mapreg_map(ct, ATW_PCI_IOBA, 242 1.10.2.2 skrll CARDBUS_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr, 243 1.10.2.2 skrll &csc->sc_mapsize) == 0) { 244 1.10.2.2 skrll #if 0 245 1.10.2.2 skrll printf("%s: atw_cardbus_attach mapped %d bytes I/O space\n", 246 1.10.2.2 skrll sc->sc_dev.dv_xname, csc->sc_mapsize); 247 1.10.2.2 skrll #endif 248 1.10.2.2 skrll #if rbus 249 1.10.2.2 skrll #else 250 1.10.2.2 skrll (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 251 1.10.2.2 skrll #endif 252 1.10.2.2 skrll csc->sc_cben = CARDBUS_IO_ENABLE; 253 1.10.2.2 skrll csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE; 254 1.10.2.2 skrll csc->sc_bar_reg = ATW_PCI_IOBA; 255 1.10.2.2 skrll csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 256 1.10.2.2 skrll } else { 257 1.10.2.2 skrll printf("%s: unable to map device registers\n", 258 1.10.2.2 skrll sc->sc_dev.dv_xname); 259 1.10.2.2 skrll return; 260 1.10.2.2 skrll } 261 1.10.2.2 skrll 262 1.10.2.2 skrll /* 263 1.10.2.2 skrll * Bring the chip out of powersave mode and initialize the 264 1.10.2.2 skrll * configuration registers. 265 1.10.2.2 skrll */ 266 1.10.2.2 skrll atw_cardbus_setup(csc); 267 1.10.2.2 skrll 268 1.10.2.2 skrll /* Remember which interrupt line. */ 269 1.10.2.2 skrll csc->sc_intrline = ca->ca_intrline; 270 1.10.2.2 skrll 271 1.10.2.2 skrll printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname, 272 1.10.2.2 skrll csc->sc_intrline); 273 1.10.2.2 skrll #if 0 274 1.10.2.2 skrll /* 275 1.10.2.2 skrll * The CardBus cards will make it to store-and-forward mode as 276 1.10.2.2 skrll * soon as you put them under any kind of load, so just start 277 1.10.2.2 skrll * out there. 278 1.10.2.2 skrll */ 279 1.10.2.2 skrll sc->sc_txthresh = 3; /* TBD name constant */ 280 1.10.2.2 skrll #endif 281 1.10.2.2 skrll 282 1.10.2.2 skrll /* 283 1.10.2.2 skrll * Finish off the attach. 284 1.10.2.2 skrll */ 285 1.10.2.2 skrll atw_attach(sc); 286 1.10.2.2 skrll 287 1.10.2.2 skrll ATW_WRITE(sc, ATW_FER, ATW_FER_INTR); 288 1.10.2.2 skrll 289 1.10.2.2 skrll /* 290 1.10.2.2 skrll * Power down the socket. 291 1.10.2.2 skrll */ 292 1.10.2.2 skrll Cardbus_function_disable(csc->sc_ct); 293 1.10.2.2 skrll } 294 1.10.2.2 skrll 295 1.10.2.2 skrll static void 296 1.10.2.2 skrll atw_cardbus_intr_ack(struct atw_softc *sc) 297 1.10.2.2 skrll { 298 1.10.2.2 skrll ATW_WRITE(sc, ATW_FER, ATW_FER_INTR); 299 1.10.2.2 skrll } 300 1.10.2.2 skrll 301 1.10.2.2 skrll int 302 1.10.2.2 skrll atw_cardbus_detach(struct device *self, int flags) 303 1.10.2.2 skrll { 304 1.10.2.2 skrll struct atw_cardbus_softc *csc = (void *)self; 305 1.10.2.2 skrll struct atw_softc *sc = &csc->sc_atw; 306 1.10.2.2 skrll struct cardbus_devfunc *ct = csc->sc_ct; 307 1.10.2.2 skrll int rv; 308 1.10.2.2 skrll 309 1.10.2.2 skrll #if defined(DIAGNOSTIC) 310 1.10.2.2 skrll if (ct == NULL) 311 1.10.2.2 skrll panic("%s: data structure lacks", sc->sc_dev.dv_xname); 312 1.10.2.2 skrll #endif 313 1.10.2.2 skrll 314 1.10.2.2 skrll rv = atw_detach(sc); 315 1.10.2.2 skrll if (rv) 316 1.10.2.2 skrll return (rv); 317 1.10.2.2 skrll 318 1.10.2.2 skrll /* 319 1.10.2.2 skrll * Unhook the interrupt handler. 320 1.10.2.2 skrll */ 321 1.10.2.2 skrll if (csc->sc_ih != NULL) 322 1.10.2.2 skrll cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih); 323 1.10.2.2 skrll 324 1.10.2.2 skrll /* 325 1.10.2.2 skrll * Release bus space and close window. 326 1.10.2.2 skrll */ 327 1.10.2.2 skrll if (csc->sc_bar_reg != 0) 328 1.10.2.2 skrll Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 329 1.10.2.2 skrll sc->sc_st, sc->sc_sh, csc->sc_mapsize); 330 1.10.2.2 skrll 331 1.10.2.2 skrll return (0); 332 1.10.2.2 skrll } 333 1.10.2.2 skrll 334 1.10.2.2 skrll int 335 1.10.2.2 skrll atw_cardbus_enable(struct atw_softc *sc) 336 1.10.2.2 skrll { 337 1.10.2.2 skrll struct atw_cardbus_softc *csc = (void *) sc; 338 1.10.2.2 skrll cardbus_devfunc_t ct = csc->sc_ct; 339 1.10.2.2 skrll cardbus_chipset_tag_t cc = ct->ct_cc; 340 1.10.2.2 skrll cardbus_function_tag_t cf = ct->ct_cf; 341 1.10.2.2 skrll 342 1.10.2.2 skrll /* 343 1.10.2.2 skrll * Power on the socket. 344 1.10.2.2 skrll */ 345 1.10.2.2 skrll Cardbus_function_enable(ct); 346 1.10.2.2 skrll 347 1.10.2.2 skrll /* 348 1.10.2.2 skrll * Set up the PCI configuration registers. 349 1.10.2.2 skrll */ 350 1.10.2.2 skrll atw_cardbus_setup(csc); 351 1.10.2.2 skrll 352 1.10.2.2 skrll /* 353 1.10.2.2 skrll * Map and establish the interrupt. 354 1.10.2.2 skrll */ 355 1.10.2.2 skrll csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET, 356 1.10.2.2 skrll atw_intr, sc); 357 1.10.2.2 skrll if (csc->sc_ih == NULL) { 358 1.10.2.2 skrll printf("%s: unable to establish interrupt at %d\n", 359 1.10.2.2 skrll sc->sc_dev.dv_xname, csc->sc_intrline); 360 1.10.2.2 skrll Cardbus_function_disable(csc->sc_ct); 361 1.10.2.2 skrll return (1); 362 1.10.2.2 skrll } 363 1.10.2.2 skrll 364 1.10.2.2 skrll return (0); 365 1.10.2.2 skrll } 366 1.10.2.2 skrll 367 1.10.2.2 skrll void 368 1.10.2.2 skrll atw_cardbus_disable(struct atw_softc *sc) 369 1.10.2.2 skrll { 370 1.10.2.2 skrll struct atw_cardbus_softc *csc = (void *) sc; 371 1.10.2.2 skrll cardbus_devfunc_t ct = csc->sc_ct; 372 1.10.2.2 skrll cardbus_chipset_tag_t cc = ct->ct_cc; 373 1.10.2.2 skrll cardbus_function_tag_t cf = ct->ct_cf; 374 1.10.2.2 skrll 375 1.10.2.2 skrll /* Unhook the interrupt handler. */ 376 1.10.2.2 skrll cardbus_intr_disestablish(cc, cf, csc->sc_ih); 377 1.10.2.2 skrll csc->sc_ih = NULL; 378 1.10.2.2 skrll 379 1.10.2.2 skrll /* Power down the socket. */ 380 1.10.2.2 skrll Cardbus_function_disable(ct); 381 1.10.2.2 skrll } 382 1.10.2.2 skrll 383 1.10.2.2 skrll void 384 1.10.2.2 skrll atw_cardbus_power(struct atw_softc *sc, int why) 385 1.10.2.2 skrll { 386 1.10.2.2 skrll struct atw_cardbus_softc *csc = (void *) sc; 387 1.10.2.2 skrll 388 1.10.2.2 skrll printf("%s: atw_cardbus_power\n", sc->sc_dev.dv_xname); 389 1.10.2.2 skrll 390 1.10.2.2 skrll if (why == PWR_RESUME) { 391 1.10.2.2 skrll /* 392 1.10.2.2 skrll * Give the PCI configuration registers a kick 393 1.10.2.2 skrll * in the head. 394 1.10.2.2 skrll */ 395 1.10.2.2 skrll #ifdef DIAGNOSTIC 396 1.10.2.2 skrll if (ATW_IS_ENABLED(sc) == 0) 397 1.10.2.2 skrll panic("atw_cardbus_power"); 398 1.10.2.2 skrll #endif 399 1.10.2.2 skrll atw_cardbus_setup(csc); 400 1.10.2.2 skrll } 401 1.10.2.2 skrll } 402 1.10.2.2 skrll 403 1.10.2.2 skrll void 404 1.10.2.2 skrll atw_cardbus_setup(struct atw_cardbus_softc *csc) 405 1.10.2.2 skrll { 406 1.10.2.2 skrll struct atw_softc *sc = &csc->sc_atw; 407 1.10.2.2 skrll cardbus_devfunc_t ct = csc->sc_ct; 408 1.10.2.2 skrll cardbus_chipset_tag_t cc = ct->ct_cc; 409 1.10.2.2 skrll cardbus_function_tag_t cf = ct->ct_cf; 410 1.10.2.2 skrll pcireg_t reg; 411 1.10.2.2 skrll 412 1.10.2.2 skrll (void)cardbus_setpowerstate(sc->sc_dev.dv_xname, ct, csc->sc_tag, 413 1.10.2.2 skrll PCI_PWR_D0); 414 1.10.2.2 skrll 415 1.10.2.2 skrll /* Program the BAR. */ 416 1.10.2.2 skrll cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg, 417 1.10.2.2 skrll csc->sc_bar_val); 418 1.10.2.2 skrll 419 1.10.2.3 skrll /* Make sure the right access type is on the CardBus bridge. */ 420 1.10.2.3 skrll (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben); 421 1.10.2.3 skrll (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 422 1.10.2.3 skrll 423 1.10.2.2 skrll /* Enable the appropriate bits in the PCI CSR. */ 424 1.10.2.2 skrll reg = cardbus_conf_read(cc, cf, csc->sc_tag, 425 1.10.2.2 skrll CARDBUS_COMMAND_STATUS_REG); 426 1.10.2.2 skrll reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE); 427 1.10.2.2 skrll reg |= csc->sc_csr; 428 1.10.2.2 skrll cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG, 429 1.10.2.2 skrll reg); 430 1.10.2.2 skrll 431 1.10.2.2 skrll /* 432 1.10.2.2 skrll * Make sure the latency timer is set to some reasonable 433 1.10.2.2 skrll * value. 434 1.10.2.2 skrll */ 435 1.10.2.2 skrll reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG); 436 1.10.2.2 skrll if (CARDBUS_LATTIMER(reg) < 0x20) { 437 1.10.2.2 skrll reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT); 438 1.10.2.2 skrll reg |= (0x20 << CARDBUS_LATTIMER_SHIFT); 439 1.10.2.2 skrll cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg); 440 1.10.2.2 skrll } 441 1.10.2.2 skrll } 442
Indexes created Tue Oct 21 12:09:54 GMT 2025