if_atw_cardbus.c revision 1.1 1 /* $NetBSD: if_atw_cardbus.c,v 1.1 2003/07/06 22:57:23 dyoung Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000, 2003 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center. This code was adapted for the ADMtek ADM8211
10 * by David Young.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the NetBSD
23 * Foundation, Inc. and its contributors.
24 * 4. Neither the name of The NetBSD Foundation nor the names of its
25 * contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 */
40
41 /*
42 * CardBus bus front-end for the ADMtek ADM8211 802.11 MAC/BBP driver.
43 */
44
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: if_atw_cardbus.c,v 1.1 2003/07/06 22:57:23 dyoung Exp $");
47
48 #include "opt_inet.h"
49 #include "opt_ns.h"
50 #include "bpfilter.h"
51
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/mbuf.h>
55 #include <sys/malloc.h>
56 #include <sys/kernel.h>
57 #include <sys/socket.h>
58 #include <sys/ioctl.h>
59 #include <sys/errno.h>
60 #include <sys/device.h>
61
62 #include <machine/endian.h>
63
64 #include <net/if.h>
65 #include <net/if_dl.h>
66 #include <net/if_media.h>
67 #include <net/if_ether.h>
68 #include <net/if_ieee80211.h>
69
70 #if NBPFILTER > 0
71 #include <net/bpf.h>
72 #endif
73
74 #ifdef INET
75 #include <netinet/in.h>
76 #include <netinet/if_inarp.h>
77 #endif
78
79 #ifdef NS
80 #include <netns/ns.h>
81 #include <netns/ns_if.h>
82 #endif
83
84 #include <machine/bus.h>
85 #include <machine/intr.h>
86
87 #include <dev/mii/miivar.h>
88 #include <dev/mii/mii_bitbang.h>
89
90 #include <dev/ic/atwreg.h>
91 #include <dev/ic/atwvar.h>
92
93 #include <dev/pci/pcivar.h>
94 #include <dev/pci/pcireg.h>
95 #include <dev/pci/pcidevs.h>
96
97 #include <dev/cardbus/cardbusvar.h>
98 #include <dev/cardbus/cardbusdevs.h>
99
100 /*
101 * PCI configuration space registers used by the ADM8211.
102 */
103 #define ATW_PCI_IOBA 0x10 /* i/o mapped base */
104 #define ATW_PCI_MMBA 0x14 /* memory mapped base */
105
106 struct atw_cardbus_softc {
107 struct atw_softc sc_atw; /* real ADM8211 softc */
108
109 /* CardBus-specific goo. */
110 void *sc_ih; /* interrupt handle */
111 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
112 cardbustag_t sc_tag; /* our CardBus tag */
113 int sc_csr; /* CSR bits */
114 bus_size_t sc_mapsize; /* the size of mapped bus space
115 region */
116
117 int sc_cben; /* CardBus enables */
118 int sc_bar_reg; /* which BAR to use */
119 pcireg_t sc_bar_val; /* value of the BAR */
120
121 int sc_intrline; /* interrupt line */
122 };
123
124 int atw_cardbus_match __P((struct device *, struct cfdata *, void *));
125 void atw_cardbus_attach __P((struct device *, struct device *, void *));
126 int atw_cardbus_detach __P((struct device *, int));
127
128 CFATTACH_DECL(atw_cardbus, sizeof(struct atw_cardbus_softc),
129 atw_cardbus_match, atw_cardbus_attach, atw_cardbus_detach, atw_activate);
130
131 void atw_cardbus_setup __P((struct atw_cardbus_softc *));
132
133 int atw_cardbus_enable __P((struct atw_softc *));
134 void atw_cardbus_disable __P((struct atw_softc *));
135 void atw_cardbus_power __P((struct atw_softc *, int));
136
137 static void atw_cardbus_intr_ack(struct atw_softc *);
138
139 const struct atw_cardbus_product *atw_cardbus_lookup
140 __P((const struct cardbus_attach_args *));
141
142 const struct atw_cardbus_product {
143 u_int32_t acp_vendor; /* PCI vendor ID */
144 u_int32_t acp_product; /* PCI product ID */
145 const char *acp_product_name;
146 } atw_cardbus_products[] = {
147 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211,
148 "ADMtek ADM8211 802.11 MAC/BBP" },
149
150 { 0, 0, NULL },
151 };
152
153 const struct atw_cardbus_product *
154 atw_cardbus_lookup(ca)
155 const struct cardbus_attach_args *ca;
156 {
157 const struct atw_cardbus_product *acp;
158
159 for (acp = atw_cardbus_products;
160 acp->acp_product_name != NULL;
161 acp++) {
162 if (PCI_VENDOR(ca->ca_id) == acp->acp_vendor &&
163 PCI_PRODUCT(ca->ca_id) == acp->acp_product)
164 return (acp);
165 }
166 return (NULL);
167 }
168
169 int
170 atw_cardbus_match(parent, match, aux)
171 struct device *parent;
172 struct cfdata *match;
173 void *aux;
174 {
175 struct cardbus_attach_args *ca = aux;
176
177 if (atw_cardbus_lookup(ca) != NULL)
178 return (1);
179
180 return (0);
181 }
182
183 void
184 atw_cardbus_attach(parent, self, aux)
185 struct device *parent, *self;
186 void *aux;
187 {
188 struct atw_cardbus_softc *csc = (void *)self;
189 struct atw_softc *sc = &csc->sc_atw;
190 struct cardbus_attach_args *ca = aux;
191 cardbus_devfunc_t ct = ca->ca_ct;
192 const struct atw_cardbus_product *acp;
193 bus_addr_t adr;
194 int rev;
195
196 sc->sc_dmat = ca->ca_dmat;
197 csc->sc_ct = ct;
198 csc->sc_tag = ca->ca_tag;
199
200 acp = atw_cardbus_lookup(ca);
201 if (acp == NULL) {
202 printf("\n");
203 panic("atw_cardbus_attach: impossible");
204 }
205
206 /*
207 * Power management hooks.
208 */
209 sc->sc_enable = atw_cardbus_enable;
210 sc->sc_disable = atw_cardbus_disable;
211 sc->sc_power = atw_cardbus_power;
212
213 sc->sc_intr_ack = atw_cardbus_intr_ack;
214
215 /* Get revision info. */
216 rev = PCI_REVISION(ca->ca_class);
217
218 printf(": %s\n", acp->acp_product_name);
219
220 #if 0
221 printf("%s: pass %d.%d signature %08x\n", sc->sc_dev.dv_xname,
222 (rev >> 4) & 0xf, rev & 0xf,
223 cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80));
224 #endif
225
226 /*
227 * Map the device.
228 */
229 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE;
230 if (Cardbus_mapreg_map(ct, ATW_PCI_MMBA,
231 CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr,
232 &csc->sc_mapsize) == 0) {
233 #if 0
234 printf("%s: atw_cardbus_attach mapped %d bytes mem space\n",
235 sc->sc_dev.dv_xname, csc->sc_mapsize);
236 #endif
237 #if rbus
238 #else
239 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
240 #endif
241 csc->sc_cben = CARDBUS_MEM_ENABLE;
242 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE;
243 csc->sc_bar_reg = ATW_PCI_MMBA;
244 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM;
245 } else if (Cardbus_mapreg_map(ct, ATW_PCI_IOBA,
246 CARDBUS_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
247 &csc->sc_mapsize) == 0) {
248 #if 0
249 printf("%s: atw_cardbus_attach mapped %d bytes I/O space\n",
250 sc->sc_dev.dv_xname, csc->sc_mapsize);
251 #endif
252 #if rbus
253 #else
254 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
255 #endif
256 csc->sc_cben = CARDBUS_IO_ENABLE;
257 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE;
258 csc->sc_bar_reg = ATW_PCI_IOBA;
259 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO;
260 } else {
261 printf("%s: unable to map device registers\n",
262 sc->sc_dev.dv_xname);
263 return;
264 }
265
266 /*
267 * Bring the chip out of powersave mode and initialize the
268 * configuration registers.
269 */
270 atw_cardbus_setup(csc);
271
272 /* Remember which interrupt line. */
273 csc->sc_intrline = ca->ca_intrline;
274
275 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname,
276 csc->sc_intrline);
277 #if 0
278 /*
279 * The CardBus cards will make it to store-and-forward mode as
280 * soon as you put them under any kind of load, so just start
281 * out there.
282 */
283 sc->sc_txthresh = 3; /* TBD name constant */
284 #endif
285
286 /*
287 * Finish off the attach.
288 */
289 atw_attach(sc);
290
291 ATW_WRITE(sc, ATW_FER, ATW_FER_INTR);
292
293 /*
294 * Power down the socket.
295 */
296 Cardbus_function_disable(csc->sc_ct);
297 }
298
299 static void
300 atw_cardbus_intr_ack(sc)
301 struct atw_softc *sc;
302 {
303 ATW_WRITE(sc, ATW_FER, ATW_FER_INTR);
304 }
305
306 int
307 atw_cardbus_detach(self, flags)
308 struct device *self;
309 int flags;
310 {
311 struct atw_cardbus_softc *csc = (void *)self;
312 struct atw_softc *sc = &csc->sc_atw;
313 struct cardbus_devfunc *ct = csc->sc_ct;
314 int rv;
315
316 #if defined(DIAGNOSTIC)
317 if (ct == NULL)
318 panic("%s: data structure lacks", sc->sc_dev.dv_xname);
319 #endif
320
321 rv = atw_detach(sc);
322 if (rv)
323 return (rv);
324
325 /*
326 * Unhook the interrupt handler.
327 */
328 if (csc->sc_ih != NULL)
329 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
330
331 /*
332 * Release bus space and close window.
333 */
334 if (csc->sc_bar_reg != 0)
335 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
336 sc->sc_st, sc->sc_sh, csc->sc_mapsize);
337
338 return (0);
339 }
340
341 int
342 atw_cardbus_enable(sc)
343 struct atw_softc *sc;
344 {
345 struct atw_cardbus_softc *csc = (void *) sc;
346 cardbus_devfunc_t ct = csc->sc_ct;
347 cardbus_chipset_tag_t cc = ct->ct_cc;
348 cardbus_function_tag_t cf = ct->ct_cf;
349
350 /*
351 * Power on the socket.
352 */
353 Cardbus_function_enable(ct);
354
355 /*
356 * Set up the PCI configuration registers.
357 */
358 atw_cardbus_setup(csc);
359
360 /*
361 * Map and establish the interrupt.
362 */
363 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
364 atw_intr, sc);
365 if (csc->sc_ih == NULL) {
366 printf("%s: unable to establish interrupt at %d\n",
367 sc->sc_dev.dv_xname, csc->sc_intrline);
368 Cardbus_function_disable(csc->sc_ct);
369 return (1);
370 }
371
372 return (0);
373 }
374
375 void
376 atw_cardbus_disable(sc)
377 struct atw_softc *sc;
378 {
379 struct atw_cardbus_softc *csc = (void *) sc;
380 cardbus_devfunc_t ct = csc->sc_ct;
381 cardbus_chipset_tag_t cc = ct->ct_cc;
382 cardbus_function_tag_t cf = ct->ct_cf;
383
384 /* Unhook the interrupt handler. */
385 cardbus_intr_disestablish(cc, cf, csc->sc_ih);
386 csc->sc_ih = NULL;
387
388 /* Power down the socket. */
389 Cardbus_function_disable(ct);
390 }
391
392 void
393 atw_cardbus_power(sc, why)
394 struct atw_softc *sc;
395 int why;
396 {
397 struct atw_cardbus_softc *csc = (void *) sc;
398
399 printf("%s: atw_cardbus_power\n", sc->sc_dev.dv_xname);
400
401 if (why == PWR_RESUME) {
402 /*
403 * Give the PCI configuration registers a kick
404 * in the head.
405 */
406 #ifdef DIAGNOSTIC
407 if (ATW_IS_ENABLED(sc) == 0)
408 panic("atw_cardbus_power");
409 #endif
410 atw_cardbus_setup(csc);
411 }
412 }
413
414 void
415 atw_cardbus_setup(csc)
416 struct atw_cardbus_softc *csc;
417 {
418 struct atw_softc *sc = &csc->sc_atw;
419 cardbus_devfunc_t ct = csc->sc_ct;
420 cardbus_chipset_tag_t cc = ct->ct_cc;
421 cardbus_function_tag_t cf = ct->ct_cf;
422 pcireg_t reg;
423 int pmreg;
424
425 if (cardbus_get_capability(cc, cf, csc->sc_tag,
426 PCI_CAP_PWRMGMT, &pmreg, 0)) {
427 reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03;
428 #if 1 /* XXX Probably not right for CardBus. */
429 if (reg == 3) {
430 /*
431 * The card has lost all configuration data in
432 * this state, so punt.
433 */
434 printf("%s: unable to wake up from power state D3\n",
435 sc->sc_dev.dv_xname);
436 return;
437 }
438 #endif
439 if (reg != 0) {
440 printf("%s: waking up from power state D%d\n",
441 sc->sc_dev.dv_xname, reg);
442 cardbus_conf_write(cc, cf, csc->sc_tag,
443 pmreg + 4, 0);
444 }
445 }
446
447 /* Make sure the right access type is on the CardBus bridge. */
448 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
449 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
450
451 /* Program the BAR. */
452 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
453 csc->sc_bar_val);
454
455 /* Enable the appropriate bits in the PCI CSR. */
456 reg = cardbus_conf_read(cc, cf, csc->sc_tag,
457 CARDBUS_COMMAND_STATUS_REG);
458 reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE);
459 reg |= csc->sc_csr;
460 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG,
461 reg);
462
463 /*
464 * Make sure the latency timer is set to some reasonable
465 * value.
466 */
467 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG);
468 if (CARDBUS_LATTIMER(reg) < 0x20) {
469 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT);
470 reg |= (0x20 << CARDBUS_LATTIMER_SHIFT);
471 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg);
472 }
473 }
474
475