Home | History | Annotate | Line # | Download | only in cardbus
if_atw_cardbus.c revision 1.19 
      1 /* $NetBSD: if_atw_cardbus.c,v 1.19 2007/12/09 20:27:56 jmcneill Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1999, 2000, 2003 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.  This code was adapted for the ADMtek ADM8211
     10  * by David Young.
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  * 3. All advertising materials mentioning features or use of this software
     21  *    must display the following acknowledgement:
     22  *	This product includes software developed by the NetBSD
     23  *	Foundation, Inc. and its contributors.
     24  * 4. Neither the name of The NetBSD Foundation nor the names of its
     25  *    contributors may be used to endorse or promote products derived
     26  *    from this software without specific prior written permission.
     27  *
     28  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     29  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     30  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     31  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     32  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     38  * POSSIBILITY OF SUCH DAMAGE.
     39  */
     40 
     41 /*
     42  * CardBus bus front-end for the ADMtek ADM8211 802.11 MAC/BBP driver.
     43  */
     44 
     45 #include <sys/cdefs.h>
     46 __KERNEL_RCSID(0, "$NetBSD: if_atw_cardbus.c,v 1.19 2007/12/09 20:27:56 jmcneill Exp $");
     47 
     48 #include "opt_inet.h"
     49 #include "bpfilter.h"
     50 
     51 #include <sys/param.h>
     52 #include <sys/systm.h>
     53 #include <sys/mbuf.h>
     54 #include <sys/malloc.h>
     55 #include <sys/kernel.h>
     56 #include <sys/socket.h>
     57 #include <sys/ioctl.h>
     58 #include <sys/errno.h>
     59 #include <sys/device.h>
     60 
     61 #include <machine/endian.h>
     62 
     63 #include <net/if.h>
     64 #include <net/if_dl.h>
     65 #include <net/if_media.h>
     66 #include <net/if_ether.h>
     67 
     68 #include <net80211/ieee80211_netbsd.h>
     69 #include <net80211/ieee80211_radiotap.h>
     70 #include <net80211/ieee80211_var.h>
     71 
     72 #if NBPFILTER > 0
     73 #include <net/bpf.h>
     74 #endif
     75 
     76 #ifdef INET
     77 #include <netinet/in.h>
     78 #include <netinet/if_inarp.h>
     79 #endif
     80 
     81 
     82 #include <sys/bus.h>
     83 #include <sys/intr.h>
     84 
     85 #include <dev/ic/atwreg.h>
     86 #include <dev/ic/rf3000reg.h>
     87 #include <dev/ic/si4136reg.h>
     88 #include <dev/ic/atwvar.h>
     89 
     90 #include <dev/pci/pcivar.h>
     91 #include <dev/pci/pcireg.h>
     92 #include <dev/pci/pcidevs.h>
     93 
     94 #include <dev/cardbus/cardbusvar.h>
     95 #include <dev/pci/pcidevs.h>
     96 
     97 /*
     98  * PCI configuration space registers used by the ADM8211.
     99  */
    100 #define	ATW_PCI_IOBA		0x10	/* i/o mapped base */
    101 #define	ATW_PCI_MMBA		0x14	/* memory mapped base */
    102 
    103 struct atw_cardbus_softc {
    104 	struct atw_softc sc_atw;	/* real ADM8211 softc */
    105 
    106 	/* CardBus-specific goo. */
    107 	void	*sc_ih;			/* interrupt handle */
    108 	cardbus_devfunc_t sc_ct;	/* our CardBus devfuncs */
    109 	cardbustag_t sc_tag;		/* our CardBus tag */
    110 	int	sc_csr;			/* CSR bits */
    111 	bus_size_t sc_mapsize;		/* the size of mapped bus space
    112 					   region */
    113 
    114 	int	sc_cben;		/* CardBus enables */
    115 	int	sc_bar_reg;		/* which BAR to use */
    116 	pcireg_t sc_bar_val;		/* value of the BAR */
    117 
    118 	int	sc_intrline;		/* interrupt line */
    119 };
    120 
    121 int	atw_cardbus_match(struct device *, struct cfdata *, void *);
    122 void	atw_cardbus_attach(struct device *, struct device *, void *);
    123 int	atw_cardbus_detach(struct device *, int);
    124 
    125 CFATTACH_DECL(atw_cardbus, sizeof(struct atw_cardbus_softc),
    126     atw_cardbus_match, atw_cardbus_attach, atw_cardbus_detach, atw_activate);
    127 
    128 void	atw_cardbus_setup(struct atw_cardbus_softc *);
    129 
    130 int	atw_cardbus_enable(struct atw_softc *);
    131 void	atw_cardbus_disable(struct atw_softc *);
    132 void	atw_cardbus_power(struct atw_softc *, int);
    133 
    134 static void atw_cardbus_intr_ack(struct atw_softc *);
    135 
    136 const struct atw_cardbus_product *atw_cardbus_lookup
    137    (const struct cardbus_attach_args *);
    138 
    139 const struct atw_cardbus_product {
    140 	u_int32_t	 acp_vendor;	/* PCI vendor ID */
    141 	u_int32_t	 acp_product;	/* PCI product ID */
    142 	const char	*acp_product_name;
    143 } atw_cardbus_products[] = {
    144 	{ PCI_VENDOR_ADMTEK,		PCI_PRODUCT_ADMTEK_ADM8211,
    145 	  "ADMtek ADM8211 802.11 MAC/BBP" },
    146 
    147 	{ 0,				0,	NULL },
    148 };
    149 
    150 const struct atw_cardbus_product *
    151 atw_cardbus_lookup(const struct cardbus_attach_args *ca)
    152 {
    153 	const struct atw_cardbus_product *acp;
    154 
    155 	for (acp = atw_cardbus_products;
    156 	     acp->acp_product_name != NULL;
    157 	     acp++) {
    158 		if (PCI_VENDOR(ca->ca_id) == acp->acp_vendor &&
    159 		    PCI_PRODUCT(ca->ca_id) == acp->acp_product)
    160 			return (acp);
    161 	}
    162 	return (NULL);
    163 }
    164 
    165 int
    166 atw_cardbus_match(struct device *parent, struct cfdata *match,
    167     void *aux)
    168 {
    169 	struct cardbus_attach_args *ca = aux;
    170 
    171 	if (atw_cardbus_lookup(ca) != NULL)
    172 		return (1);
    173 
    174 	return (0);
    175 }
    176 
    177 void
    178 atw_cardbus_attach(struct device *parent, struct device *self,
    179     void *aux)
    180 {
    181 	struct atw_cardbus_softc *csc = device_private(self);
    182 	struct atw_softc *sc = &csc->sc_atw;
    183 	struct cardbus_attach_args *ca = aux;
    184 	cardbus_devfunc_t ct = ca->ca_ct;
    185 	const struct atw_cardbus_product *acp;
    186 	bus_addr_t adr;
    187 
    188 	sc->sc_dmat = ca->ca_dmat;
    189 	csc->sc_ct = ct;
    190 	csc->sc_tag = ca->ca_tag;
    191 
    192 	acp = atw_cardbus_lookup(ca);
    193 	if (acp == NULL) {
    194 		printf("\n");
    195 		panic("atw_cardbus_attach: impossible");
    196 	}
    197 
    198 	/*
    199 	 * Power management hooks.
    200 	 */
    201 	sc->sc_enable = atw_cardbus_enable;
    202 	sc->sc_disable = atw_cardbus_disable;
    203 	sc->sc_power = atw_cardbus_power;
    204 
    205 	sc->sc_intr_ack = atw_cardbus_intr_ack;
    206 
    207 	/* Get revision info. */
    208 	sc->sc_rev = PCI_REVISION(ca->ca_class);
    209 
    210 	printf(": %s, revision %d.%d\n", acp->acp_product_name,
    211 	    (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
    212 
    213 #if 0
    214 	printf("%s: signature %08x\n", sc->sc_dev.dv_xname,
    215 	    (rev >> 4) & 0xf, rev & 0xf,
    216 	    cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80));
    217 #endif
    218 
    219 	/*
    220 	 * Map the device.
    221 	 */
    222 	csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE;
    223 	if (Cardbus_mapreg_map(ct, ATW_PCI_MMBA,
    224 	    CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr,
    225 	    &csc->sc_mapsize) == 0) {
    226 #if 0
    227 		printf("%s: atw_cardbus_attach mapped %d bytes mem space\n",
    228 		    sc->sc_dev.dv_xname, csc->sc_mapsize);
    229 #endif
    230 #if rbus
    231 #else
    232 		(*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
    233 #endif
    234 		csc->sc_cben = CARDBUS_MEM_ENABLE;
    235 		csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE;
    236 		csc->sc_bar_reg = ATW_PCI_MMBA;
    237 		csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM;
    238 	} else if (Cardbus_mapreg_map(ct, ATW_PCI_IOBA,
    239 	    CARDBUS_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
    240 	    &csc->sc_mapsize) == 0) {
    241 #if 0
    242 		printf("%s: atw_cardbus_attach mapped %d bytes I/O space\n",
    243 		    sc->sc_dev.dv_xname, csc->sc_mapsize);
    244 #endif
    245 #if rbus
    246 #else
    247 		(*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
    248 #endif
    249 		csc->sc_cben = CARDBUS_IO_ENABLE;
    250 		csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE;
    251 		csc->sc_bar_reg = ATW_PCI_IOBA;
    252 		csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO;
    253 	} else {
    254 		printf("%s: unable to map device registers\n",
    255 		    sc->sc_dev.dv_xname);
    256 		return;
    257 	}
    258 
    259 	/*
    260 	 * Bring the chip out of powersave mode and initialize the
    261 	 * configuration registers.
    262 	 */
    263 	atw_cardbus_setup(csc);
    264 
    265 	/* Remember which interrupt line. */
    266 	csc->sc_intrline = ca->ca_intrline;
    267 
    268 	printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname,
    269 	    csc->sc_intrline);
    270 #if 0
    271 	/*
    272 	 * The CardBus cards will make it to store-and-forward mode as
    273 	 * soon as you put them under any kind of load, so just start
    274 	 * out there.
    275 	 */
    276 	sc->sc_txthresh = 3; /* TBD name constant */
    277 #endif
    278 
    279 	/*
    280 	 * Finish off the attach.
    281 	 */
    282 	atw_attach(sc);
    283 
    284 	ATW_WRITE(sc, ATW_FER, ATW_FER_INTR);
    285 
    286 	/*
    287 	 * Power down the socket.
    288 	 */
    289 	Cardbus_function_disable(csc->sc_ct);
    290 }
    291 
    292 static void
    293 atw_cardbus_intr_ack(struct atw_softc *sc)
    294 {
    295 	ATW_WRITE(sc, ATW_FER, ATW_FER_INTR);
    296 }
    297 
    298 int
    299 atw_cardbus_detach(struct device *self, int flags)
    300 {
    301 	struct atw_cardbus_softc *csc = device_private(self);
    302 	struct atw_softc *sc = &csc->sc_atw;
    303 	struct cardbus_devfunc *ct = csc->sc_ct;
    304 	int rv;
    305 
    306 #if defined(DIAGNOSTIC)
    307 	if (ct == NULL)
    308 		panic("%s: data structure lacks", sc->sc_dev.dv_xname);
    309 #endif
    310 
    311 	rv = atw_detach(sc);
    312 	if (rv)
    313 		return (rv);
    314 
    315 	/*
    316 	 * Unhook the interrupt handler.
    317 	 */
    318 	if (csc->sc_ih != NULL)
    319 		cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
    320 
    321 	/*
    322 	 * Release bus space and close window.
    323 	 */
    324 	if (csc->sc_bar_reg != 0)
    325 		Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
    326 		    sc->sc_st, sc->sc_sh, csc->sc_mapsize);
    327 
    328 	return (0);
    329 }
    330 
    331 int
    332 atw_cardbus_enable(struct atw_softc *sc)
    333 {
    334 	struct atw_cardbus_softc *csc = (void *) sc;
    335 	cardbus_devfunc_t ct = csc->sc_ct;
    336 	cardbus_chipset_tag_t cc = ct->ct_cc;
    337 	cardbus_function_tag_t cf = ct->ct_cf;
    338 
    339 	/*
    340 	 * Power on the socket.
    341 	 */
    342 	Cardbus_function_enable(ct);
    343 
    344 	/*
    345 	 * Set up the PCI configuration registers.
    346 	 */
    347 	atw_cardbus_setup(csc);
    348 
    349 	/*
    350 	 * Map and establish the interrupt.
    351 	 */
    352 	csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
    353 	    atw_intr, sc);
    354 	if (csc->sc_ih == NULL) {
    355 		printf("%s: unable to establish interrupt at %d\n",
    356 		    sc->sc_dev.dv_xname, csc->sc_intrline);
    357 		Cardbus_function_disable(csc->sc_ct);
    358 		return (1);
    359 	}
    360 
    361 	return (0);
    362 }
    363 
    364 void
    365 atw_cardbus_disable(struct atw_softc *sc)
    366 {
    367 	struct atw_cardbus_softc *csc = (void *) sc;
    368 	cardbus_devfunc_t ct = csc->sc_ct;
    369 	cardbus_chipset_tag_t cc = ct->ct_cc;
    370 	cardbus_function_tag_t cf = ct->ct_cf;
    371 
    372 	/* Unhook the interrupt handler. */
    373 	cardbus_intr_disestablish(cc, cf, csc->sc_ih);
    374 	csc->sc_ih = NULL;
    375 
    376 	/* Power down the socket. */
    377 	Cardbus_function_disable(ct);
    378 }
    379 
    380 void
    381 atw_cardbus_power(struct atw_softc *sc, int why)
    382 {
    383 	struct atw_cardbus_softc *csc = (void *) sc;
    384 
    385 	printf("%s: atw_cardbus_power\n", sc->sc_dev.dv_xname);
    386 
    387 	if (why == PWR_RESUME) {
    388 		/*
    389 		 * Give the PCI configuration registers a kick
    390 		 * in the head.
    391 		 */
    392 #ifdef DIAGNOSTIC
    393 		if (ATW_IS_ENABLED(sc) == 0)
    394 			panic("atw_cardbus_power");
    395 #endif
    396 		atw_cardbus_setup(csc);
    397 	}
    398 }
    399 
    400 void
    401 atw_cardbus_setup(struct atw_cardbus_softc *csc)
    402 {
    403 	cardbus_devfunc_t ct = csc->sc_ct;
    404 	cardbus_chipset_tag_t cc = ct->ct_cc;
    405 	cardbus_function_tag_t cf = ct->ct_cf;
    406 	pcireg_t reg;
    407 
    408 	(void)cardbus_set_powerstate(ct, csc->sc_tag, PCI_PWR_D0);
    409 
    410 	/* Program the BAR. */
    411 	cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
    412 	    csc->sc_bar_val);
    413 
    414 	/* Make sure the right access type is on the CardBus bridge. */
    415 	(*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
    416 	(*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
    417 
    418 	/* Enable the appropriate bits in the PCI CSR. */
    419 	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
    420 	    CARDBUS_COMMAND_STATUS_REG);
    421 	reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE);
    422 	reg |= csc->sc_csr;
    423 	cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG,
    424 	    reg);
    425 
    426 	/*
    427 	 * Make sure the latency timer is set to some reasonable
    428 	 * value.
    429 	 */
    430 	reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG);
    431 	if (CARDBUS_LATTIMER(reg) < 0x20) {
    432 		reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT);
    433 		reg |= (0x20 << CARDBUS_LATTIMER_SHIFT);
    434 		cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg);
    435 	}
    436 }
    437