if_atw_cardbus.c revision 1.19.10.4
1 /* $NetBSD: if_atw_cardbus.c,v 1.19.10.4 2008/09/28 10:40:20 mjf Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. This code was adapted for the ADMtek ADM8211 10 * by David Young. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * CardBus bus front-end for the ADMtek ADM8211 802.11 MAC/BBP driver. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_atw_cardbus.c,v 1.19.10.4 2008/09/28 10:40:20 mjf Exp $"); 40 41 #include "opt_inet.h" 42 #include "bpfilter.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/mbuf.h> 47 #include <sys/malloc.h> 48 #include <sys/kernel.h> 49 #include <sys/socket.h> 50 #include <sys/ioctl.h> 51 #include <sys/errno.h> 52 #include <sys/device.h> 53 54 #include <machine/endian.h> 55 56 #include <net/if.h> 57 #include <net/if_dl.h> 58 #include <net/if_media.h> 59 #include <net/if_ether.h> 60 61 #include <net80211/ieee80211_netbsd.h> 62 #include <net80211/ieee80211_radiotap.h> 63 #include <net80211/ieee80211_var.h> 64 65 #if NBPFILTER > 0 66 #include <net/bpf.h> 67 #endif 68 69 #ifdef INET 70 #include <netinet/in.h> 71 #include <netinet/if_inarp.h> 72 #endif 73 74 75 #include <sys/bus.h> 76 #include <sys/intr.h> 77 78 #include <dev/ic/atwreg.h> 79 #include <dev/ic/rf3000reg.h> 80 #include <dev/ic/si4136reg.h> 81 #include <dev/ic/atwvar.h> 82 83 #include <dev/pci/pcivar.h> 84 #include <dev/pci/pcireg.h> 85 #include <dev/pci/pcidevs.h> 86 87 #include <dev/cardbus/cardbusvar.h> 88 #include <dev/pci/pcidevs.h> 89 90 /* 91 * PCI configuration space registers used by the ADM8211. 92 */ 93 #define ATW_PCI_IOBA 0x10 /* i/o mapped base */ 94 #define ATW_PCI_MMBA 0x14 /* memory mapped base */ 95 96 struct atw_cardbus_softc { 97 struct atw_softc sc_atw; /* real ADM8211 softc */ 98 99 /* CardBus-specific goo. */ 100 void *sc_ih; /* interrupt handle */ 101 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 102 cardbustag_t sc_tag; /* our CardBus tag */ 103 int sc_csr; /* CSR bits */ 104 bus_size_t sc_mapsize; /* the size of mapped bus space 105 region */ 106 107 int sc_cben; /* CardBus enables */ 108 int sc_bar_reg; /* which BAR to use */ 109 pcireg_t sc_bar_val; /* value of the BAR */ 110 111 cardbus_intr_line_t sc_intrline; /* interrupt line */ 112 }; 113 114 static int atw_cardbus_match(device_t, cfdata_t, void *); 115 static void atw_cardbus_attach(device_t, device_t, void *); 116 static int atw_cardbus_detach(device_t, int); 117 118 CFATTACH_DECL_NEW(atw_cardbus, sizeof(struct atw_cardbus_softc), 119 atw_cardbus_match, atw_cardbus_attach, atw_cardbus_detach, atw_activate); 120 121 static void atw_cardbus_setup(struct atw_cardbus_softc *); 122 123 static int atw_cardbus_enable(struct atw_softc *); 124 static void atw_cardbus_disable(struct atw_softc *); 125 126 static void atw_cardbus_intr_ack(struct atw_softc *); 127 128 static const struct atw_cardbus_product *atw_cardbus_lookup 129 (const struct cardbus_attach_args *); 130 131 static const struct atw_cardbus_product { 132 u_int32_t acp_vendor; /* PCI vendor ID */ 133 u_int32_t acp_product; /* PCI product ID */ 134 const char *acp_product_name; 135 } atw_cardbus_products[] = { 136 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211, 137 "ADMtek ADM8211 802.11 MAC/BBP" }, 138 139 { 0, 0, NULL }, 140 }; 141 142 static const struct atw_cardbus_product * 143 atw_cardbus_lookup(const struct cardbus_attach_args *ca) 144 { 145 const struct atw_cardbus_product *acp; 146 147 for (acp = atw_cardbus_products; 148 acp->acp_product_name != NULL; 149 acp++) { 150 if (PCI_VENDOR(ca->ca_id) == acp->acp_vendor && 151 PCI_PRODUCT(ca->ca_id) == acp->acp_product) 152 return (acp); 153 } 154 return (NULL); 155 } 156 157 static int 158 atw_cardbus_match(device_t parent, cfdata_t match, void *aux) 159 { 160 struct cardbus_attach_args *ca = aux; 161 162 if (atw_cardbus_lookup(ca) != NULL) 163 return (1); 164 165 return (0); 166 } 167 168 static void 169 atw_cardbus_attach(device_t parent, device_t self, void *aux) 170 { 171 struct atw_cardbus_softc *csc = device_private(self); 172 struct atw_softc *sc = &csc->sc_atw; 173 struct cardbus_attach_args *ca = aux; 174 cardbus_devfunc_t ct = ca->ca_ct; 175 const struct atw_cardbus_product *acp; 176 bus_addr_t adr; 177 178 sc->sc_dev = self; 179 sc->sc_dmat = ca->ca_dmat; 180 csc->sc_ct = ct; 181 csc->sc_tag = ca->ca_tag; 182 183 acp = atw_cardbus_lookup(ca); 184 if (acp == NULL) { 185 printf("\n"); 186 panic("atw_cardbus_attach: impossible"); 187 } 188 189 /* 190 * Power management hooks. 191 */ 192 sc->sc_enable = atw_cardbus_enable; 193 sc->sc_disable = atw_cardbus_disable; 194 195 sc->sc_intr_ack = atw_cardbus_intr_ack; 196 197 /* Get revision info. */ 198 sc->sc_rev = PCI_REVISION(ca->ca_class); 199 200 printf(": %s, revision %d.%d\n", acp->acp_product_name, 201 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 202 203 #if 0 204 printf("%s: signature %08x\n", device_xname(self), 205 (rev >> 4) & 0xf, rev & 0xf, 206 cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80)); 207 #endif 208 209 /* 210 * Map the device. 211 */ 212 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE; 213 if (Cardbus_mapreg_map(ct, ATW_PCI_MMBA, 214 CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr, 215 &csc->sc_mapsize) == 0) { 216 #if 0 217 printf("%s: atw_cardbus_attach mapped %d bytes mem space\n", 218 device_xname(self), csc->sc_mapsize); 219 #endif 220 #if rbus 221 #else 222 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 223 #endif 224 csc->sc_cben = CARDBUS_MEM_ENABLE; 225 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE; 226 csc->sc_bar_reg = ATW_PCI_MMBA; 227 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; 228 } else if (Cardbus_mapreg_map(ct, ATW_PCI_IOBA, 229 CARDBUS_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr, 230 &csc->sc_mapsize) == 0) { 231 #if 0 232 printf("%s: atw_cardbus_attach mapped %d bytes I/O space\n", 233 device_xname(self), csc->sc_mapsize); 234 #endif 235 #if rbus 236 #else 237 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 238 #endif 239 csc->sc_cben = CARDBUS_IO_ENABLE; 240 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE; 241 csc->sc_bar_reg = ATW_PCI_IOBA; 242 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 243 } else { 244 aprint_error_dev(self, "unable to map device registers\n"); 245 return; 246 } 247 248 /* 249 * Bring the chip out of powersave mode and initialize the 250 * configuration registers. 251 */ 252 atw_cardbus_setup(csc); 253 254 /* Remember which interrupt line. */ 255 csc->sc_intrline = ca->ca_intrline; 256 257 #if 0 258 /* 259 * The CardBus cards will make it to store-and-forward mode as 260 * soon as you put them under any kind of load, so just start 261 * out there. 262 */ 263 sc->sc_txthresh = 3; /* TBD name constant */ 264 #endif 265 266 /* 267 * Finish off the attach. 268 */ 269 atw_attach(sc); 270 271 ATW_WRITE(sc, ATW_FER, ATW_FER_INTR); 272 273 /* 274 * Power down the socket. 275 */ 276 Cardbus_function_disable(csc->sc_ct); 277 } 278 279 static void 280 atw_cardbus_intr_ack(struct atw_softc *sc) 281 { 282 ATW_WRITE(sc, ATW_FER, ATW_FER_INTR); 283 } 284 285 static int 286 atw_cardbus_detach(device_t self, int flags) 287 { 288 struct atw_cardbus_softc *csc = device_private(self); 289 struct atw_softc *sc = &csc->sc_atw; 290 struct cardbus_devfunc *ct = csc->sc_ct; 291 int rv; 292 293 #if defined(DIAGNOSTIC) 294 if (ct == NULL) 295 panic("%s: data structure lacks", device_xname(self)); 296 #endif 297 298 rv = atw_detach(sc); 299 if (rv) 300 return (rv); 301 302 /* 303 * Unhook the interrupt handler. 304 */ 305 if (csc->sc_ih != NULL) 306 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih); 307 308 /* 309 * Release bus space and close window. 310 */ 311 if (csc->sc_bar_reg != 0) 312 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 313 sc->sc_st, sc->sc_sh, csc->sc_mapsize); 314 315 return (0); 316 } 317 318 static int 319 atw_cardbus_enable(struct atw_softc *sc) 320 { 321 struct atw_cardbus_softc *csc = (struct atw_cardbus_softc *)sc; 322 cardbus_devfunc_t ct = csc->sc_ct; 323 cardbus_chipset_tag_t cc = ct->ct_cc; 324 cardbus_function_tag_t cf = ct->ct_cf; 325 326 /* 327 * Power on the socket. 328 */ 329 Cardbus_function_enable(ct); 330 331 /* 332 * Set up the PCI configuration registers. 333 */ 334 atw_cardbus_setup(csc); 335 336 /* 337 * Map and establish the interrupt. 338 */ 339 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET, 340 atw_intr, sc); 341 if (csc->sc_ih == NULL) { 342 aprint_error_dev(sc->sc_dev, 343 "unable to establish interrupt\n"); 344 Cardbus_function_disable(csc->sc_ct); 345 return (1); 346 } 347 348 return (0); 349 } 350 351 static void 352 atw_cardbus_disable(struct atw_softc *sc) 353 { 354 struct atw_cardbus_softc *csc = (struct atw_cardbus_softc *)sc; 355 cardbus_devfunc_t ct = csc->sc_ct; 356 cardbus_chipset_tag_t cc = ct->ct_cc; 357 cardbus_function_tag_t cf = ct->ct_cf; 358 359 /* Unhook the interrupt handler. */ 360 cardbus_intr_disestablish(cc, cf, csc->sc_ih); 361 csc->sc_ih = NULL; 362 363 /* Power down the socket. */ 364 Cardbus_function_disable(ct); 365 } 366 367 static void 368 atw_cardbus_setup(struct atw_cardbus_softc *csc) 369 { 370 cardbus_devfunc_t ct = csc->sc_ct; 371 cardbus_chipset_tag_t cc = ct->ct_cc; 372 cardbus_function_tag_t cf = ct->ct_cf; 373 pcireg_t reg; 374 375 (void)cardbus_set_powerstate(ct, csc->sc_tag, PCI_PWR_D0); 376 377 /* Program the BAR. */ 378 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg, 379 csc->sc_bar_val); 380 381 /* Make sure the right access type is on the CardBus bridge. */ 382 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben); 383 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 384 385 /* Enable the appropriate bits in the PCI CSR. */ 386 reg = cardbus_conf_read(cc, cf, csc->sc_tag, 387 CARDBUS_COMMAND_STATUS_REG); 388 reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE); 389 reg |= csc->sc_csr; 390 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG, 391 reg); 392 393 /* 394 * Make sure the latency timer is set to some reasonable 395 * value. 396 */ 397 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG); 398 if (CARDBUS_LATTIMER(reg) < 0x20) { 399 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT); 400 reg |= (0x20 << CARDBUS_LATTIMER_SHIFT); 401 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg); 402 } 403 } 404
Indexes created Mon Oct 20 15:10:11 GMT 2025