if_atw_cardbus.c revision 1.25 1 /* $NetBSD: if_atw_cardbus.c,v 1.25 2009/02/06 02:00:50 dyoung Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000, 2003 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center. This code was adapted for the ADMtek ADM8211
10 * by David Young.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 /*
35 * CardBus bus front-end for the ADMtek ADM8211 802.11 MAC/BBP driver.
36 */
37
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: if_atw_cardbus.c,v 1.25 2009/02/06 02:00:50 dyoung Exp $");
40
41 #include "opt_inet.h"
42 #include "bpfilter.h"
43
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/mbuf.h>
47 #include <sys/malloc.h>
48 #include <sys/kernel.h>
49 #include <sys/socket.h>
50 #include <sys/ioctl.h>
51 #include <sys/errno.h>
52 #include <sys/device.h>
53
54 #include <machine/endian.h>
55
56 #include <net/if.h>
57 #include <net/if_dl.h>
58 #include <net/if_media.h>
59 #include <net/if_ether.h>
60
61 #include <net80211/ieee80211_netbsd.h>
62 #include <net80211/ieee80211_radiotap.h>
63 #include <net80211/ieee80211_var.h>
64
65 #if NBPFILTER > 0
66 #include <net/bpf.h>
67 #endif
68
69 #ifdef INET
70 #include <netinet/in.h>
71 #include <netinet/if_inarp.h>
72 #endif
73
74
75 #include <sys/bus.h>
76 #include <sys/intr.h>
77
78 #include <dev/ic/atwreg.h>
79 #include <dev/ic/rf3000reg.h>
80 #include <dev/ic/si4136reg.h>
81 #include <dev/ic/atwvar.h>
82
83 #include <dev/pci/pcivar.h>
84 #include <dev/pci/pcireg.h>
85 #include <dev/pci/pcidevs.h>
86
87 #include <dev/cardbus/cardbusvar.h>
88 #include <dev/pci/pcidevs.h>
89
90 /*
91 * PCI configuration space registers used by the ADM8211.
92 */
93 #define ATW_PCI_IOBA 0x10 /* i/o mapped base */
94 #define ATW_PCI_MMBA 0x14 /* memory mapped base */
95
96 struct atw_cardbus_softc {
97 struct atw_softc sc_atw;
98
99 /* CardBus-specific goo. */
100 void *sc_ih; /* interrupt handle */
101 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
102 cardbustag_t sc_tag; /* our CardBus tag */
103 cardbusreg_t sc_csr; /* CSR bits */
104 bus_size_t sc_mapsize; /* the size of mapped bus space
105 * region
106 */
107
108 int sc_cben; /* CardBus enables */
109 int sc_bar_reg; /* which BAR to use */
110 cardbusreg_t sc_bar_val; /* value of the BAR */
111
112 cardbus_intr_line_t sc_intrline; /* interrupt line */
113 };
114
115 static int atw_cardbus_match(device_t, cfdata_t, void *);
116 static void atw_cardbus_attach(device_t, device_t, void *);
117 static int atw_cardbus_detach(device_t, int);
118
119 CFATTACH_DECL_NEW(atw_cardbus, sizeof(struct atw_cardbus_softc),
120 atw_cardbus_match, atw_cardbus_attach, atw_cardbus_detach, atw_activate);
121
122 static void atw_cardbus_setup(struct atw_cardbus_softc *);
123
124 static int atw_cardbus_enable(struct atw_softc *);
125 static void atw_cardbus_disable(struct atw_softc *);
126
127 static const struct atw_cardbus_product *atw_cardbus_lookup
128 (const struct cardbus_attach_args *);
129
130 static const struct atw_cardbus_product {
131 u_int32_t acp_vendor; /* PCI vendor ID */
132 u_int32_t acp_product; /* PCI product ID */
133 const char *acp_product_name;
134 } atw_cardbus_products[] = {
135 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211,
136 "ADMtek ADM8211 802.11 MAC/BBP" },
137
138 { 0, 0, NULL },
139 };
140
141 static const struct atw_cardbus_product *
142 atw_cardbus_lookup(const struct cardbus_attach_args *ca)
143 {
144 const struct atw_cardbus_product *acp;
145
146 for (acp = atw_cardbus_products; acp->acp_product_name != NULL; acp++) {
147 if (PCI_VENDOR(ca->ca_id) == acp->acp_vendor &&
148 PCI_PRODUCT(ca->ca_id) == acp->acp_product)
149 return acp;
150 }
151 return NULL;
152 }
153
154 static int
155 atw_cardbus_match(device_t parent, cfdata_t match, void *aux)
156 {
157 struct cardbus_attach_args *ca = aux;
158
159 if (atw_cardbus_lookup(ca) != NULL)
160 return 1;
161
162 return 0;
163 }
164
165 static void
166 atw_cardbus_attach(device_t parent, device_t self, void *aux)
167 {
168 struct atw_cardbus_softc *csc = device_private(self);
169 struct atw_softc *sc = &csc->sc_atw;
170 struct cardbus_attach_args *ca = aux;
171 cardbus_devfunc_t ct = ca->ca_ct;
172 const struct atw_cardbus_product *acp;
173 #if 0
174 int i;
175 #define FUNCREG(__x) {#__x, (__x)}
176 struct {
177 const char *name;
178 bus_size_t ofs;
179 } funcregs[] = {
180 FUNCREG(ATW_FER), FUNCREG(ATW_FEMR), FUNCREG(ATW_FPSR),
181 FUNCREG(ATW_FFER)
182 };
183 #undef FUNCREG
184 #endif
185 bus_addr_t adr;
186
187 sc->sc_dev = self;
188 sc->sc_dmat = ca->ca_dmat;
189 csc->sc_ct = ct;
190 csc->sc_tag = ca->ca_tag;
191
192 acp = atw_cardbus_lookup(ca);
193 if (acp == NULL) {
194 printf("\n");
195 panic("atw_cardbus_attach: impossible");
196 }
197
198 /*
199 * Power management hooks.
200 */
201 sc->sc_enable = atw_cardbus_enable;
202 sc->sc_disable = atw_cardbus_disable;
203
204 /* Get revision info. */
205 sc->sc_rev = PCI_REVISION(ca->ca_class);
206
207 printf(": %s, revision %d.%d\n", acp->acp_product_name,
208 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
209
210 #if 0
211 printf("%s: signature %08x\n", device_xname(self),
212 (rev >> 4) & 0xf, rev & 0xf,
213 cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80));
214 #endif
215
216 /*
217 * Map the device.
218 */
219 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE;
220 if (Cardbus_mapreg_map(ct, ATW_PCI_MMBA,
221 CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr,
222 &csc->sc_mapsize) == 0) {
223 #if 0
224 printf("%s: atw_cardbus_attach mapped %d bytes mem space\n",
225 device_xname(self), csc->sc_mapsize);
226 #endif
227 #if rbus
228 #else
229 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
230 #endif
231 csc->sc_cben = CARDBUS_MEM_ENABLE;
232 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE;
233 csc->sc_bar_reg = ATW_PCI_MMBA;
234 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM;
235 } else if (Cardbus_mapreg_map(ct, ATW_PCI_IOBA,
236 CARDBUS_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
237 &csc->sc_mapsize) == 0) {
238 #if 0
239 printf("%s: atw_cardbus_attach mapped %d bytes I/O space\n",
240 device_xname(self), csc->sc_mapsize);
241 #endif
242 #if rbus
243 #else
244 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
245 #endif
246 csc->sc_cben = CARDBUS_IO_ENABLE;
247 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE;
248 csc->sc_bar_reg = ATW_PCI_IOBA;
249 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO;
250 } else {
251 aprint_error_dev(self, "unable to map device registers\n");
252 return;
253 }
254
255 /*
256 * Bring the chip out of powersave mode and initialize the
257 * configuration registers.
258 */
259 atw_cardbus_setup(csc);
260
261 /* Remember which interrupt line. */
262 csc->sc_intrline = ca->ca_intrline;
263
264 #if 0
265 /*
266 * The CardBus cards will make it to store-and-forward mode as
267 * soon as you put them under any kind of load, so just start
268 * out there.
269 */
270 sc->sc_txthresh = 3; /* TBD name constant */
271 #endif
272
273 /*
274 * Finish off the attach.
275 */
276 atw_attach(sc);
277
278 #if 0
279 for (i = 0; i < __arraycount(funcregs); i++) {
280 aprint_error_dev(sc->sc_dev, "%s %" PRIx32 "\n",
281 funcregs[i].name, ATW_READ(sc, funcregs[i].ofs));
282 }
283 #endif
284 ATW_WRITE(sc, ATW_FEMR, 0);
285 ATW_WRITE(sc, ATW_FER, ATW_READ(sc, ATW_FER));
286
287 /*
288 * Power down the socket.
289 */
290 Cardbus_function_disable(csc->sc_ct);
291 }
292
293 static int
294 atw_cardbus_detach(device_t self, int flags)
295 {
296 struct atw_cardbus_softc *csc = device_private(self);
297 struct atw_softc *sc = &csc->sc_atw;
298 struct cardbus_devfunc *ct = csc->sc_ct;
299 int rv;
300
301 #if defined(DIAGNOSTIC)
302 if (ct == NULL)
303 panic("%s: data structure lacks", device_xname(self));
304 #endif
305
306 rv = atw_detach(sc);
307 if (rv != 0)
308 return rv;
309
310 /*
311 * Unhook the interrupt handler.
312 */
313 if (csc->sc_ih != NULL)
314 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
315
316 /*
317 * Release bus space and close window.
318 */
319 if (csc->sc_bar_reg != 0)
320 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
321 sc->sc_st, sc->sc_sh, csc->sc_mapsize);
322
323 return 0;
324 }
325
326 static int
327 atw_cardbus_enable(struct atw_softc *sc)
328 {
329 struct atw_cardbus_softc *csc = (struct atw_cardbus_softc *)sc;
330 cardbus_devfunc_t ct = csc->sc_ct;
331 cardbus_chipset_tag_t cc = ct->ct_cc;
332 cardbus_function_tag_t cf = ct->ct_cf;
333
334 /*
335 * Power on the socket.
336 */
337 Cardbus_function_enable(ct);
338
339 /*
340 * Set up the PCI configuration registers.
341 */
342 atw_cardbus_setup(csc);
343
344 /*
345 * Map and establish the interrupt.
346 */
347 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
348 atw_intr, sc);
349 if (csc->sc_ih == NULL) {
350 aprint_error_dev(sc->sc_dev,
351 "unable to establish interrupt\n");
352 Cardbus_function_disable(csc->sc_ct);
353 return 1;
354 }
355
356 return 0;
357 }
358
359 static void
360 atw_cardbus_disable(struct atw_softc *sc)
361 {
362 struct atw_cardbus_softc *csc = (struct atw_cardbus_softc *)sc;
363 cardbus_devfunc_t ct = csc->sc_ct;
364 cardbus_chipset_tag_t cc = ct->ct_cc;
365 cardbus_function_tag_t cf = ct->ct_cf;
366
367 /* Unhook the interrupt handler. */
368 cardbus_intr_disestablish(cc, cf, csc->sc_ih);
369 csc->sc_ih = NULL;
370
371 /* Power down the socket. */
372 Cardbus_function_disable(ct);
373 }
374
375 static void
376 atw_cardbus_setup(struct atw_cardbus_softc *csc)
377 {
378 cardbus_devfunc_t ct = csc->sc_ct;
379 cardbus_chipset_tag_t cc = ct->ct_cc;
380 cardbus_function_tag_t cf = ct->ct_cf;
381 cardbusreg_t csr;
382
383 (void)cardbus_set_powerstate(ct, csc->sc_tag, PCI_PWR_D0);
384
385 /* Program the BAR. */
386 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
387 csc->sc_bar_val);
388
389 /* Make sure the right access type is on the CardBus bridge. */
390 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
391 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
392
393 /* Enable the appropriate bits in the PCI CSR. */
394 csr = cardbus_conf_read(cc, cf, csc->sc_tag,
395 CARDBUS_COMMAND_STATUS_REG);
396 csr &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE);
397 csr |= csc->sc_csr;
398 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG,
399 csr);
400 }
401