if_atw_cardbus.c revision 1.28
1 /* $NetBSD: if_atw_cardbus.c,v 1.28 2010/01/08 19:47:42 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. This code was adapted for the ADMtek ADM8211 10 * by David Young. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * CardBus bus front-end for the ADMtek ADM8211 802.11 MAC/BBP driver. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_atw_cardbus.c,v 1.28 2010/01/08 19:47:42 dyoung Exp $"); 40 41 #include "opt_inet.h" 42 #include "bpfilter.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/mbuf.h> 47 #include <sys/malloc.h> 48 #include <sys/kernel.h> 49 #include <sys/socket.h> 50 #include <sys/ioctl.h> 51 #include <sys/errno.h> 52 #include <sys/device.h> 53 54 #include <machine/endian.h> 55 56 #include <net/if.h> 57 #include <net/if_dl.h> 58 #include <net/if_media.h> 59 #include <net/if_ether.h> 60 61 #include <net80211/ieee80211_netbsd.h> 62 #include <net80211/ieee80211_radiotap.h> 63 #include <net80211/ieee80211_var.h> 64 65 #if NBPFILTER > 0 66 #include <net/bpf.h> 67 #endif 68 69 #ifdef INET 70 #include <netinet/in.h> 71 #include <netinet/if_inarp.h> 72 #endif 73 74 75 #include <sys/bus.h> 76 #include <sys/intr.h> 77 78 #include <dev/ic/atwreg.h> 79 #include <dev/ic/rf3000reg.h> 80 #include <dev/ic/si4136reg.h> 81 #include <dev/ic/atwvar.h> 82 83 #include <dev/pci/pcivar.h> 84 #include <dev/pci/pcireg.h> 85 #include <dev/pci/pcidevs.h> 86 87 #include <dev/cardbus/cardbusvar.h> 88 #include <dev/pci/pcidevs.h> 89 90 /* 91 * PCI configuration space registers used by the ADM8211. 92 */ 93 #define ATW_PCI_IOBA 0x10 /* i/o mapped base */ 94 #define ATW_PCI_MMBA 0x14 /* memory mapped base */ 95 96 struct atw_cardbus_softc { 97 struct atw_softc sc_atw; 98 99 /* CardBus-specific goo. */ 100 void *sc_ih; /* interrupt handle */ 101 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 102 cardbustag_t sc_tag; /* our CardBus tag */ 103 cardbusreg_t sc_csr; /* CSR bits */ 104 bus_size_t sc_mapsize; /* the size of mapped bus space 105 * region 106 */ 107 108 int sc_cben; /* CardBus enables */ 109 int sc_bar_reg; /* which BAR to use */ 110 cardbusreg_t sc_bar_val; /* value of the BAR */ 111 112 cardbus_intr_line_t sc_intrline; /* interrupt line */ 113 }; 114 115 static int atw_cardbus_match(device_t, cfdata_t, void *); 116 static void atw_cardbus_attach(device_t, device_t, void *); 117 static int atw_cardbus_detach(device_t, int); 118 119 CFATTACH_DECL3_NEW(atw_cardbus, sizeof(struct atw_cardbus_softc), 120 atw_cardbus_match, atw_cardbus_attach, atw_cardbus_detach, atw_activate, 121 NULL, NULL, DVF_DETACH_SHUTDOWN); 122 123 static void atw_cardbus_setup(struct atw_cardbus_softc *); 124 125 static bool atw_cardbus_suspend(device_t, pmf_qual_t); 126 static bool atw_cardbus_resume(device_t, pmf_qual_t); 127 128 static const struct atw_cardbus_product *atw_cardbus_lookup 129 (const struct cardbus_attach_args *); 130 131 static const struct atw_cardbus_product { 132 u_int32_t acp_vendor; /* PCI vendor ID */ 133 u_int32_t acp_product; /* PCI product ID */ 134 const char *acp_product_name; 135 } atw_cardbus_products[] = { 136 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211, 137 "ADMtek ADM8211 802.11 MAC/BBP" }, 138 139 { 0, 0, NULL }, 140 }; 141 142 static const struct atw_cardbus_product * 143 atw_cardbus_lookup(const struct cardbus_attach_args *ca) 144 { 145 const struct atw_cardbus_product *acp; 146 147 for (acp = atw_cardbus_products; acp->acp_product_name != NULL; acp++) { 148 if (PCI_VENDOR(ca->ca_id) == acp->acp_vendor && 149 PCI_PRODUCT(ca->ca_id) == acp->acp_product) 150 return acp; 151 } 152 return NULL; 153 } 154 155 static int 156 atw_cardbus_match(device_t parent, cfdata_t match, void *aux) 157 { 158 struct cardbus_attach_args *ca = aux; 159 160 if (atw_cardbus_lookup(ca) != NULL) 161 return 1; 162 163 return 0; 164 } 165 166 static void 167 atw_cardbus_attach(device_t parent, device_t self, void *aux) 168 { 169 struct atw_cardbus_softc *csc = device_private(self); 170 struct atw_softc *sc = &csc->sc_atw; 171 struct cardbus_attach_args *ca = aux; 172 cardbus_devfunc_t ct = ca->ca_ct; 173 const struct atw_cardbus_product *acp; 174 #if 0 175 int i; 176 #define FUNCREG(__x) {#__x, (__x)} 177 struct { 178 const char *name; 179 bus_size_t ofs; 180 } funcregs[] = { 181 FUNCREG(ATW_FER), FUNCREG(ATW_FEMR), FUNCREG(ATW_FPSR), 182 FUNCREG(ATW_FFER) 183 }; 184 #undef FUNCREG 185 #endif 186 bus_addr_t adr; 187 188 sc->sc_dev = self; 189 sc->sc_dmat = ca->ca_dmat; 190 csc->sc_ct = ct; 191 csc->sc_tag = ca->ca_tag; 192 193 acp = atw_cardbus_lookup(ca); 194 if (acp == NULL) { 195 printf("\n"); 196 panic("atw_cardbus_attach: impossible"); 197 } 198 199 /* Get revision info. */ 200 sc->sc_rev = PCI_REVISION(ca->ca_class); 201 202 printf(": %s, revision %d.%d\n", acp->acp_product_name, 203 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 204 205 #if 0 206 printf("%s: signature %08x\n", device_xname(self), 207 (rev >> 4) & 0xf, rev & 0xf, 208 cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80)); 209 #endif 210 211 /* 212 * Map the device. 213 */ 214 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE; 215 if (Cardbus_mapreg_map(ct, ATW_PCI_MMBA, 216 CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr, 217 &csc->sc_mapsize) == 0) { 218 #if 0 219 printf("%s: atw_cardbus_attach mapped %d bytes mem space\n", 220 device_xname(self), csc->sc_mapsize); 221 #endif 222 #if rbus 223 #else 224 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 225 #endif 226 csc->sc_cben = CARDBUS_MEM_ENABLE; 227 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE; 228 csc->sc_bar_reg = ATW_PCI_MMBA; 229 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; 230 } else if (Cardbus_mapreg_map(ct, ATW_PCI_IOBA, 231 CARDBUS_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr, 232 &csc->sc_mapsize) == 0) { 233 #if 0 234 printf("%s: atw_cardbus_attach mapped %d bytes I/O space\n", 235 device_xname(self), csc->sc_mapsize); 236 #endif 237 #if rbus 238 #else 239 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 240 #endif 241 csc->sc_cben = CARDBUS_IO_ENABLE; 242 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE; 243 csc->sc_bar_reg = ATW_PCI_IOBA; 244 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 245 } else { 246 aprint_error_dev(self, "unable to map device registers\n"); 247 return; 248 } 249 250 /* 251 * Bring the chip out of powersave mode and initialize the 252 * configuration registers. 253 */ 254 atw_cardbus_setup(csc); 255 256 /* Remember which interrupt line. */ 257 csc->sc_intrline = ca->ca_intrline; 258 259 #if 0 260 /* 261 * The CardBus cards will make it to store-and-forward mode as 262 * soon as you put them under any kind of load, so just start 263 * out there. 264 */ 265 sc->sc_txthresh = 3; /* TBD name constant */ 266 #endif 267 268 #if 0 269 for (i = 0; i < __arraycount(funcregs); i++) { 270 aprint_error_dev(sc->sc_dev, "%s %" PRIx32 "\n", 271 funcregs[i].name, ATW_READ(sc, funcregs[i].ofs)); 272 } 273 #endif 274 275 ATW_WRITE(sc, ATW_FEMR, 0); 276 ATW_WRITE(sc, ATW_FER, ATW_READ(sc, ATW_FER)); 277 278 /* 279 * Bus-independent attach. 280 */ 281 atw_attach(sc); 282 283 if (pmf_device_register1(sc->sc_dev, atw_cardbus_suspend, 284 atw_cardbus_resume, atw_shutdown)) 285 pmf_class_network_register(sc->sc_dev, &sc->sc_if); 286 else 287 aprint_error_dev(sc->sc_dev, 288 "couldn't establish power handler\n"); 289 290 /* 291 * Power down the socket. 292 */ 293 pmf_device_suspend(sc->sc_dev, &sc->sc_qual); 294 } 295 296 static int 297 atw_cardbus_detach(device_t self, int flags) 298 { 299 struct atw_cardbus_softc *csc = device_private(self); 300 struct atw_softc *sc = &csc->sc_atw; 301 struct cardbus_devfunc *ct = csc->sc_ct; 302 int rv; 303 304 #if defined(DIAGNOSTIC) 305 if (ct == NULL) 306 panic("%s: data structure lacks", device_xname(self)); 307 #endif 308 309 rv = atw_detach(sc); 310 if (rv != 0) 311 return rv; 312 313 /* 314 * Unhook the interrupt handler. 315 */ 316 if (csc->sc_ih != NULL) 317 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih); 318 319 /* 320 * Release bus space and close window. 321 */ 322 if (csc->sc_bar_reg != 0) 323 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 324 sc->sc_st, sc->sc_sh, csc->sc_mapsize); 325 326 return 0; 327 } 328 329 static bool 330 atw_cardbus_resume(device_t self, pmf_qual_t qual) 331 { 332 struct atw_cardbus_softc *csc = device_private(self); 333 struct atw_softc *sc = &csc->sc_atw; 334 cardbus_devfunc_t ct = csc->sc_ct; 335 cardbus_chipset_tag_t cc = ct->ct_cc; 336 cardbus_function_tag_t cf = ct->ct_cf; 337 338 /* 339 * Map and establish the interrupt. 340 */ 341 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET, 342 atw_intr, sc); 343 if (csc->sc_ih == NULL) { 344 aprint_error_dev(sc->sc_dev, "unable to establish interrupt\n"); 345 return false; 346 } 347 348 return true; 349 } 350 351 static bool 352 atw_cardbus_suspend(device_t self, pmf_qual_t qual) 353 { 354 struct atw_cardbus_softc *csc = device_private(self); 355 cardbus_devfunc_t ct = csc->sc_ct; 356 cardbus_chipset_tag_t cc = ct->ct_cc; 357 cardbus_function_tag_t cf = ct->ct_cf; 358 359 /* Unhook the interrupt handler. */ 360 cardbus_intr_disestablish(cc, cf, csc->sc_ih); 361 csc->sc_ih = NULL; 362 363 return atw_suspend(self, qual); 364 } 365 366 static void 367 atw_cardbus_setup(struct atw_cardbus_softc *csc) 368 { 369 cardbus_devfunc_t ct = csc->sc_ct; 370 cardbus_chipset_tag_t cc = ct->ct_cc; 371 cardbus_function_tag_t cf = ct->ct_cf; 372 cardbusreg_t csr; 373 int rc; 374 375 if ((rc = cardbus_set_powerstate(ct, csc->sc_tag, PCI_PWR_D0)) != 0) 376 aprint_debug("%s: cardbus_set_powerstate %d\n", __func__, rc); 377 378 /* Program the BAR. */ 379 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg, 380 csc->sc_bar_val); 381 382 /* Make sure the right access type is on the CardBus bridge. */ 383 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben); 384 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 385 386 /* Enable the appropriate bits in the PCI CSR. */ 387 csr = cardbus_conf_read(cc, cf, csc->sc_tag, 388 CARDBUS_COMMAND_STATUS_REG); 389 csr &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE); 390 csr |= csc->sc_csr; 391 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG, 392 csr); 393 } 394
Indexes created Thu Oct 02 01:09:59 GMT 2025