if_atw_cardbus.c revision 1.30
1 /* $NetBSD: if_atw_cardbus.c,v 1.30 2010/02/24 22:37:57 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 1999, 2000, 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. This code was adapted for the ADMtek ADM8211 10 * by David Young. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * CardBus bus front-end for the ADMtek ADM8211 802.11 MAC/BBP driver. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_atw_cardbus.c,v 1.30 2010/02/24 22:37:57 dyoung Exp $"); 40 41 #include "opt_inet.h" 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/mbuf.h> 46 #include <sys/malloc.h> 47 #include <sys/kernel.h> 48 #include <sys/socket.h> 49 #include <sys/ioctl.h> 50 #include <sys/errno.h> 51 #include <sys/device.h> 52 53 #include <machine/endian.h> 54 55 #include <net/if.h> 56 #include <net/if_dl.h> 57 #include <net/if_media.h> 58 #include <net/if_ether.h> 59 60 #include <net80211/ieee80211_netbsd.h> 61 #include <net80211/ieee80211_radiotap.h> 62 #include <net80211/ieee80211_var.h> 63 64 #ifdef INET 65 #include <netinet/in.h> 66 #include <netinet/if_inarp.h> 67 #endif 68 69 70 #include <sys/bus.h> 71 #include <sys/intr.h> 72 73 #include <dev/ic/atwreg.h> 74 #include <dev/ic/rf3000reg.h> 75 #include <dev/ic/si4136reg.h> 76 #include <dev/ic/atwvar.h> 77 78 #include <dev/pci/pcivar.h> 79 #include <dev/pci/pcireg.h> 80 #include <dev/pci/pcidevs.h> 81 82 #include <dev/cardbus/cardbusvar.h> 83 #include <dev/pci/pcidevs.h> 84 85 /* 86 * PCI configuration space registers used by the ADM8211. 87 */ 88 #define ATW_PCI_IOBA 0x10 /* i/o mapped base */ 89 #define ATW_PCI_MMBA 0x14 /* memory mapped base */ 90 91 struct atw_cardbus_softc { 92 struct atw_softc sc_atw; 93 94 /* CardBus-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 97 cardbustag_t sc_tag; /* our CardBus tag */ 98 cardbusreg_t sc_csr; /* CSR bits */ 99 bus_size_t sc_mapsize; /* the size of mapped bus space 100 * region 101 */ 102 103 int sc_cben; /* CardBus enables */ 104 int sc_bar_reg; /* which BAR to use */ 105 cardbusreg_t sc_bar_val; /* value of the BAR */ 106 107 cardbus_intr_line_t sc_intrline; /* interrupt line */ 108 }; 109 110 static int atw_cardbus_match(device_t, cfdata_t, void *); 111 static void atw_cardbus_attach(device_t, device_t, void *); 112 static int atw_cardbus_detach(device_t, int); 113 114 CFATTACH_DECL3_NEW(atw_cardbus, sizeof(struct atw_cardbus_softc), 115 atw_cardbus_match, atw_cardbus_attach, atw_cardbus_detach, atw_activate, 116 NULL, NULL, DVF_DETACH_SHUTDOWN); 117 118 static void atw_cardbus_setup(struct atw_cardbus_softc *); 119 120 static bool atw_cardbus_suspend(device_t, const pmf_qual_t *); 121 static bool atw_cardbus_resume(device_t, const pmf_qual_t *); 122 123 static const struct atw_cardbus_product *atw_cardbus_lookup 124 (const struct cardbus_attach_args *); 125 126 static const struct atw_cardbus_product { 127 u_int32_t acp_vendor; /* PCI vendor ID */ 128 u_int32_t acp_product; /* PCI product ID */ 129 const char *acp_product_name; 130 } atw_cardbus_products[] = { 131 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211, 132 "ADMtek ADM8211 802.11 MAC/BBP" }, 133 134 { 0, 0, NULL }, 135 }; 136 137 static const struct atw_cardbus_product * 138 atw_cardbus_lookup(const struct cardbus_attach_args *ca) 139 { 140 const struct atw_cardbus_product *acp; 141 142 for (acp = atw_cardbus_products; acp->acp_product_name != NULL; acp++) { 143 if (PCI_VENDOR(ca->ca_id) == acp->acp_vendor && 144 PCI_PRODUCT(ca->ca_id) == acp->acp_product) 145 return acp; 146 } 147 return NULL; 148 } 149 150 static int 151 atw_cardbus_match(device_t parent, cfdata_t match, void *aux) 152 { 153 struct cardbus_attach_args *ca = aux; 154 155 if (atw_cardbus_lookup(ca) != NULL) 156 return 1; 157 158 return 0; 159 } 160 161 static void 162 atw_cardbus_attach(device_t parent, device_t self, void *aux) 163 { 164 struct atw_cardbus_softc *csc = device_private(self); 165 struct atw_softc *sc = &csc->sc_atw; 166 struct cardbus_attach_args *ca = aux; 167 cardbus_devfunc_t ct = ca->ca_ct; 168 const struct atw_cardbus_product *acp; 169 #if 0 170 int i; 171 #define FUNCREG(__x) {#__x, (__x)} 172 struct { 173 const char *name; 174 bus_size_t ofs; 175 } funcregs[] = { 176 FUNCREG(ATW_FER), FUNCREG(ATW_FEMR), FUNCREG(ATW_FPSR), 177 FUNCREG(ATW_FFER) 178 }; 179 #undef FUNCREG 180 #endif 181 bus_addr_t adr; 182 183 sc->sc_dev = self; 184 sc->sc_dmat = ca->ca_dmat; 185 csc->sc_ct = ct; 186 csc->sc_tag = ca->ca_tag; 187 188 acp = atw_cardbus_lookup(ca); 189 if (acp == NULL) { 190 printf("\n"); 191 panic("atw_cardbus_attach: impossible"); 192 } 193 194 /* Get revision info. */ 195 sc->sc_rev = PCI_REVISION(ca->ca_class); 196 197 printf(": %s, revision %d.%d\n", acp->acp_product_name, 198 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 199 200 #if 0 201 printf("%s: signature %08x\n", device_xname(self), 202 (rev >> 4) & 0xf, rev & 0xf, 203 cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80)); 204 #endif 205 206 /* 207 * Map the device. 208 */ 209 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE; 210 if (Cardbus_mapreg_map(ct, ATW_PCI_MMBA, 211 CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr, 212 &csc->sc_mapsize) == 0) { 213 #if 0 214 printf("%s: atw_cardbus_attach mapped %d bytes mem space\n", 215 device_xname(self), csc->sc_mapsize); 216 #endif 217 #if rbus 218 #else 219 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 220 #endif 221 csc->sc_cben = CARDBUS_MEM_ENABLE; 222 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE; 223 csc->sc_bar_reg = ATW_PCI_MMBA; 224 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; 225 } else if (Cardbus_mapreg_map(ct, ATW_PCI_IOBA, 226 CARDBUS_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr, 227 &csc->sc_mapsize) == 0) { 228 #if 0 229 printf("%s: atw_cardbus_attach mapped %d bytes I/O space\n", 230 device_xname(self), csc->sc_mapsize); 231 #endif 232 #if rbus 233 #else 234 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 235 #endif 236 csc->sc_cben = CARDBUS_IO_ENABLE; 237 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE; 238 csc->sc_bar_reg = ATW_PCI_IOBA; 239 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 240 } else { 241 aprint_error_dev(self, "unable to map device registers\n"); 242 return; 243 } 244 245 /* 246 * Bring the chip out of powersave mode and initialize the 247 * configuration registers. 248 */ 249 atw_cardbus_setup(csc); 250 251 /* Remember which interrupt line. */ 252 csc->sc_intrline = ca->ca_intrline; 253 254 #if 0 255 /* 256 * The CardBus cards will make it to store-and-forward mode as 257 * soon as you put them under any kind of load, so just start 258 * out there. 259 */ 260 sc->sc_txthresh = 3; /* TBD name constant */ 261 #endif 262 263 #if 0 264 for (i = 0; i < __arraycount(funcregs); i++) { 265 aprint_error_dev(sc->sc_dev, "%s %" PRIx32 "\n", 266 funcregs[i].name, ATW_READ(sc, funcregs[i].ofs)); 267 } 268 #endif 269 270 ATW_WRITE(sc, ATW_FEMR, 0); 271 ATW_WRITE(sc, ATW_FER, ATW_READ(sc, ATW_FER)); 272 273 /* 274 * Bus-independent attach. 275 */ 276 atw_attach(sc); 277 278 if (pmf_device_register1(sc->sc_dev, atw_cardbus_suspend, 279 atw_cardbus_resume, atw_shutdown)) 280 pmf_class_network_register(sc->sc_dev, &sc->sc_if); 281 else 282 aprint_error_dev(sc->sc_dev, 283 "couldn't establish power handler\n"); 284 285 /* 286 * Power down the socket. 287 */ 288 pmf_device_suspend(sc->sc_dev, &sc->sc_qual); 289 } 290 291 static int 292 atw_cardbus_detach(device_t self, int flags) 293 { 294 struct atw_cardbus_softc *csc = device_private(self); 295 struct atw_softc *sc = &csc->sc_atw; 296 struct cardbus_devfunc *ct = csc->sc_ct; 297 int rv; 298 299 #if defined(DIAGNOSTIC) 300 if (ct == NULL) 301 panic("%s: data structure lacks", device_xname(self)); 302 #endif 303 304 rv = atw_detach(sc); 305 if (rv != 0) 306 return rv; 307 308 /* 309 * Unhook the interrupt handler. 310 */ 311 if (csc->sc_ih != NULL) 312 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih); 313 314 /* 315 * Release bus space and close window. 316 */ 317 if (csc->sc_bar_reg != 0) 318 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 319 sc->sc_st, sc->sc_sh, csc->sc_mapsize); 320 321 return 0; 322 } 323 324 static bool 325 atw_cardbus_resume(device_t self, const pmf_qual_t *qual) 326 { 327 struct atw_cardbus_softc *csc = device_private(self); 328 struct atw_softc *sc = &csc->sc_atw; 329 cardbus_devfunc_t ct = csc->sc_ct; 330 cardbus_chipset_tag_t cc = ct->ct_cc; 331 cardbus_function_tag_t cf = ct->ct_cf; 332 333 /* 334 * Map and establish the interrupt. 335 */ 336 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET, 337 atw_intr, sc); 338 if (csc->sc_ih == NULL) { 339 aprint_error_dev(sc->sc_dev, "unable to establish interrupt\n"); 340 return false; 341 } 342 343 return true; 344 } 345 346 static bool 347 atw_cardbus_suspend(device_t self, const pmf_qual_t *qual) 348 { 349 struct atw_cardbus_softc *csc = device_private(self); 350 cardbus_devfunc_t ct = csc->sc_ct; 351 cardbus_chipset_tag_t cc = ct->ct_cc; 352 cardbus_function_tag_t cf = ct->ct_cf; 353 354 /* Unhook the interrupt handler. */ 355 cardbus_intr_disestablish(cc, cf, csc->sc_ih); 356 csc->sc_ih = NULL; 357 358 return atw_suspend(self, qual); 359 } 360 361 static void 362 atw_cardbus_setup(struct atw_cardbus_softc *csc) 363 { 364 cardbus_devfunc_t ct = csc->sc_ct; 365 cardbus_chipset_tag_t cc = ct->ct_cc; 366 cardbus_function_tag_t cf = ct->ct_cf; 367 cardbusreg_t csr; 368 int rc; 369 370 if ((rc = cardbus_set_powerstate(ct, csc->sc_tag, PCI_PWR_D0)) != 0) 371 aprint_debug("%s: cardbus_set_powerstate %d\n", __func__, rc); 372 373 /* Program the BAR. */ 374 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg, 375 csc->sc_bar_val); 376 377 /* Make sure the right access type is on the CardBus bridge. */ 378 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben); 379 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 380 381 /* Enable the appropriate bits in the PCI CSR. */ 382 csr = cardbus_conf_read(cc, cf, csc->sc_tag, 383 CARDBUS_COMMAND_STATUS_REG); 384 csr &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE); 385 csr |= csc->sc_csr; 386 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG, 387 csr); 388 } 389
Indexes created Thu Oct 02 01:09:59 GMT 2025