if_atw_cardbus.c revision 1.5 1 /* $NetBSD: if_atw_cardbus.c,v 1.5 2004/01/29 10:25:49 dyoung Exp $ */
2
3 /*-
4 * Copyright (c) 1999, 2000, 2003 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center. This code was adapted for the ADMtek ADM8211
10 * by David Young.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 * 3. All advertising materials mentioning features or use of this software
21 * must display the following acknowledgement:
22 * This product includes software developed by the NetBSD
23 * Foundation, Inc. and its contributors.
24 * 4. Neither the name of The NetBSD Foundation nor the names of its
25 * contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
29 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
30 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
31 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
32 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
34 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
35 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
36 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
37 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 */
40
41 /*
42 * CardBus bus front-end for the ADMtek ADM8211 802.11 MAC/BBP driver.
43 */
44
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: if_atw_cardbus.c,v 1.5 2004/01/29 10:25:49 dyoung Exp $");
47
48 #include "opt_inet.h"
49 #include "opt_ns.h"
50 #include "bpfilter.h"
51
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/mbuf.h>
55 #include <sys/malloc.h>
56 #include <sys/kernel.h>
57 #include <sys/socket.h>
58 #include <sys/ioctl.h>
59 #include <sys/errno.h>
60 #include <sys/device.h>
61
62 #include <machine/endian.h>
63
64 #include <net/if.h>
65 #include <net/if_dl.h>
66 #include <net/if_media.h>
67 #include <net/if_ether.h>
68
69 #include <net80211/ieee80211_compat.h>
70 #include <net80211/ieee80211_radiotap.h>
71 #include <net80211/ieee80211_var.h>
72
73 #if NBPFILTER > 0
74 #include <net/bpf.h>
75 #endif
76
77 #ifdef INET
78 #include <netinet/in.h>
79 #include <netinet/if_inarp.h>
80 #endif
81
82 #ifdef NS
83 #include <netns/ns.h>
84 #include <netns/ns_if.h>
85 #endif
86
87 #include <machine/bus.h>
88 #include <machine/intr.h>
89
90 #include <dev/ic/atwreg.h>
91 #include <dev/ic/atwvar.h>
92
93 #include <dev/pci/pcivar.h>
94 #include <dev/pci/pcireg.h>
95 #include <dev/pci/pcidevs.h>
96
97 #include <dev/cardbus/cardbusvar.h>
98 #include <dev/cardbus/cardbusdevs.h>
99
100 /*
101 * PCI configuration space registers used by the ADM8211.
102 */
103 #define ATW_PCI_IOBA 0x10 /* i/o mapped base */
104 #define ATW_PCI_MMBA 0x14 /* memory mapped base */
105
106 struct atw_cardbus_softc {
107 struct atw_softc sc_atw; /* real ADM8211 softc */
108
109 /* CardBus-specific goo. */
110 void *sc_ih; /* interrupt handle */
111 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
112 cardbustag_t sc_tag; /* our CardBus tag */
113 int sc_csr; /* CSR bits */
114 bus_size_t sc_mapsize; /* the size of mapped bus space
115 region */
116
117 int sc_cben; /* CardBus enables */
118 int sc_bar_reg; /* which BAR to use */
119 pcireg_t sc_bar_val; /* value of the BAR */
120
121 int sc_intrline; /* interrupt line */
122 };
123
124 int atw_cardbus_match(struct device *, struct cfdata *, void *);
125 void atw_cardbus_attach(struct device *, struct device *, void *);
126 int atw_cardbus_detach(struct device *, int);
127
128 CFATTACH_DECL(atw_cardbus, sizeof(struct atw_cardbus_softc),
129 atw_cardbus_match, atw_cardbus_attach, atw_cardbus_detach, atw_activate);
130
131 void atw_cardbus_setup(struct atw_cardbus_softc *);
132
133 int atw_cardbus_enable(struct atw_softc *);
134 void atw_cardbus_disable(struct atw_softc *);
135 void atw_cardbus_power(struct atw_softc *, int);
136
137 static void atw_cardbus_intr_ack(struct atw_softc *);
138
139 const struct atw_cardbus_product *atw_cardbus_lookup
140 (const struct cardbus_attach_args *);
141
142 const struct atw_cardbus_product {
143 u_int32_t acp_vendor; /* PCI vendor ID */
144 u_int32_t acp_product; /* PCI product ID */
145 const char *acp_product_name;
146 } atw_cardbus_products[] = {
147 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211,
148 "ADMtek ADM8211 802.11 MAC/BBP" },
149
150 { 0, 0, NULL },
151 };
152
153 const struct atw_cardbus_product *
154 atw_cardbus_lookup(const struct cardbus_attach_args *ca)
155 {
156 const struct atw_cardbus_product *acp;
157
158 for (acp = atw_cardbus_products;
159 acp->acp_product_name != NULL;
160 acp++) {
161 if (PCI_VENDOR(ca->ca_id) == acp->acp_vendor &&
162 PCI_PRODUCT(ca->ca_id) == acp->acp_product)
163 return (acp);
164 }
165 return (NULL);
166 }
167
168 int
169 atw_cardbus_match(struct device *parent, struct cfdata *match, void *aux)
170 {
171 struct cardbus_attach_args *ca = aux;
172
173 if (atw_cardbus_lookup(ca) != NULL)
174 return (1);
175
176 return (0);
177 }
178
179 void
180 atw_cardbus_attach(struct device *parent, struct device *self, void *aux)
181 {
182 struct atw_cardbus_softc *csc = (void *)self;
183 struct atw_softc *sc = &csc->sc_atw;
184 struct cardbus_attach_args *ca = aux;
185 cardbus_devfunc_t ct = ca->ca_ct;
186 const struct atw_cardbus_product *acp;
187 bus_addr_t adr;
188 int rev;
189
190 sc->sc_dmat = ca->ca_dmat;
191 csc->sc_ct = ct;
192 csc->sc_tag = ca->ca_tag;
193
194 acp = atw_cardbus_lookup(ca);
195 if (acp == NULL) {
196 printf("\n");
197 panic("atw_cardbus_attach: impossible");
198 }
199
200 /*
201 * Power management hooks.
202 */
203 sc->sc_enable = atw_cardbus_enable;
204 sc->sc_disable = atw_cardbus_disable;
205 sc->sc_power = atw_cardbus_power;
206
207 sc->sc_intr_ack = atw_cardbus_intr_ack;
208
209 /* Get revision info. */
210 rev = PCI_REVISION(ca->ca_class);
211
212 printf(": %s\n", acp->acp_product_name);
213
214 #if 0
215 printf("%s: pass %d.%d signature %08x\n", sc->sc_dev.dv_xname,
216 (rev >> 4) & 0xf, rev & 0xf,
217 cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80));
218 #endif
219
220 /*
221 * Map the device.
222 */
223 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE;
224 if (Cardbus_mapreg_map(ct, ATW_PCI_MMBA,
225 CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr,
226 &csc->sc_mapsize) == 0) {
227 #if 0
228 printf("%s: atw_cardbus_attach mapped %d bytes mem space\n",
229 sc->sc_dev.dv_xname, csc->sc_mapsize);
230 #endif
231 #if rbus
232 #else
233 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
234 #endif
235 csc->sc_cben = CARDBUS_MEM_ENABLE;
236 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE;
237 csc->sc_bar_reg = ATW_PCI_MMBA;
238 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM;
239 } else if (Cardbus_mapreg_map(ct, ATW_PCI_IOBA,
240 CARDBUS_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
241 &csc->sc_mapsize) == 0) {
242 #if 0
243 printf("%s: atw_cardbus_attach mapped %d bytes I/O space\n",
244 sc->sc_dev.dv_xname, csc->sc_mapsize);
245 #endif
246 #if rbus
247 #else
248 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
249 #endif
250 csc->sc_cben = CARDBUS_IO_ENABLE;
251 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE;
252 csc->sc_bar_reg = ATW_PCI_IOBA;
253 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO;
254 } else {
255 printf("%s: unable to map device registers\n",
256 sc->sc_dev.dv_xname);
257 return;
258 }
259
260 /*
261 * Bring the chip out of powersave mode and initialize the
262 * configuration registers.
263 */
264 atw_cardbus_setup(csc);
265
266 /* Remember which interrupt line. */
267 csc->sc_intrline = ca->ca_intrline;
268
269 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname,
270 csc->sc_intrline);
271 #if 0
272 /*
273 * The CardBus cards will make it to store-and-forward mode as
274 * soon as you put them under any kind of load, so just start
275 * out there.
276 */
277 sc->sc_txthresh = 3; /* TBD name constant */
278 #endif
279
280 /*
281 * Finish off the attach.
282 */
283 atw_attach(sc);
284
285 ATW_WRITE(sc, ATW_FER, ATW_FER_INTR);
286
287 /*
288 * Power down the socket.
289 */
290 Cardbus_function_disable(csc->sc_ct);
291 }
292
293 static void
294 atw_cardbus_intr_ack(struct atw_softc *sc)
295 {
296 ATW_WRITE(sc, ATW_FER, ATW_FER_INTR);
297 }
298
299 int
300 atw_cardbus_detach(struct device *self, int flags)
301 {
302 struct atw_cardbus_softc *csc = (void *)self;
303 struct atw_softc *sc = &csc->sc_atw;
304 struct cardbus_devfunc *ct = csc->sc_ct;
305 int rv;
306
307 #if defined(DIAGNOSTIC)
308 if (ct == NULL)
309 panic("%s: data structure lacks", sc->sc_dev.dv_xname);
310 #endif
311
312 rv = atw_detach(sc);
313 if (rv)
314 return (rv);
315
316 /*
317 * Unhook the interrupt handler.
318 */
319 if (csc->sc_ih != NULL)
320 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
321
322 /*
323 * Release bus space and close window.
324 */
325 if (csc->sc_bar_reg != 0)
326 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
327 sc->sc_st, sc->sc_sh, csc->sc_mapsize);
328
329 return (0);
330 }
331
332 int
333 atw_cardbus_enable(struct atw_softc *sc)
334 {
335 struct atw_cardbus_softc *csc = (void *) sc;
336 cardbus_devfunc_t ct = csc->sc_ct;
337 cardbus_chipset_tag_t cc = ct->ct_cc;
338 cardbus_function_tag_t cf = ct->ct_cf;
339
340 /*
341 * Power on the socket.
342 */
343 Cardbus_function_enable(ct);
344
345 /*
346 * Set up the PCI configuration registers.
347 */
348 atw_cardbus_setup(csc);
349
350 /*
351 * Map and establish the interrupt.
352 */
353 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
354 atw_intr, sc);
355 if (csc->sc_ih == NULL) {
356 printf("%s: unable to establish interrupt at %d\n",
357 sc->sc_dev.dv_xname, csc->sc_intrline);
358 Cardbus_function_disable(csc->sc_ct);
359 return (1);
360 }
361
362 return (0);
363 }
364
365 void
366 atw_cardbus_disable(struct atw_softc *sc)
367 {
368 struct atw_cardbus_softc *csc = (void *) sc;
369 cardbus_devfunc_t ct = csc->sc_ct;
370 cardbus_chipset_tag_t cc = ct->ct_cc;
371 cardbus_function_tag_t cf = ct->ct_cf;
372
373 /* Unhook the interrupt handler. */
374 cardbus_intr_disestablish(cc, cf, csc->sc_ih);
375 csc->sc_ih = NULL;
376
377 /* Power down the socket. */
378 Cardbus_function_disable(ct);
379 }
380
381 void
382 atw_cardbus_power(struct atw_softc *sc, int why)
383 {
384 struct atw_cardbus_softc *csc = (void *) sc;
385
386 printf("%s: atw_cardbus_power\n", sc->sc_dev.dv_xname);
387
388 if (why == PWR_RESUME) {
389 /*
390 * Give the PCI configuration registers a kick
391 * in the head.
392 */
393 #ifdef DIAGNOSTIC
394 if (ATW_IS_ENABLED(sc) == 0)
395 panic("atw_cardbus_power");
396 #endif
397 atw_cardbus_setup(csc);
398 }
399 }
400
401 void
402 atw_cardbus_setup(struct atw_cardbus_softc *csc)
403 {
404 struct atw_softc *sc = &csc->sc_atw;
405 cardbus_devfunc_t ct = csc->sc_ct;
406 cardbus_chipset_tag_t cc = ct->ct_cc;
407 cardbus_function_tag_t cf = ct->ct_cf;
408 pcireg_t reg;
409 int pmreg;
410
411 if (cardbus_get_capability(cc, cf, csc->sc_tag,
412 PCI_CAP_PWRMGMT, &pmreg, 0)) {
413 reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03;
414 #if 1 /* XXX Probably not right for CardBus. */
415 if (reg == 3) {
416 /*
417 * The card has lost all configuration data in
418 * this state, so punt.
419 */
420 printf("%s: unable to wake up from power state D3\n",
421 sc->sc_dev.dv_xname);
422 return;
423 }
424 #endif
425 if (reg != 0) {
426 printf("%s: waking up from power state D%d\n",
427 sc->sc_dev.dv_xname, reg);
428 cardbus_conf_write(cc, cf, csc->sc_tag,
429 pmreg + 4, 0);
430 }
431 }
432
433 /* Make sure the right access type is on the CardBus bridge. */
434 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
435 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
436
437 /* Program the BAR. */
438 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
439 csc->sc_bar_val);
440
441 /* Enable the appropriate bits in the PCI CSR. */
442 reg = cardbus_conf_read(cc, cf, csc->sc_tag,
443 CARDBUS_COMMAND_STATUS_REG);
444 reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE);
445 reg |= csc->sc_csr;
446 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG,
447 reg);
448
449 /*
450 * Make sure the latency timer is set to some reasonable
451 * value.
452 */
453 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG);
454 if (CARDBUS_LATTIMER(reg) < 0x20) {
455 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT);
456 reg |= (0x20 << CARDBUS_LATTIMER_SHIFT);
457 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg);
458 }
459 }
460