if_ex_cardbus.c revision 1.21
1 /* $NetBSD: if_ex_cardbus.c,v 1.21 2001/07/17 13:55:12 mrg Exp $ */ 2 3 /* 4 * CardBus specific routines for 3Com 3C575-family CardBus ethernet adapter 5 * 6 * Copyright (c) 1998 and 1999 7 * HAYAKAWA Koichi. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the author. 20 * 4. Neither the name of the author nor the names of any co-contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY HAYAKAWA KOICHI ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL TAKESHI OHASHI OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * 37 */ 38 39 /* #define EX_DEBUG 4 */ /* define to report infomation for debugging */ 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/socket.h> 45 #include <sys/ioctl.h> 46 #include <sys/errno.h> 47 #include <sys/syslog.h> 48 #include <sys/select.h> 49 #include <sys/device.h> 50 51 #include <net/if.h> 52 #include <net/if_dl.h> 53 #include <net/if_ether.h> 54 #include <net/if_media.h> 55 56 #include <machine/cpu.h> 57 #include <machine/bus.h> 58 59 #include <dev/cardbus/cardbusvar.h> 60 #include <dev/cardbus/cardbusdevs.h> 61 62 #include <dev/mii/miivar.h> 63 64 #include <dev/ic/elink3var.h> 65 #include <dev/ic/elink3reg.h> 66 #include <dev/ic/elinkxlreg.h> 67 #include <dev/ic/elinkxlvar.h> 68 69 #if defined DEBUG && !defined EX_DEBUG 70 #define EX_DEBUG 71 #endif 72 73 #if defined EX_DEBUG 74 #define DPRINTF(a) printf a 75 #else 76 #define DPRINTF(a) 77 #endif 78 79 #define CARDBUS_3C575BTX_FUNCSTAT_PCIREG CARDBUS_BASE2_REG /* means 0x18 */ 80 #define EX_CB_INTR 4 /* intr acknowledge reg. CardBus only */ 81 #define EX_CB_INTR_ACK 0x8000 /* intr acknowledge bit */ 82 83 int ex_cardbus_match __P((struct device *, struct cfdata *, void *)); 84 void ex_cardbus_attach __P((struct device *, struct device *,void *)); 85 int ex_cardbus_detach __P((struct device *, int)); 86 void ex_cardbus_intr_ack __P((struct ex_softc *)); 87 88 int ex_cardbus_enable __P((struct ex_softc *)); 89 void ex_cardbus_disable __P((struct ex_softc *)); 90 void ex_cardbus_power __P((struct ex_softc *, int)); 91 92 struct ex_cardbus_softc { 93 struct ex_softc sc_softc; 94 95 cardbus_devfunc_t sc_ct; 96 int sc_intrline; 97 u_int8_t sc_cardbus_flags; 98 #define EX_REATTACH 0x01 99 #define EX_ABSENT 0x02 100 u_int8_t sc_cardtype; 101 #define EX_CB_BOOMERANG 1 102 #define EX_CB_CYCLONE 2 103 104 /* CardBus function status space. 575B requests it. */ 105 bus_space_tag_t sc_funct; 106 bus_space_handle_t sc_funch; 107 bus_size_t sc_funcsize; 108 109 bus_size_t sc_mapsize; /* the size of mapped bus space region */ 110 111 cardbustag_t sc_tag; 112 113 int sc_csr; /* CSR bits */ 114 int sc_bar_reg; /* which BAR to use */ 115 pcireg_t sc_bar_val; /* value of the BAR */ 116 int sc_bar_reg1; /* which BAR to use */ 117 pcireg_t sc_bar_val1; /* value of the BAR */ 118 119 }; 120 121 struct cfattach ex_cardbus_ca = { 122 sizeof(struct ex_cardbus_softc), ex_cardbus_match, 123 ex_cardbus_attach, ex_cardbus_detach, ex_activate 124 }; 125 126 const struct ex_cardbus_product { 127 u_int32_t ecp_prodid; /* CardBus product ID */ 128 int ecp_flags; /* initial softc flags */ 129 pcireg_t ecp_csr; /* PCI CSR flags */ 130 int ecp_cardtype; /* card type */ 131 const char *ecp_name; /* device name */ 132 } ex_cardbus_products[] = { 133 { CARDBUS_PRODUCT_3COM_3C575TX, 134 EX_CONF_MII | EX_CONF_EEPROM_OFF | EX_CONF_EEPROM_8BIT, 135 CARDBUS_COMMAND_IO_ENABLE | CARDBUS_COMMAND_MASTER_ENABLE, 136 EX_CB_BOOMERANG, 137 "3c575-TX Ethernet" }, 138 139 { CARDBUS_PRODUCT_3COM_3C575BTX, 140 EX_CONF_90XB|EX_CONF_MII|EX_CONF_INV_LED_POLARITY | 141 EX_CONF_EEPROM_OFF | EX_CONF_EEPROM_8BIT, 142 CARDBUS_COMMAND_IO_ENABLE | CARDBUS_COMMAND_MEM_ENABLE | 143 CARDBUS_COMMAND_MASTER_ENABLE, 144 EX_CB_CYCLONE, 145 "3c575B-TX Ethernet" }, 146 147 { CARDBUS_PRODUCT_3COM_3C575CTX, 148 EX_CONF_90XB | EX_CONF_PHY_POWER | EX_CONF_EEPROM_OFF | 149 EX_CONF_EEPROM_8BIT, 150 CARDBUS_COMMAND_IO_ENABLE | CARDBUS_COMMAND_MEM_ENABLE | 151 CARDBUS_COMMAND_MASTER_ENABLE, 152 EX_CB_CYCLONE, 153 "3c575CT Ethernet" }, 154 155 { 0, 156 0, 157 0, 158 0, 159 NULL }, 160 }; 161 162 163 void ex_cardbus_setup __P((struct ex_cardbus_softc *)); 164 165 const struct ex_cardbus_product *ex_cardbus_lookup 166 __P((const struct cardbus_attach_args *)); 167 168 const struct ex_cardbus_product * 169 ex_cardbus_lookup(ca) 170 const struct cardbus_attach_args *ca; 171 { 172 const struct ex_cardbus_product *ecp; 173 174 if (CARDBUS_VENDOR(ca->ca_id) != CARDBUS_VENDOR_3COM) 175 return (NULL); 176 177 for (ecp = ex_cardbus_products; ecp->ecp_name != NULL; ecp++) 178 if (CARDBUS_PRODUCT(ca->ca_id) == ecp->ecp_prodid) 179 return (ecp); 180 return (NULL); 181 } 182 183 int 184 ex_cardbus_match(parent, cf, aux) 185 struct device *parent; 186 struct cfdata *cf; 187 void *aux; 188 { 189 struct cardbus_attach_args *ca = aux; 190 191 if (ex_cardbus_lookup(ca) != NULL) 192 return (1); 193 194 return (0); 195 } 196 197 void 198 ex_cardbus_attach(parent, self, aux) 199 struct device *parent; 200 struct device *self; 201 void *aux; 202 { 203 struct ex_cardbus_softc *csc = (void *)self; 204 struct ex_softc *sc = &csc->sc_softc; 205 struct cardbus_attach_args *ca = aux; 206 cardbus_devfunc_t ct = ca->ca_ct; 207 #if rbus 208 #else 209 cardbus_chipset_tag_t cc = ct->ct_cc; 210 #endif 211 const struct ex_cardbus_product *ecp; 212 bus_addr_t adr, adr1; 213 214 sc->ex_bustype = EX_BUS_CARDBUS; 215 sc->sc_dmat = ca->ca_dmat; 216 csc->sc_ct = ca->ca_ct; 217 csc->sc_intrline = ca->ca_intrline; 218 csc->sc_tag = ca->ca_tag; 219 220 ecp = ex_cardbus_lookup(ca); 221 if (ecp == NULL) { 222 printf("\n"); 223 panic("ex_cardbus_attach: impossible"); 224 } 225 226 printf(": 3Com %s\n", ecp->ecp_name); 227 228 sc->ex_conf = ecp->ecp_flags; 229 csc->sc_cardtype = ecp->ecp_cardtype; 230 csc->sc_csr = ecp->ecp_csr; 231 232 if (Cardbus_mapreg_map(ct, CARDBUS_BASE0_REG, CARDBUS_MAPREG_TYPE_IO, 0, 233 &sc->sc_iot, &sc->sc_ioh, &adr, &csc->sc_mapsize) == 0) { 234 #if rbus 235 #else 236 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr + csc->sc_mapsize); 237 #endif 238 csc->sc_bar_reg = CARDBUS_BASE0_REG; 239 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 240 241 if (csc->sc_cardtype == EX_CB_CYCLONE) { 242 /* Map CardBus function status window. */ 243 if (Cardbus_mapreg_map(ct, 244 CARDBUS_3C575BTX_FUNCSTAT_PCIREG, 245 CARDBUS_MAPREG_TYPE_MEM, 0, 246 &csc->sc_funct, &csc->sc_funch, 247 &adr1, &csc->sc_funcsize) == 0) { 248 249 csc->sc_bar_reg1 = 250 CARDBUS_3C575BTX_FUNCSTAT_PCIREG; 251 csc->sc_bar_val1 = 252 adr1 | CARDBUS_MAPREG_TYPE_MEM; 253 254 } else { 255 printf("%s: unable to map function " 256 "status window\n", self->dv_xname); 257 return; 258 } 259 260 /* Setup interrupt acknowledge hook */ 261 sc->intr_ack = ex_cardbus_intr_ack; 262 } 263 } 264 else { 265 printf(": can't map i/o space\n"); 266 return; 267 } 268 269 /* Power management hooks. */ 270 sc->enable = ex_cardbus_enable; 271 sc->disable = ex_cardbus_disable; 272 sc->power = ex_cardbus_power; 273 274 /* 275 * Handle power management nonsense and 276 * initialize the configuration registers. 277 */ 278 ex_cardbus_setup(csc); 279 280 ex_config(sc); 281 282 if (csc->sc_cardtype == EX_CB_CYCLONE) 283 bus_space_write_4(csc->sc_funct, csc->sc_funch, 284 EX_CB_INTR, EX_CB_INTR_ACK); 285 286 Cardbus_function_disable(csc->sc_ct); 287 } 288 289 void 290 ex_cardbus_intr_ack(sc) 291 struct ex_softc *sc; 292 { 293 struct ex_cardbus_softc *csc = (struct ex_cardbus_softc *)sc; 294 295 bus_space_write_4(csc->sc_funct, csc->sc_funch, EX_CB_INTR, 296 EX_CB_INTR_ACK); 297 } 298 299 int 300 ex_cardbus_detach(self, arg) 301 struct device *self; 302 int arg; 303 { 304 struct ex_cardbus_softc *csc = (void *)self; 305 struct ex_softc *sc = &csc->sc_softc; 306 struct cardbus_devfunc *ct = csc->sc_ct; 307 int rv; 308 309 #if defined(DIAGNOSTIC) 310 if (ct == NULL) { 311 panic("%s: data structure lacks\n", sc->sc_dev.dv_xname); 312 } 313 #endif 314 315 rv = ex_detach(sc); 316 if (rv == 0) { 317 /* 318 * Unhook the interrupt handler. 319 */ 320 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, sc->sc_ih); 321 322 if (csc->sc_cardtype == EX_CB_CYCLONE) { 323 Cardbus_mapreg_unmap(ct, 324 CARDBUS_3C575BTX_FUNCSTAT_PCIREG, 325 csc->sc_funct, csc->sc_funch, csc->sc_funcsize); 326 } 327 328 Cardbus_mapreg_unmap(ct, CARDBUS_BASE0_REG, sc->sc_iot, 329 sc->sc_ioh, csc->sc_mapsize); 330 } 331 return (rv); 332 } 333 334 int 335 ex_cardbus_enable(sc) 336 struct ex_softc *sc; 337 { 338 struct ex_cardbus_softc *csc = (struct ex_cardbus_softc *)sc; 339 cardbus_function_tag_t cf = csc->sc_ct->ct_cf; 340 cardbus_chipset_tag_t cc = csc->sc_ct->ct_cc; 341 342 Cardbus_function_enable(csc->sc_ct); 343 ex_cardbus_setup(csc); 344 345 sc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, 346 IPL_NET, ex_intr, sc); 347 if (NULL == sc->sc_ih) { 348 printf("%s: couldn't establish interrupt\n", 349 sc->sc_dev.dv_xname); 350 return (1); 351 } 352 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname, 353 csc->sc_intrline); 354 355 return (0); 356 } 357 358 void 359 ex_cardbus_disable(sc) 360 struct ex_softc *sc; 361 { 362 struct ex_cardbus_softc *csc = (struct ex_cardbus_softc *)sc; 363 cardbus_function_tag_t cf = csc->sc_ct->ct_cf; 364 cardbus_chipset_tag_t cc = csc->sc_ct->ct_cc; 365 366 cardbus_intr_disestablish(cc, cf, sc->sc_ih); 367 sc->sc_ih = NULL; 368 369 Cardbus_function_disable(csc->sc_ct); 370 371 } 372 373 void 374 ex_cardbus_power(sc, why) 375 struct ex_softc *sc; 376 int why; 377 { 378 struct ex_cardbus_softc *csc = (void *) sc; 379 380 if (why == PWR_RESUME) { 381 /* 382 * Give the PCI configuration registers a kick 383 * in the head. 384 */ 385 #ifdef DIAGNOSTIC 386 if (sc->enabled == 0) 387 panic("ex_cardbus_power"); 388 #endif 389 ex_cardbus_setup(csc); 390 } 391 } 392 393 void 394 ex_cardbus_setup(csc) 395 struct ex_cardbus_softc *csc; 396 { 397 struct ex_softc *sc = &csc->sc_softc; 398 cardbus_devfunc_t ct = csc->sc_ct; 399 cardbus_chipset_tag_t cc = ct->ct_cc; 400 cardbus_function_tag_t cf = ct->ct_cf; 401 cardbusreg_t reg; 402 int pmreg; 403 404 /* Get it out of power save mode if needed (BIOS bugs). */ 405 if (cardbus_get_capability(cc, cf, csc->sc_tag, 406 PCI_CAP_PWRMGMT, &pmreg, 0)) { 407 reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03; 408 #if 1 /* XXX Probably not right for CardBus. */ 409 if (reg == 3) { 410 /* 411 * The card has lost all configuration data in 412 * this state, so punt. 413 */ 414 printf("%s: unable to wake up from power state D3\n", 415 sc->sc_dev.dv_xname); 416 return; 417 } 418 #endif 419 if (reg != 0) { 420 printf("%s: waking up from power state D%d\n", 421 sc->sc_dev.dv_xname, reg); 422 cardbus_conf_write(cc, cf, csc->sc_tag, 423 pmreg + 4, 0); 424 } 425 } 426 427 /* Make sure the right access type is on the CardBus bridge. */ 428 (ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_IO_ENABLE); 429 if (csc->sc_cardtype == EX_CB_CYCLONE) { 430 /* 431 * Make sure CardBus brigde can access memory space. Usually 432 * memory access is enabled by BIOS, but some BIOSes do not 433 * enable it. 434 */ 435 (ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_MEM_ENABLE); 436 437 /* Program the BAR */ 438 cardbus_conf_write(cc, cf, csc->sc_tag, 439 csc->sc_bar_reg1, csc->sc_bar_val1); 440 } 441 (ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 442 443 444 /* Program the BAR */ 445 cardbus_conf_write(cc, cf, csc->sc_tag, 446 csc->sc_bar_reg, csc->sc_bar_val); 447 448 /* Enable the appropriate bits in the CARDBUS CSR. */ 449 reg = cardbus_conf_read(cc, cf, csc->sc_tag, 450 CARDBUS_COMMAND_STATUS_REG); 451 reg |= csc->sc_csr; 452 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG, 453 reg); 454 455 /* 456 * set latency timmer 457 */ 458 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG); 459 if (CARDBUS_LATTIMER(reg) < 0x20) { 460 /* at least the value of latency timer should 0x20. */ 461 DPRINTF(("if_ex_cardbus: lattimer 0x%x -> 0x20\n", 462 CARDBUS_LATTIMER(reg))); 463 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT); 464 reg |= (0x20 << CARDBUS_LATTIMER_SHIFT); 465 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg); 466 } 467 } 468
Indexes created Fri Sep 26 20:09:58 GMT 2025