if_ex_cardbus.c revision 1.43
1 /* $NetBSD: if_ex_cardbus.c,v 1.43 2008/04/14 20:03:13 spz Exp $ */ 2 3 /* 4 * CardBus specific routines for 3Com 3C575-family CardBus ethernet adapter 5 * 6 * Copyright (c) 1998 and 1999 7 * HAYAKAWA Koichi. All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the author. 20 * 4. Neither the name of the author nor the names of any co-contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY HAYAKAWA KOICHI ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL TAKESHI OHASHI OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: if_ex_cardbus.c,v 1.43 2008/04/14 20:03:13 spz Exp $"); 41 42 /* #define EX_DEBUG 4 */ /* define to report information for debugging */ 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/mbuf.h> 47 #include <sys/socket.h> 48 #include <sys/ioctl.h> 49 #include <sys/errno.h> 50 #include <sys/syslog.h> 51 #include <sys/select.h> 52 #include <sys/device.h> 53 54 #include <net/if.h> 55 #include <net/if_dl.h> 56 #include <net/if_ether.h> 57 #include <net/if_media.h> 58 59 #include <sys/cpu.h> 60 #include <sys/bus.h> 61 62 #include <dev/cardbus/cardbusvar.h> 63 #include <dev/pci/pcidevs.h> 64 65 #include <dev/mii/miivar.h> 66 67 #include <dev/ic/elink3var.h> 68 #include <dev/ic/elink3reg.h> 69 #include <dev/ic/elinkxlreg.h> 70 #include <dev/ic/elinkxlvar.h> 71 72 #if defined DEBUG && !defined EX_DEBUG 73 #define EX_DEBUG 74 #endif 75 76 #if defined EX_DEBUG 77 #define DPRINTF(a) printf a 78 #else 79 #define DPRINTF(a) 80 #endif 81 82 #define CARDBUS_3C575BTX_FUNCSTAT_PCIREG CARDBUS_BASE2_REG /* means 0x18 */ 83 #define EX_CB_INTR 4 /* intr acknowledge reg. CardBus only */ 84 #define EX_CB_INTR_ACK 0x8000 /* intr acknowledge bit */ 85 86 int ex_cardbus_match(device_t, cfdata_t, void *); 87 void ex_cardbus_attach(device_t, device_t,void *); 88 int ex_cardbus_detach(device_t, int); 89 void ex_cardbus_intr_ack(struct ex_softc *); 90 91 int ex_cardbus_enable(struct ex_softc *); 92 void ex_cardbus_disable(struct ex_softc *); 93 94 struct ex_cardbus_softc { 95 struct ex_softc sc_softc; 96 97 cardbus_devfunc_t sc_ct; 98 int sc_intrline; 99 u_int8_t sc_cardbus_flags; 100 #define EX_REATTACH 0x01 101 #define EX_ABSENT 0x02 102 u_int8_t sc_cardtype; 103 #define EX_CB_BOOMERANG 1 104 #define EX_CB_CYCLONE 2 105 106 /* CardBus function status space. 575B requests it. */ 107 bus_space_tag_t sc_funct; 108 bus_space_handle_t sc_funch; 109 bus_size_t sc_funcsize; 110 111 bus_size_t sc_mapsize; /* the size of mapped bus space region */ 112 113 cardbustag_t sc_tag; 114 115 int sc_csr; /* CSR bits */ 116 int sc_bar_reg; /* which BAR to use */ 117 pcireg_t sc_bar_val; /* value of the BAR */ 118 int sc_bar_reg1; /* which BAR to use */ 119 pcireg_t sc_bar_val1; /* value of the BAR */ 120 121 }; 122 123 CFATTACH_DECL_NEW(ex_cardbus, sizeof(struct ex_cardbus_softc), 124 ex_cardbus_match, ex_cardbus_attach, ex_cardbus_detach, ex_activate); 125 126 const struct ex_cardbus_product { 127 u_int32_t ecp_prodid; /* CardBus product ID */ 128 int ecp_flags; /* initial softc flags */ 129 pcireg_t ecp_csr; /* PCI CSR flags */ 130 int ecp_cardtype; /* card type */ 131 const char *ecp_name; /* device name */ 132 } ex_cardbus_products[] = { 133 { PCI_PRODUCT_3COM_3C575TX, 134 EX_CONF_MII | EX_CONF_EEPROM_OFF | EX_CONF_EEPROM_8BIT, 135 CARDBUS_COMMAND_IO_ENABLE | CARDBUS_COMMAND_MASTER_ENABLE, 136 EX_CB_BOOMERANG, 137 "3c575-TX Ethernet" }, 138 139 { PCI_PRODUCT_3COM_3C575BTX, 140 EX_CONF_90XB|EX_CONF_MII|EX_CONF_INV_LED_POLARITY | 141 EX_CONF_EEPROM_OFF | EX_CONF_EEPROM_8BIT, 142 CARDBUS_COMMAND_IO_ENABLE | CARDBUS_COMMAND_MEM_ENABLE | 143 CARDBUS_COMMAND_MASTER_ENABLE, 144 EX_CB_CYCLONE, 145 "3c575B-TX Ethernet" }, 146 147 { PCI_PRODUCT_3COM_3C575CTX, 148 EX_CONF_90XB | EX_CONF_PHY_POWER | EX_CONF_EEPROM_OFF | 149 EX_CONF_EEPROM_8BIT, 150 CARDBUS_COMMAND_IO_ENABLE | CARDBUS_COMMAND_MEM_ENABLE | 151 CARDBUS_COMMAND_MASTER_ENABLE, 152 EX_CB_CYCLONE, 153 "3c575CT Ethernet" }, 154 155 { PCI_PRODUCT_3COM_3C656_E, 156 EX_CONF_90XB | EX_CONF_PHY_POWER | EX_CONF_EEPROM_OFF | 157 EX_CONF_EEPROM_8BIT | EX_CONF_INV_LED_POLARITY, 158 CARDBUS_COMMAND_IO_ENABLE | CARDBUS_COMMAND_MEM_ENABLE | 159 CARDBUS_COMMAND_MASTER_ENABLE, 160 EX_CB_CYCLONE, 161 "3c656-TX Ethernet" }, 162 163 { PCI_PRODUCT_3COM_3C656B_E, 164 EX_CONF_90XB | EX_CONF_PHY_POWER | EX_CONF_EEPROM_OFF | 165 EX_CONF_EEPROM_8BIT | EX_CONF_INV_LED_POLARITY, 166 CARDBUS_COMMAND_IO_ENABLE | CARDBUS_COMMAND_MEM_ENABLE | 167 CARDBUS_COMMAND_MASTER_ENABLE, 168 EX_CB_CYCLONE, 169 "3c656B-TX Ethernet" }, 170 171 { PCI_PRODUCT_3COM_3C656C_E, 172 EX_CONF_90XB | EX_CONF_PHY_POWER | EX_CONF_EEPROM_OFF | 173 EX_CONF_EEPROM_8BIT, 174 CARDBUS_COMMAND_IO_ENABLE | CARDBUS_COMMAND_MEM_ENABLE | 175 CARDBUS_COMMAND_MASTER_ENABLE, 176 EX_CB_CYCLONE, 177 "3c656C-TX Ethernet" }, 178 179 { 0, 180 0, 181 0, 182 0, 183 NULL }, 184 }; 185 186 187 void ex_cardbus_setup(struct ex_cardbus_softc *); 188 189 const struct ex_cardbus_product *ex_cardbus_lookup 190 (const struct cardbus_attach_args *); 191 192 const struct ex_cardbus_product * 193 ex_cardbus_lookup(ca) 194 const struct cardbus_attach_args *ca; 195 { 196 const struct ex_cardbus_product *ecp; 197 198 if (CARDBUS_VENDOR(ca->ca_id) != PCI_VENDOR_3COM) 199 return (NULL); 200 201 for (ecp = ex_cardbus_products; ecp->ecp_name != NULL; ecp++) 202 if (CARDBUS_PRODUCT(ca->ca_id) == ecp->ecp_prodid) 203 return (ecp); 204 return (NULL); 205 } 206 207 int 208 ex_cardbus_match(device_t parent, cfdata_t cf, void *aux) 209 { 210 struct cardbus_attach_args *ca = aux; 211 212 if (ex_cardbus_lookup(ca) != NULL) 213 return (1); 214 215 return (0); 216 } 217 218 void 219 ex_cardbus_attach(device_t parent, device_t self, void *aux) 220 { 221 struct ex_cardbus_softc *csc = device_private(self); 222 struct ex_softc *sc = &csc->sc_softc; 223 struct cardbus_attach_args *ca = aux; 224 cardbus_devfunc_t ct = ca->ca_ct; 225 #if rbus 226 #else 227 cardbus_chipset_tag_t cc = ct->ct_cc; 228 #endif 229 const struct ex_cardbus_product *ecp; 230 bus_addr_t adr, adr1; 231 232 sc->sc_dev = self; 233 234 sc->ex_bustype = EX_BUS_CARDBUS; 235 sc->sc_dmat = ca->ca_dmat; 236 csc->sc_ct = ca->ca_ct; 237 csc->sc_intrline = ca->ca_intrline; 238 csc->sc_tag = ca->ca_tag; 239 240 ecp = ex_cardbus_lookup(ca); 241 if (ecp == NULL) { 242 printf("\n"); 243 panic("ex_cardbus_attach: impossible"); 244 } 245 246 aprint_normal(": 3Com %s\n", ecp->ecp_name); 247 248 sc->ex_conf = ecp->ecp_flags; 249 csc->sc_cardtype = ecp->ecp_cardtype; 250 csc->sc_csr = ecp->ecp_csr; 251 252 if (Cardbus_mapreg_map(ct, CARDBUS_BASE0_REG, CARDBUS_MAPREG_TYPE_IO, 0, 253 &sc->sc_iot, &sc->sc_ioh, &adr, &csc->sc_mapsize) == 0) { 254 #if rbus 255 #else 256 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr + csc->sc_mapsize); 257 #endif 258 csc->sc_bar_reg = CARDBUS_BASE0_REG; 259 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 260 261 if (csc->sc_cardtype == EX_CB_CYCLONE) { 262 /* Map CardBus function status window. */ 263 if (Cardbus_mapreg_map(ct, 264 CARDBUS_3C575BTX_FUNCSTAT_PCIREG, 265 CARDBUS_MAPREG_TYPE_MEM, 0, 266 &csc->sc_funct, &csc->sc_funch, 267 &adr1, &csc->sc_funcsize) == 0) { 268 269 csc->sc_bar_reg1 = 270 CARDBUS_3C575BTX_FUNCSTAT_PCIREG; 271 csc->sc_bar_val1 = 272 adr1 | CARDBUS_MAPREG_TYPE_MEM; 273 274 } else { 275 aprint_error_dev(self, "unable to map function " 276 "status window\n"); 277 return; 278 } 279 280 /* Setup interrupt acknowledge hook */ 281 sc->intr_ack = ex_cardbus_intr_ack; 282 } 283 } 284 else { 285 aprint_naive(": can't map i/o space\n"); 286 return; 287 } 288 289 /* Power management hooks. */ 290 sc->enable = ex_cardbus_enable; 291 sc->disable = ex_cardbus_disable; 292 293 /* 294 * Handle power management nonsense and 295 * initialize the configuration registers. 296 */ 297 ex_cardbus_setup(csc); 298 299 ex_config(sc); 300 301 if (csc->sc_cardtype == EX_CB_CYCLONE) 302 bus_space_write_4(csc->sc_funct, csc->sc_funch, 303 EX_CB_INTR, EX_CB_INTR_ACK); 304 305 Cardbus_function_disable(csc->sc_ct); 306 } 307 308 void 309 ex_cardbus_intr_ack(sc) 310 struct ex_softc *sc; 311 { 312 struct ex_cardbus_softc *csc = (struct ex_cardbus_softc *)sc; 313 314 bus_space_write_4(csc->sc_funct, csc->sc_funch, EX_CB_INTR, 315 EX_CB_INTR_ACK); 316 } 317 318 int 319 ex_cardbus_detach(device_t self, int arg) 320 { 321 struct ex_cardbus_softc *csc = device_private(self); 322 struct ex_softc *sc = &csc->sc_softc; 323 struct cardbus_devfunc *ct = csc->sc_ct; 324 int rv; 325 326 #if defined(DIAGNOSTIC) 327 if (ct == NULL) { 328 panic("%s: data structure lacks", device_xname(self)); 329 } 330 #endif 331 332 rv = ex_detach(sc); 333 if (rv == 0) { 334 /* 335 * Unhook the interrupt handler. 336 */ 337 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, sc->sc_ih); 338 339 if (csc->sc_cardtype == EX_CB_CYCLONE) { 340 Cardbus_mapreg_unmap(ct, 341 CARDBUS_3C575BTX_FUNCSTAT_PCIREG, 342 csc->sc_funct, csc->sc_funch, csc->sc_funcsize); 343 } 344 345 Cardbus_mapreg_unmap(ct, CARDBUS_BASE0_REG, sc->sc_iot, 346 sc->sc_ioh, csc->sc_mapsize); 347 } 348 return (rv); 349 } 350 351 int 352 ex_cardbus_enable(sc) 353 struct ex_softc *sc; 354 { 355 struct ex_cardbus_softc *csc = (struct ex_cardbus_softc *)sc; 356 cardbus_function_tag_t cf = csc->sc_ct->ct_cf; 357 cardbus_chipset_tag_t cc = csc->sc_ct->ct_cc; 358 359 Cardbus_function_enable(csc->sc_ct); 360 ex_cardbus_setup(csc); 361 362 sc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, 363 IPL_NET, ex_intr, sc); 364 if (NULL == sc->sc_ih) { 365 aprint_error_dev(sc->sc_dev, "couldn't establish interrupt\n"); 366 return (1); 367 } 368 aprint_normal_dev(sc->sc_dev, "interrupting at %d\n", csc->sc_intrline); 369 370 return (0); 371 } 372 373 void 374 ex_cardbus_disable(sc) 375 struct ex_softc *sc; 376 { 377 struct ex_cardbus_softc *csc = (struct ex_cardbus_softc *)sc; 378 cardbus_function_tag_t cf = csc->sc_ct->ct_cf; 379 cardbus_chipset_tag_t cc = csc->sc_ct->ct_cc; 380 381 cardbus_intr_disestablish(cc, cf, sc->sc_ih); 382 sc->sc_ih = NULL; 383 384 Cardbus_function_disable(csc->sc_ct); 385 386 } 387 388 void 389 ex_cardbus_setup(csc) 390 struct ex_cardbus_softc *csc; 391 { 392 cardbus_devfunc_t ct = csc->sc_ct; 393 cardbus_chipset_tag_t cc = ct->ct_cc; 394 cardbus_function_tag_t cf = ct->ct_cf; 395 cardbusreg_t reg; 396 397 (void)cardbus_set_powerstate(ct, csc->sc_tag, PCI_PWR_D0); 398 399 /* Program the BAR */ 400 cardbus_conf_write(cc, cf, csc->sc_tag, 401 csc->sc_bar_reg, csc->sc_bar_val); 402 /* Make sure the right access type is on the CardBus bridge. */ 403 (ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_IO_ENABLE); 404 if (csc->sc_cardtype == EX_CB_CYCLONE) { 405 /* Program the BAR */ 406 cardbus_conf_write(cc, cf, csc->sc_tag, 407 csc->sc_bar_reg1, csc->sc_bar_val1); 408 /* 409 * Make sure CardBus brigde can access memory space. Usually 410 * memory access is enabled by BIOS, but some BIOSes do not 411 * enable it. 412 */ 413 (ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_MEM_ENABLE); 414 } 415 (ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 416 417 /* Enable the appropriate bits in the CARDBUS CSR. */ 418 reg = cardbus_conf_read(cc, cf, csc->sc_tag, 419 CARDBUS_COMMAND_STATUS_REG); 420 reg |= csc->sc_csr; 421 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG, 422 reg); 423 424 /* 425 * set latency timer 426 */ 427 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG); 428 if (CARDBUS_LATTIMER(reg) < 0x20) { 429 /* at least the value of latency timer should 0x20. */ 430 DPRINTF(("if_ex_cardbus: lattimer 0x%x -> 0x20\n", 431 CARDBUS_LATTIMER(reg))); 432 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT); 433 reg |= (0x20 << CARDBUS_LATTIMER_SHIFT); 434 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg); 435 } 436 } 437
Indexes created Sun Sep 28 16:09:52 GMT 2025