if_fxp_cardbus.c revision 1.49
1 /* $NetBSD: if_fxp_cardbus.c,v 1.49 2011/09/05 04:36:50 msaitoh Exp $ */ 2 3 /* 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Johan Danielsson. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * CardBus front-end for the Intel i82557 family of Ethernet chips. 34 */ 35 36 #include <sys/cdefs.h> 37 __KERNEL_RCSID(0, "$NetBSD: if_fxp_cardbus.c,v 1.49 2011/09/05 04:36:50 msaitoh Exp $"); 38 39 #include "opt_inet.h" 40 #include "rnd.h" 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/mbuf.h> 45 #include <sys/malloc.h> 46 #include <sys/kernel.h> 47 #include <sys/socket.h> 48 #include <sys/ioctl.h> 49 #include <sys/errno.h> 50 #include <sys/device.h> 51 52 #if NRND > 0 53 #include <sys/rnd.h> 54 #endif 55 56 #include <net/if.h> 57 #include <net/if_dl.h> 58 #include <net/if_media.h> 59 #include <net/if_ether.h> 60 61 #include <machine/endian.h> 62 63 #ifdef INET 64 #include <netinet/in.h> 65 #include <netinet/if_inarp.h> 66 #endif 67 68 69 #include <sys/bus.h> 70 #include <sys/intr.h> 71 72 #include <dev/mii/miivar.h> 73 74 #include <dev/ic/i82557reg.h> 75 #include <dev/ic/i82557var.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 #include <dev/cardbus/cardbusvar.h> 82 #include <dev/pci/pcidevs.h> 83 84 static int fxp_cardbus_match(device_t, cfdata_t, void *); 85 static void fxp_cardbus_attach(device_t, device_t, void *); 86 static int fxp_cardbus_detach(device_t, int); 87 static void fxp_cardbus_setup(struct fxp_softc *); 88 static int fxp_cardbus_enable(struct fxp_softc *); 89 static void fxp_cardbus_disable(struct fxp_softc *); 90 91 struct fxp_cardbus_softc { 92 struct fxp_softc sc; 93 cardbus_devfunc_t ct; 94 pcitag_t tag; 95 pcireg_t base0_reg; 96 pcireg_t base1_reg; 97 }; 98 99 CFATTACH_DECL3_NEW(fxp_cardbus, sizeof(struct fxp_cardbus_softc), 100 fxp_cardbus_match, fxp_cardbus_attach, fxp_cardbus_detach, fxp_activate, 101 NULL, null_childdetached, DVF_DETACH_SHUTDOWN); 102 103 #ifdef CBB_DEBUG 104 #define DPRINTF(X) printf X 105 #else 106 #define DPRINTF(X) 107 #endif 108 109 static int 110 fxp_cardbus_match(device_t parent, cfdata_t match, 111 void *aux) 112 { 113 struct cardbus_attach_args *ca = aux; 114 115 if (PCI_VENDOR(ca->ca_id) == PCI_VENDOR_INTEL && 116 PCI_PRODUCT(ca->ca_id) == PCI_PRODUCT_INTEL_8255X) 117 return (1); 118 119 return (0); 120 } 121 122 static void 123 fxp_cardbus_attach(device_t parent, device_t self, 124 void *aux) 125 { 126 struct fxp_cardbus_softc *csc = device_private(self); 127 struct fxp_softc *sc = &csc->sc; 128 struct cardbus_attach_args *ca = aux; 129 bus_space_tag_t iot, memt; 130 bus_space_handle_t ioh, memh; 131 132 bus_addr_t adr; 133 134 sc->sc_dev = self; 135 csc->ct = ca->ca_ct; 136 csc->tag = ca->ca_tag; 137 138 /* 139 * Map control/status registers. 140 */ 141 if (Cardbus_mapreg_map(csc->ct, PCI_BAR1, 142 PCI_MAPREG_TYPE_IO, 0, &iot, &ioh, &adr, &sc->sc_size) == 0) { 143 csc->base1_reg = adr | 1; 144 sc->sc_st = iot; 145 sc->sc_sh = ioh; 146 } else if (Cardbus_mapreg_map(csc->ct, PCI_BAR0, 147 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 148 0, &memt, &memh, &adr, &sc->sc_size) == 0) { 149 csc->base0_reg = adr; 150 sc->sc_st = memt; 151 sc->sc_sh = memh; 152 } else 153 panic("%s: failed to allocate mem and io space", __func__); 154 155 if (ca->ca_cis.cis1_info[0] && ca->ca_cis.cis1_info[1]) 156 printf(": %s %s\n", ca->ca_cis.cis1_info[0], 157 ca->ca_cis.cis1_info[1]); 158 else 159 printf("\n"); 160 161 sc->sc_rev = PCI_REVISION(ca->ca_class); 162 if (sc->sc_rev >= FXP_REV_82558_A4) 163 sc->sc_flags |= FXPF_FC|FXPF_EXT_TXCB; 164 if (sc->sc_rev >= FXP_REV_82559_A0) 165 sc->sc_flags |= FXPF_82559_RXCSUM; 166 if (sc->sc_rev >= FXP_REV_82550) { 167 sc->sc_flags &= ~FXPF_82559_RXCSUM; 168 sc->sc_flags |= FXPF_EXT_RFA; 169 } 170 171 sc->sc_dmat = ca->ca_dmat; 172 sc->sc_enable = fxp_cardbus_enable; 173 sc->sc_disable = fxp_cardbus_disable; 174 sc->sc_enabled = 0; 175 176 fxp_enable(sc); 177 fxp_attach(sc); 178 fxp_disable(sc); 179 180 if (pmf_device_register(self, NULL, NULL)) 181 pmf_class_network_register(self, &sc->sc_ethercom.ec_if); 182 else 183 aprint_error_dev(self, "couldn't establish power handler\n"); 184 } 185 186 static void 187 fxp_cardbus_setup(struct fxp_softc * sc) 188 { 189 struct fxp_cardbus_softc *csc = (struct fxp_cardbus_softc *)sc; 190 pcireg_t command; 191 192 pcitag_t tag = csc->tag; 193 194 command = Cardbus_conf_read(csc->ct, tag, PCI_COMMAND_STATUS_REG); 195 if (csc->base0_reg) { 196 Cardbus_conf_write(csc->ct, tag, 197 PCI_BAR0, csc->base0_reg); 198 command |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE; 199 } else if (csc->base1_reg) { 200 Cardbus_conf_write(csc->ct, tag, 201 PCI_BAR1, csc->base1_reg); 202 command |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE; 203 } 204 205 /* enable the card */ 206 Cardbus_conf_write(csc->ct, tag, PCI_COMMAND_STATUS_REG, command); 207 } 208 209 static int 210 fxp_cardbus_enable(struct fxp_softc * sc) 211 { 212 struct fxp_cardbus_softc *csc = (struct fxp_cardbus_softc *)sc; 213 cardbus_devfunc_t ct = csc->ct; 214 215 Cardbus_function_enable(csc->ct); 216 217 fxp_cardbus_setup(sc); 218 219 /* Map and establish the interrupt. */ 220 221 sc->sc_ih = Cardbus_intr_establish(ct, IPL_NET, fxp_intr, sc); 222 if (NULL == sc->sc_ih) { 223 aprint_error_dev(sc->sc_dev, "couldn't establish interrupt\n"); 224 return 1; 225 } 226 227 return 0; 228 } 229 230 static void 231 fxp_cardbus_disable(struct fxp_softc * sc) 232 { 233 struct fxp_cardbus_softc *csc = (struct fxp_cardbus_softc *)sc; 234 cardbus_devfunc_t ct = csc->ct; 235 236 /* Remove interrupt handler. */ 237 Cardbus_intr_disestablish(ct, sc->sc_ih); 238 239 Cardbus_function_disable(csc->ct); 240 } 241 242 static int 243 fxp_cardbus_detach(device_t self, int flags) 244 { 245 struct fxp_cardbus_softc *csc = device_private(self); 246 struct fxp_softc *sc = &csc->sc; 247 struct cardbus_devfunc *ct = csc->ct; 248 int rv, reg; 249 250 #ifdef DIAGNOSTIC 251 if (ct == NULL) 252 panic("%s: data structure lacks", device_xname(self)); 253 #endif 254 255 if ((rv = fxp_detach(sc, flags)) != 0) 256 return rv; 257 /* 258 * Unhook the interrupt handler. 259 */ 260 Cardbus_intr_disestablish(ct, sc->sc_ih); 261 262 /* 263 * release bus space and close window 264 */ 265 if (csc->base0_reg) 266 reg = PCI_BAR0; 267 else 268 reg = PCI_BAR1; 269 Cardbus_mapreg_unmap(ct, reg, sc->sc_st, sc->sc_sh, sc->sc_size); 270 return 0; 271 } 272
Indexes created Tue Sep 30 11:09:46 GMT 2025