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if_ral_cardbus.c revision 1.2
      1 /*	$NetBSD: if_ral_cardbus.c,v 1.2 2005/07/04 17:50:09 drochner Exp $ */
      2 /*	$OpenBSD: if_ral_cardbus.c,v 1.5 2005/05/16 01:36:25 brad Exp $  */
      3 
      4 /*-
      5  * Copyright (c) 2005
      6  *	Damien Bergamini <damien.bergamini (at) free.fr>
      7  *
      8  * Permission to use, copy, modify, and distribute this software for any
      9  * purpose with or without fee is hereby granted, provided that the above
     10  * copyright notice and this permission notice appear in all copies.
     11  *
     12  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     13  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     14  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     15  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     16  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     17  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     18  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     19  */
     20 
     21 /*
     22  * CardBus front-end for the Ralink RT2500 driver.
     23  */
     24 
     25 #include <sys/cdefs.h>
     26 __KERNEL_RCSID(0, "$NetBSD: if_ral_cardbus.c,v 1.2 2005/07/04 17:50:09 drochner Exp $");
     27 
     28 #include "bpfilter.h"
     29 
     30 #include <sys/param.h>
     31 #include <sys/sockio.h>
     32 #include <sys/mbuf.h>
     33 #include <sys/kernel.h>
     34 #include <sys/socket.h>
     35 #include <sys/systm.h>
     36 #include <sys/malloc.h>
     37 #include <sys/device.h>
     38 
     39 #include <machine/bus.h>
     40 #include <machine/intr.h>
     41 
     42 #include <net/if.h>
     43 #include <net/if_dl.h>
     44 #include <net/if_ether.h>
     45 #include <net/if_media.h>
     46 
     47 #include <netinet/in.h>
     48 
     49 #include <net80211/ieee80211_var.h>
     50 #include <net80211/ieee80211_rssadapt.h>
     51 #include <net80211/ieee80211_radiotap.h>
     52 
     53 #include <dev/ic/ralvar.h>
     54 
     55 #include <dev/pci/pcireg.h>
     56 #include <dev/pci/pcivar.h>
     57 #include <dev/pci/pcidevs.h>
     58 
     59 #include <dev/cardbus/cardbusvar.h>
     60 
     61 struct ral_cardbus_softc {
     62 	struct ral_softc	sc_sc;
     63 
     64 	/* cardbus specific goo */
     65 	cardbus_devfunc_t	sc_ct;
     66 	cardbustag_t		sc_tag;
     67 	void			*sc_ih;
     68 	bus_size_t		sc_mapsize;
     69 	pcireg_t		sc_bar_val;
     70 	int			sc_intrline;
     71 };
     72 
     73 int	ral_cardbus_match(struct device *, struct cfdata *, void *);
     74 void	ral_cardbus_attach(struct device *, struct device *, void *);
     75 int	ral_cardbus_detach(struct device *, int);
     76 
     77 CFATTACH_DECL(ral_cardbus, sizeof (struct ral_cardbus_softc),
     78     ral_cardbus_match, ral_cardbus_attach, ral_cardbus_detach, NULL);
     79 
     80 int	ral_cardbus_enable(struct ral_softc *);
     81 void	ral_cardbus_disable(struct ral_softc *);
     82 void	ral_cardbus_power(struct ral_softc *, int);
     83 void	ral_cardbus_setup(struct ral_cardbus_softc *);
     84 
     85 int
     86 ral_cardbus_match(struct device *parent, struct cfdata *match, void *aux)
     87 {
     88 	struct cardbus_attach_args *ca = aux;
     89 
     90 	if (CARDBUS_VENDOR(ca->ca_id) == PCI_VENDOR_RALINK &&
     91 	    CARDBUS_PRODUCT(ca->ca_id) == PCI_PRODUCT_RALINK_RT2560)
     92 		return 1;
     93 
     94 	return 0;
     95 }
     96 
     97 void
     98 ral_cardbus_attach(struct device *parent, struct device *self, void *aux)
     99 {
    100 	struct ral_cardbus_softc *csc = (struct ral_cardbus_softc *)self;
    101 	struct ral_softc *sc = &csc->sc_sc;
    102 	struct cardbus_attach_args *ca = aux;
    103 	cardbus_devfunc_t ct = ca->ca_ct;
    104 	bus_addr_t base;
    105 	int error;
    106 
    107 	sc->sc_dmat = ca->ca_dmat;
    108 	csc->sc_ct = ct;
    109 	csc->sc_tag = ca->ca_tag;
    110 	csc->sc_intrline = ca->ca_intrline;
    111 
    112 	/* power management hooks */
    113 	sc->sc_enable = ral_cardbus_enable;
    114 	sc->sc_disable = ral_cardbus_disable;
    115 	sc->sc_power = ral_cardbus_power;
    116 
    117 	/* map control/status registers */
    118 	error = Cardbus_mapreg_map(ct, CARDBUS_BASE0_REG,
    119 	    CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &base,
    120 	    &csc->sc_mapsize);
    121 	if (error != 0) {
    122 		printf(": could not map memory space\n");
    123 		return;
    124 	}
    125 
    126 #if rbus
    127 #else
    128 	(*cf->cardbus_mem_open)(cc, 0, base, base + csc->sc_mapsize);
    129 #endif
    130 
    131 	csc->sc_bar_val = base | CARDBUS_MAPREG_TYPE_MEM;
    132 
    133 	/* set up the PCI configuration registers */
    134 	ral_cardbus_setup(csc);
    135 
    136 	printf(": irq %d\n", csc->sc_intrline);
    137 
    138 	ral_attach(sc);
    139 
    140 	Cardbus_function_disable(ct);
    141 }
    142 
    143 int
    144 ral_cardbus_detach(struct device *self, int flags)
    145 {
    146 	struct ral_cardbus_softc *csc = (struct ral_cardbus_softc *)self;
    147 	struct ral_softc *sc = &csc->sc_sc;
    148 	cardbus_devfunc_t ct = csc->sc_ct;
    149 	cardbus_chipset_tag_t cc = ct->ct_cc;
    150 	cardbus_function_tag_t cf = ct->ct_cf;
    151 	int error;
    152 
    153 	error = ral_detach(sc);
    154 	if (error != 0)
    155 		return error;
    156 
    157 	/* unhook the interrupt handler */
    158 	if (csc->sc_ih != NULL) {
    159 		cardbus_intr_disestablish(cc, cf, csc->sc_ih);
    160 		csc->sc_ih = NULL;
    161 	}
    162 
    163 	/* release bus space and close window */
    164 	Cardbus_mapreg_unmap(ct, CARDBUS_BASE0_REG, sc->sc_st, sc->sc_sh,
    165 	    csc->sc_mapsize);
    166 
    167 	return 0;
    168 }
    169 
    170 int
    171 ral_cardbus_enable(struct ral_softc *sc)
    172 {
    173 	struct ral_cardbus_softc *csc = (struct ral_cardbus_softc *)sc;
    174 	cardbus_devfunc_t ct = csc->sc_ct;
    175 	cardbus_chipset_tag_t cc = ct->ct_cc;
    176 	cardbus_function_tag_t cf = ct->ct_cf;
    177 
    178 	/* power on the socket */
    179 	Cardbus_function_enable(ct);
    180 
    181 	/* setup the PCI configuration registers */
    182 	ral_cardbus_setup(csc);
    183 
    184 	/* map and establish the interrupt handler */
    185 	csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
    186 	    ral_intr, sc);
    187 	if (csc->sc_ih == NULL) {
    188 		printf("%s: could not establish interrupt at %d\n",
    189 		    sc->sc_dev.dv_xname, csc->sc_intrline);
    190 		Cardbus_function_disable(ct);
    191 		return 1;
    192 	}
    193 
    194 	return 0;
    195 }
    196 
    197 void
    198 ral_cardbus_disable(struct ral_softc *sc)
    199 {
    200 	struct ral_cardbus_softc *csc = (struct ral_cardbus_softc *)sc;
    201 	cardbus_devfunc_t ct = csc->sc_ct;
    202 	cardbus_chipset_tag_t cc = ct->ct_cc;
    203 	cardbus_function_tag_t cf = ct->ct_cf;
    204 
    205 	/* unhook the interrupt handler */
    206 	cardbus_intr_disestablish(cc, cf, csc->sc_ih);
    207 	csc->sc_ih = NULL;
    208 
    209 	/* power down the socket */
    210 	Cardbus_function_disable(ct);
    211 }
    212 
    213 void
    214 ral_cardbus_power(struct ral_softc *sc, int why)
    215 {
    216 	struct ral_cardbus_softc *csc = (struct ral_cardbus_softc *)sc;
    217 
    218 	if (why == PWR_RESUME) {
    219 		/* kick the PCI configuration registers */
    220 		ral_cardbus_setup(csc);
    221 	}
    222 }
    223 
    224 void
    225 ral_cardbus_setup(struct ral_cardbus_softc *csc)
    226 {
    227 	cardbus_devfunc_t ct = csc->sc_ct;
    228 	cardbus_chipset_tag_t cc = ct->ct_cc;
    229 	cardbus_function_tag_t cf = ct->ct_cf;
    230 	pcireg_t reg;
    231 
    232 	/* program the BAR */
    233 	cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BASE0_REG,
    234 	    csc->sc_bar_val);
    235 
    236 	/* make sure the right access type is on the cardbus bridge */
    237 	(*cf->cardbus_ctrl)(cc, CARDBUS_MEM_ENABLE);
    238 	(*cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
    239 
    240 	/* enable the appropriate bits in the PCI CSR */
    241 	reg = cardbus_conf_read(cc, cf, csc->sc_tag,
    242 	    CARDBUS_COMMAND_STATUS_REG);
    243 	reg |= CARDBUS_COMMAND_MASTER_ENABLE | CARDBUS_COMMAND_MEM_ENABLE;
    244 	cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG,
    245 	    reg);
    246 }
    247