if_re_cardbus.c revision 1.11
1 /* $NetBSD: if_re_cardbus.c,v 1.11 2006/11/16 01:32:48 christos Exp $ */ 2 3 /* 4 * Copyright (c) 2004 Jonathan Stone 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * if_re_cardbus.c: 32 * Cardbus specific routines for Realtek 8169 ethernet adapter. 33 * Tested for : 34 * Netgear GA-511 (8169S) 35 * Buffalo LPC-CB-CLGT 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_re_cardbus.c,v 1.11 2006/11/16 01:32:48 christos Exp $"); 40 41 #include "opt_inet.h" 42 #include "bpfilter.h" 43 #include "rnd.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/callout.h> 48 #include <sys/device.h> 49 #include <sys/sockio.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 55 #include <net/if.h> 56 #include <net/if_arp.h> 57 #include <net/if_ether.h> 58 #include <net/if_dl.h> 59 #include <net/if_media.h> 60 #ifdef INET 61 #include <netinet/in.h> 62 #include <netinet/if_inarp.h> 63 #endif 64 65 #if NBPFILTER > 0 66 #include <net/bpf.h> 67 #endif 68 #if NRND > 0 69 #include <sys/rnd.h> 70 #endif 71 72 #include <machine/bus.h> 73 74 #include <dev/pci/pcireg.h> 75 #include <dev/pci/pcivar.h> 76 #include <dev/pci/pcidevs.h> 77 78 #include <dev/cardbus/cardbusvar.h> 79 #include <dev/pci/pcidevs.h> 80 81 #include <dev/mii/mii.h> 82 #include <dev/mii/miivar.h> 83 84 /* 85 * Default to using PIO access for this driver. On SMP systems, 86 * there appear to be problems with memory mapped mode: it looks like 87 * doing too many memory mapped access back to back in rapid succession 88 * can hang the bus. I'm inclined to blame this on crummy design/construction 89 * on the part of Realtek. Memory mapped mode does appear to work on 90 * uniprocessor systems though. 91 */ 92 #define RTK_USEIOSPACE 93 94 #include <dev/ic/rtl81x9reg.h> 95 #include <dev/ic/rtl81x9var.h> 96 97 #include <dev/ic/rtl8169var.h> 98 99 /* 100 * Various supported device vendors/types and their names. 101 */ 102 static const struct rtk_type re_cardbus_devs[] = { 103 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, 104 RTK_8169, "Realtek 10/100/1000baseT" }, 105 { 0, 0, 0, NULL } 106 }; 107 108 static int re_cardbus_match(struct device *, struct cfdata *, void *); 109 static void re_cardbus_attach(struct device *, struct device *, void *); 110 static int re_cardbus_detach(struct device *, int); 111 112 struct re_cardbus_softc { 113 struct rtk_softc sc_rtk; /* real rtk softc */ 114 115 /* CardBus-specific goo. */ 116 void *sc_ih; 117 cardbus_devfunc_t sc_ct; 118 cardbustag_t sc_tag; 119 int sc_csr; 120 int sc_cben; 121 int sc_bar_reg; 122 pcireg_t sc_bar_val; 123 bus_size_t sc_mapsize; 124 int sc_intrline; 125 }; 126 127 CFATTACH_DECL(re_cardbus, sizeof(struct re_cardbus_softc), 128 re_cardbus_match, re_cardbus_attach, re_cardbus_detach, re_activate); 129 130 const struct rtk_type *re_cardbus_lookup(const struct cardbus_attach_args *); 131 132 void re_cardbus_setup(struct re_cardbus_softc *); 133 134 int re_cardbus_enable(struct rtk_softc *); 135 void re_cardbus_disable(struct rtk_softc *); 136 void re_cardbus_power(struct rtk_softc *, int); 137 138 const struct rtk_type * 139 re_cardbus_lookup(const struct cardbus_attach_args *ca) 140 { 141 const struct rtk_type *t; 142 143 for (t = re_cardbus_devs; t->rtk_name != NULL; t++) { 144 if (CARDBUS_VENDOR(ca->ca_id) == t->rtk_vid && 145 CARDBUS_PRODUCT(ca->ca_id) == t->rtk_did) { 146 return t; 147 } 148 } 149 return NULL; 150 } 151 152 int 153 re_cardbus_match(struct device *parent, 154 struct cfdata *match, void *aux) 155 { 156 struct cardbus_attach_args *ca = aux; 157 158 if (re_cardbus_lookup(ca) != NULL) 159 return 1; 160 161 return 0; 162 } 163 164 165 void 166 re_cardbus_attach(struct device *parent, struct device *self, 167 void *aux) 168 { 169 struct re_cardbus_softc *csc = device_private(self); 170 struct rtk_softc *sc = &csc->sc_rtk; 171 struct cardbus_attach_args *ca = aux; 172 cardbus_devfunc_t ct = ca->ca_ct; 173 const struct rtk_type *t; 174 bus_addr_t adr; 175 176 sc->sc_dmat = ca->ca_dmat; 177 csc->sc_ct = ct; 178 csc->sc_tag = ca->ca_tag; 179 csc->sc_intrline = ca->ca_intrline; 180 181 t = re_cardbus_lookup(ca); 182 if (t == NULL) { 183 aprint_error("\n"); 184 panic("re_cardbus_attach: impossible"); 185 } 186 aprint_normal(": %s\n", t->rtk_name); 187 188 /* 189 * Power management hooks. 190 */ 191 sc->sc_enable = re_cardbus_enable; 192 sc->sc_disable = re_cardbus_disable; 193 sc->sc_power = re_cardbus_power; 194 195 /* 196 * Map control/status registers. 197 */ 198 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE; 199 #ifdef RTK_USEIOSPACE 200 if (Cardbus_mapreg_map(ct, RTK_PCI_LOIO, CARDBUS_MAPREG_TYPE_IO, 0, 201 &sc->rtk_btag, &sc->rtk_bhandle, &adr, &csc->sc_mapsize) == 0) { 202 #if rbus 203 #else 204 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 205 #endif 206 csc->sc_cben = CARDBUS_IO_ENABLE; 207 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE; 208 csc->sc_bar_reg = RTK_PCI_LOIO; 209 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 210 } 211 #else 212 if (Cardbus_mapreg_map(ct, RTK_PCI_LOMEM, CARDBUS_MAPREG_TYPE_MEM, 0, 213 &sc->rtk_btag, &sc->rtk_bhandle, &adr, &csc->sc_mapsize) == 0) { 214 #if rbus 215 #else 216 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 217 #endif 218 csc->sc_cben = CARDBUS_MEM_ENABLE; 219 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE; 220 csc->sc_bar_reg = RTK_PCI_LOMEM; 221 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; 222 } 223 #endif 224 else { 225 aprint_error("%s: unable to map deviceregisters\n", 226 sc->sc_dev.dv_xname); 227 return; 228 } 229 /* 230 * Handle power management nonsense and initialize the 231 * configuration registers. 232 */ 233 re_cardbus_setup(csc); 234 235 sc->rtk_type = t->rtk_basetype; 236 sc->sc_dmat = ca->ca_dmat; 237 re_attach(sc); 238 239 /* 240 * Power down the socket. 241 */ 242 Cardbus_function_disable(csc->sc_ct); 243 } 244 245 int 246 re_cardbus_detach(struct device *self, int flags) 247 { 248 struct re_cardbus_softc *csc = device_private(self); 249 struct rtk_softc *sc = &csc->sc_rtk; 250 struct cardbus_devfunc *ct = csc->sc_ct; 251 int rv; 252 253 #ifdef DIAGNOSTIC 254 if (ct == NULL) 255 panic("%s: cardbus softc, cardbus_devfunc NULL", 256 sc->sc_dev.dv_xname); 257 #endif 258 rv = re_detach(sc); 259 if (rv) 260 return rv; 261 /* 262 * Unhook the interrupt handler. 263 */ 264 if (csc->sc_ih != NULL) 265 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih); 266 267 /* 268 * Release bus space and close window. 269 */ 270 if (csc->sc_bar_reg != 0) 271 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 272 sc->rtk_btag, sc->rtk_bhandle, csc->sc_mapsize); 273 274 return 0; 275 } 276 277 void 278 re_cardbus_setup(struct re_cardbus_softc *csc) 279 { 280 struct rtk_softc *sc = &csc->sc_rtk; 281 cardbus_devfunc_t ct = csc->sc_ct; 282 cardbus_chipset_tag_t cc = ct->ct_cc; 283 cardbus_function_tag_t cf = ct->ct_cf; 284 pcireg_t reg,command; 285 int pmreg; 286 287 /* 288 * Handle power management nonsense. 289 */ 290 if (cardbus_get_capability(cc, cf, csc->sc_tag, 291 PCI_CAP_PWRMGMT, &pmreg, 0)) { 292 command = cardbus_conf_read(cc, cf, csc->sc_tag, 293 pmreg + PCI_PMCSR); 294 if (command & PCI_PMCSR_STATE_MASK) { 295 pcireg_t iobase, membase, irq; 296 297 /* Save important PCI config data. */ 298 iobase = cardbus_conf_read(cc, cf, csc->sc_tag, 299 RTK_PCI_LOIO); 300 membase = cardbus_conf_read(cc, cf,csc->sc_tag, 301 RTK_PCI_LOMEM); 302 irq = cardbus_conf_read(cc, cf,csc->sc_tag, 303 CARDBUS_INTERRUPT_REG); 304 305 /* Reset the power state. */ 306 aprint_normal("%s: chip is in D%d power mode " 307 "-- setting to D0\n", sc->sc_dev.dv_xname, 308 command & PCI_PMCSR_STATE_MASK); 309 command &= ~PCI_PMCSR_STATE_MASK; 310 cardbus_conf_write(cc, cf, csc->sc_tag, 311 pmreg + PCI_PMCSR, command); 312 313 /* Restore PCI config data. */ 314 cardbus_conf_write(cc, cf, csc->sc_tag, 315 RTK_PCI_LOIO, iobase); 316 cardbus_conf_write(cc, cf, csc->sc_tag, 317 RTK_PCI_LOMEM, membase); 318 cardbus_conf_write(cc, cf, csc->sc_tag, 319 CARDBUS_INTERRUPT_REG, irq); 320 } 321 } 322 323 /* Program the BAR */ 324 cardbus_conf_write(cc, cf, csc->sc_tag, 325 csc->sc_bar_reg, csc->sc_bar_val); 326 327 /* Make sure the right access type is on the CardBus bridge. */ 328 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben); 329 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 330 331 /* Enable the appropriate bits in the CARDBUS CSR. */ 332 reg = cardbus_conf_read(cc, cf, csc->sc_tag, 333 CARDBUS_COMMAND_STATUS_REG); 334 reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE); 335 reg |= csc->sc_csr; 336 cardbus_conf_write(cc, cf, csc->sc_tag, 337 CARDBUS_COMMAND_STATUS_REG, reg); 338 339 /* 340 * Make sure the latency timer is set to some reasonable 341 * value. 342 */ 343 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG); 344 if (CARDBUS_LATTIMER(reg) < 0x40) { 345 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT); 346 reg |= (0x40 << CARDBUS_LATTIMER_SHIFT); 347 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg); 348 } 349 } 350 351 int 352 re_cardbus_enable(struct rtk_softc *sc) 353 { 354 struct re_cardbus_softc *csc = (void *) sc; 355 cardbus_devfunc_t ct = csc->sc_ct; 356 cardbus_chipset_tag_t cc = ct->ct_cc; 357 cardbus_function_tag_t cf = ct->ct_cf; 358 359 /* 360 * Power on the socket. 361 */ 362 Cardbus_function_enable(ct); 363 364 /* 365 * Set up the PCI configuration registers. 366 */ 367 re_cardbus_setup(csc); 368 369 /* 370 * Map and establish the interrupt. 371 */ 372 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, 373 IPL_NET, re_intr, sc); 374 if (csc->sc_ih == NULL) { 375 aprint_error("%s: unable to establish interrupt at %d\n", 376 sc->sc_dev.dv_xname, csc->sc_intrline); 377 Cardbus_function_disable(csc->sc_ct); 378 return 1; 379 } 380 aprint_normal("%s: interrupting at %d\n", sc->sc_dev.dv_xname, 381 csc->sc_intrline); 382 return 0; 383 } 384 385 void 386 re_cardbus_disable(struct rtk_softc *sc) 387 { 388 struct re_cardbus_softc *csc = (void *) sc; 389 cardbus_devfunc_t ct = csc->sc_ct; 390 cardbus_chipset_tag_t cc = ct->ct_cc; 391 cardbus_function_tag_t cf = ct->ct_cf; 392 393 /* Unhook the interrupt handler. */ 394 cardbus_intr_disestablish(cc, cf, csc->sc_ih); 395 csc->sc_ih = NULL; 396 397 /* Power down the socket. */ 398 Cardbus_function_disable(ct); 399 } 400 401 void 402 re_cardbus_power(struct rtk_softc *sc, int why) 403 { 404 struct re_cardbus_softc *csc = (void *) sc; 405 406 if (why == PWR_RESUME) { 407 /* 408 * Give the PCI configuration registers a kick 409 * in the head. 410 */ 411 #ifdef DIAGNOSTIC 412 if (RTK_IS_ENABLED(sc) == 0) 413 panic("re_cardbus_power"); 414 #endif 415 re_cardbus_setup(csc); 416 } 417 } 418
Indexes created Mon Sep 29 21:09:56 GMT 2025