if_re_cardbus.c revision 1.17
1 /* $NetBSD: if_re_cardbus.c,v 1.17 2008/04/25 11:27:19 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 2004 Jonathan Stone 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * if_re_cardbus.c: 32 * Cardbus specific routines for Realtek 8169 ethernet adapter. 33 * Tested for : 34 * Netgear GA-511 (8169S) 35 * Buffalo LPC-CB-CLGT 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_re_cardbus.c,v 1.17 2008/04/25 11:27:19 tsutsui Exp $"); 40 41 #include "opt_inet.h" 42 #include "bpfilter.h" 43 #include "rnd.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/callout.h> 48 #include <sys/device.h> 49 #include <sys/sockio.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 55 #include <net/if.h> 56 #include <net/if_arp.h> 57 #include <net/if_ether.h> 58 #include <net/if_dl.h> 59 #include <net/if_media.h> 60 #ifdef INET 61 #include <netinet/in.h> 62 #include <netinet/if_inarp.h> 63 #endif 64 65 #if NBPFILTER > 0 66 #include <net/bpf.h> 67 #endif 68 #if NRND > 0 69 #include <sys/rnd.h> 70 #endif 71 72 #include <sys/bus.h> 73 74 #include <dev/pci/pcireg.h> 75 #include <dev/pci/pcivar.h> 76 #include <dev/pci/pcidevs.h> 77 78 #include <dev/cardbus/cardbusvar.h> 79 #include <dev/pci/pcidevs.h> 80 81 #include <dev/mii/mii.h> 82 #include <dev/mii/miivar.h> 83 84 /* 85 * Default to using PIO access for this driver. On SMP systems, 86 * there appear to be problems with memory mapped mode: it looks like 87 * doing too many memory mapped access back to back in rapid succession 88 * can hang the bus. I'm inclined to blame this on crummy design/construction 89 * on the part of Realtek. Memory mapped mode does appear to work on 90 * uniprocessor systems though. 91 */ 92 #define RTK_USEIOSPACE 93 94 #include <dev/ic/rtl81x9reg.h> 95 #include <dev/ic/rtl81x9var.h> 96 97 #include <dev/ic/rtl8169var.h> 98 99 /* 100 * Various supported device vendors/types and their names. 101 */ 102 static const struct rtk_type re_cardbus_devs[] = { 103 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, 104 RTK_8169, "Realtek 10/100/1000baseT" }, 105 { 0, 0, 0, NULL } 106 }; 107 108 static int re_cardbus_match(device_t, cfdata_t, void *); 109 static void re_cardbus_attach(device_t, device_t, void *); 110 static int re_cardbus_detach(device_t, int); 111 112 struct re_cardbus_softc { 113 struct rtk_softc sc_rtk; /* real rtk softc */ 114 115 /* CardBus-specific goo. */ 116 void *sc_ih; 117 cardbus_devfunc_t sc_ct; 118 cardbustag_t sc_tag; 119 int sc_csr; 120 int sc_cben; 121 int sc_bar_reg; 122 pcireg_t sc_bar_val; 123 bus_size_t sc_mapsize; 124 int sc_intrline; 125 }; 126 127 CFATTACH_DECL_NEW(re_cardbus, sizeof(struct re_cardbus_softc), 128 re_cardbus_match, re_cardbus_attach, re_cardbus_detach, re_activate); 129 130 const struct rtk_type *re_cardbus_lookup(const struct cardbus_attach_args *); 131 132 void re_cardbus_setup(struct re_cardbus_softc *); 133 134 int re_cardbus_enable(struct rtk_softc *); 135 void re_cardbus_disable(struct rtk_softc *); 136 137 const struct rtk_type * 138 re_cardbus_lookup(const struct cardbus_attach_args *ca) 139 { 140 const struct rtk_type *t; 141 142 for (t = re_cardbus_devs; t->rtk_name != NULL; t++) { 143 if (CARDBUS_VENDOR(ca->ca_id) == t->rtk_vid && 144 CARDBUS_PRODUCT(ca->ca_id) == t->rtk_did) { 145 return t; 146 } 147 } 148 return NULL; 149 } 150 151 int 152 re_cardbus_match(device_t parent, cfdata_t cf, void *aux) 153 { 154 struct cardbus_attach_args *ca = aux; 155 156 if (re_cardbus_lookup(ca) != NULL) 157 return 1; 158 159 return 0; 160 } 161 162 163 void 164 re_cardbus_attach(device_t parent, device_t self, void *aux) 165 { 166 struct re_cardbus_softc *csc = device_private(self); 167 struct rtk_softc *sc = &csc->sc_rtk; 168 struct cardbus_attach_args *ca = aux; 169 cardbus_devfunc_t ct = ca->ca_ct; 170 const struct rtk_type *t; 171 bus_addr_t adr; 172 173 sc->sc_dev = self; 174 sc->sc_dmat = ca->ca_dmat; 175 csc->sc_ct = ct; 176 csc->sc_tag = ca->ca_tag; 177 csc->sc_intrline = ca->ca_intrline; 178 179 t = re_cardbus_lookup(ca); 180 if (t == NULL) { 181 aprint_error("\n"); 182 panic("%s: impossible", __func__); 183 } 184 aprint_normal(": %s\n", t->rtk_name); 185 186 /* 187 * Power management hooks. 188 */ 189 sc->sc_enable = re_cardbus_enable; 190 sc->sc_disable = re_cardbus_disable; 191 192 /* 193 * Map control/status registers. 194 */ 195 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE; 196 #ifdef RTK_USEIOSPACE 197 if (Cardbus_mapreg_map(ct, RTK_PCI_LOIO, CARDBUS_MAPREG_TYPE_IO, 0, 198 &sc->rtk_btag, &sc->rtk_bhandle, &adr, &csc->sc_mapsize) == 0) { 199 #if rbus 200 #else 201 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 202 #endif 203 csc->sc_cben = CARDBUS_IO_ENABLE; 204 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE; 205 csc->sc_bar_reg = RTK_PCI_LOIO; 206 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 207 } 208 #else 209 if (Cardbus_mapreg_map(ct, RTK_PCI_LOMEM, CARDBUS_MAPREG_TYPE_MEM, 0, 210 &sc->rtk_btag, &sc->rtk_bhandle, &adr, &csc->sc_mapsize) == 0) { 211 #if rbus 212 #else 213 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 214 #endif 215 csc->sc_cben = CARDBUS_MEM_ENABLE; 216 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE; 217 csc->sc_bar_reg = RTK_PCI_LOMEM; 218 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; 219 } 220 #endif 221 else { 222 aprint_error_dev(self, "unable to map deviceregisters\n"); 223 return; 224 } 225 /* 226 * Handle power management nonsense and initialize the 227 * configuration registers. 228 */ 229 re_cardbus_setup(csc); 230 231 sc->sc_dmat = ca->ca_dmat; 232 re_attach(sc); 233 234 if (!pmf_device_register(self, NULL, NULL)) 235 aprint_error_dev(self, "couldn't establish power handler\n"); 236 else 237 pmf_class_network_register(self, &sc->ethercom.ec_if); 238 239 /* 240 * Power down the socket. 241 */ 242 Cardbus_function_disable(csc->sc_ct); 243 } 244 245 int 246 re_cardbus_detach(device_t self, int flags) 247 { 248 struct re_cardbus_softc *csc = device_private(self); 249 struct rtk_softc *sc = &csc->sc_rtk; 250 struct cardbus_devfunc *ct = csc->sc_ct; 251 int rv; 252 253 #ifdef DIAGNOSTIC 254 if (ct == NULL) 255 panic("%s: cardbus softc, cardbus_devfunc NULL", 256 device_xname(self)); 257 #endif 258 259 rv = re_detach(sc); 260 if (rv) 261 return rv; 262 263 pmf_device_deregister(self); 264 265 /* 266 * Unhook the interrupt handler. 267 */ 268 if (csc->sc_ih != NULL) 269 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih); 270 271 /* 272 * Release bus space and close window. 273 */ 274 if (csc->sc_bar_reg != 0) 275 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 276 sc->rtk_btag, sc->rtk_bhandle, csc->sc_mapsize); 277 278 return 0; 279 } 280 281 void 282 re_cardbus_setup(struct re_cardbus_softc *csc) 283 { 284 struct rtk_softc *sc = &csc->sc_rtk; 285 cardbus_devfunc_t ct = csc->sc_ct; 286 cardbus_chipset_tag_t cc = ct->ct_cc; 287 cardbus_function_tag_t cf = ct->ct_cf; 288 pcireg_t reg, command; 289 int pmreg; 290 291 /* 292 * Handle power management nonsense. 293 */ 294 if (cardbus_get_capability(cc, cf, csc->sc_tag, 295 PCI_CAP_PWRMGMT, &pmreg, 0)) { 296 command = cardbus_conf_read(cc, cf, csc->sc_tag, 297 pmreg + PCI_PMCSR); 298 if (command & PCI_PMCSR_STATE_MASK) { 299 pcireg_t iobase, membase, irq; 300 301 /* Save important PCI config data. */ 302 iobase = cardbus_conf_read(cc, cf, csc->sc_tag, 303 RTK_PCI_LOIO); 304 membase = cardbus_conf_read(cc, cf,csc->sc_tag, 305 RTK_PCI_LOMEM); 306 irq = cardbus_conf_read(cc, cf,csc->sc_tag, 307 CARDBUS_INTERRUPT_REG); 308 309 /* Reset the power state. */ 310 aprint_normal_dev(sc->sc_dev, 311 "chip is in D%d power mode -- setting to D0\n", 312 command & PCI_PMCSR_STATE_MASK); 313 command &= ~PCI_PMCSR_STATE_MASK; 314 cardbus_conf_write(cc, cf, csc->sc_tag, 315 pmreg + PCI_PMCSR, command); 316 317 /* Restore PCI config data. */ 318 cardbus_conf_write(cc, cf, csc->sc_tag, 319 RTK_PCI_LOIO, iobase); 320 cardbus_conf_write(cc, cf, csc->sc_tag, 321 RTK_PCI_LOMEM, membase); 322 cardbus_conf_write(cc, cf, csc->sc_tag, 323 CARDBUS_INTERRUPT_REG, irq); 324 } 325 } 326 327 /* Program the BAR */ 328 cardbus_conf_write(cc, cf, csc->sc_tag, 329 csc->sc_bar_reg, csc->sc_bar_val); 330 331 /* Make sure the right access type is on the CardBus bridge. */ 332 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben); 333 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 334 335 /* Enable the appropriate bits in the CARDBUS CSR. */ 336 reg = cardbus_conf_read(cc, cf, csc->sc_tag, 337 CARDBUS_COMMAND_STATUS_REG); 338 reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE); 339 reg |= csc->sc_csr; 340 cardbus_conf_write(cc, cf, csc->sc_tag, 341 CARDBUS_COMMAND_STATUS_REG, reg); 342 343 /* 344 * Make sure the latency timer is set to some reasonable 345 * value. 346 */ 347 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG); 348 if (CARDBUS_LATTIMER(reg) < 0x40) { 349 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT); 350 reg |= (0x40 << CARDBUS_LATTIMER_SHIFT); 351 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg); 352 } 353 } 354 355 int 356 re_cardbus_enable(struct rtk_softc *sc) 357 { 358 struct re_cardbus_softc *csc = (struct re_cardbus_softc *)sc; 359 cardbus_devfunc_t ct = csc->sc_ct; 360 cardbus_chipset_tag_t cc = ct->ct_cc; 361 cardbus_function_tag_t cf = ct->ct_cf; 362 363 /* 364 * Power on the socket. 365 */ 366 Cardbus_function_enable(ct); 367 368 /* 369 * Set up the PCI configuration registers. 370 */ 371 re_cardbus_setup(csc); 372 373 /* 374 * Map and establish the interrupt. 375 */ 376 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, 377 IPL_NET, re_intr, sc); 378 if (csc->sc_ih == NULL) { 379 aprint_error_dev(sc->sc_dev, 380 "unable to establish interrupt at %d\n", csc->sc_intrline); 381 Cardbus_function_disable(csc->sc_ct); 382 return 1; 383 } 384 aprint_normal_dev(sc->sc_dev, "interrupting at %d\n", 385 csc->sc_intrline); 386 return 0; 387 } 388 389 void 390 re_cardbus_disable(struct rtk_softc *sc) 391 { 392 struct re_cardbus_softc *csc = (struct re_cardbus_softc *)sc; 393 cardbus_devfunc_t ct = csc->sc_ct; 394 cardbus_chipset_tag_t cc = ct->ct_cc; 395 cardbus_function_tag_t cf = ct->ct_cf; 396 397 /* Unhook the interrupt handler. */ 398 cardbus_intr_disestablish(cc, cf, csc->sc_ih); 399 csc->sc_ih = NULL; 400 401 /* Power down the socket. */ 402 Cardbus_function_disable(ct); 403 } 404
Indexes created Mon Sep 29 21:09:56 GMT 2025