if_rtk_cardbus.c revision 1.2
1 /* $NetBSD: if_rtk_cardbus.c,v 1.2 2000/05/15 01:55:13 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Masanori Kanaoka 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * if_rtk_cardbus.c: 32 * Cardbus specific routines for RealTek 8139 ethernet adapter. 33 * Tested for 34 * - elecom-Laneed LD-10/100CBA (Accton MPX5030) 35 * - MELCO LPC3-TX-CB (RealTek 8139) 36 */ 37 38 #include "opt_inet.h" 39 #include "opt_ns.h" 40 #include "bpfilter.h" 41 #include "rnd.h" 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/callout.h> 46 #include <sys/device.h> 47 #include <sys/sockio.h> 48 #include <sys/mbuf.h> 49 #include <sys/malloc.h> 50 #include <sys/kernel.h> 51 #include <sys/socket.h> 52 53 #include <net/if.h> 54 #include <net/if_arp.h> 55 #include <net/if_ether.h> 56 #include <net/if_dl.h> 57 #include <net/if_media.h> 58 #ifdef INET 59 #include <netinet/in.h> 60 #include <netinet/if_inarp.h> 61 #endif 62 #ifdef NS 63 #include <netns/ns.h> 64 #include <netns/ns_if.h> 65 #endif 66 67 #if NBPFILTER > 0 68 #include <net/bpf.h> 69 #endif 70 #if NRND > 0 71 #include <sys/rnd.h> 72 #endif 73 74 #include <machine/bus.h> 75 76 #include <dev/pci/pcireg.h> 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcidevs.h> 79 80 #include <dev/cardbus/cardbusvar.h> 81 #include <dev/cardbus/cardbusdevs.h> 82 83 #include <dev/mii/mii.h> 84 #include <dev/mii/miivar.h> 85 86 /* 87 * Default to using PIO access for this driver. On SMP systems, 88 * there appear to be problems with memory mapped mode: it looks like 89 * doing too many memory mapped access back to back in rapid succession 90 * can hang the bus. I'm inclined to blame this on crummy design/construction 91 * on the part of RealTek. Memory mapped mode does appear to work on 92 * uniprocessor systems though. 93 */ 94 #define RL_USEIOSPACE 95 96 #include <dev/ic/rtl81x9reg.h> 97 #include <dev/ic/rtl81x9var.h> 98 99 /* 100 * Various supported device vendors/types and their names. 101 */ 102 static const struct rtk_type rtk_cardbus_devs[] = { 103 { CARDBUS_VENDOR_ACCTON, CARDBUS_PRODUCT_ACCTON_MPX5030, 104 "Accton MPX 5030/5038 10/100BaseTX", 105 RL_8139 }, 106 { CARDBUS_VENDOR_REALTEK, CARDBUS_PRODUCT_REALTEK_RT8138, 107 "RealTek 8138 10/100BaseTX", RL_8139 }, 108 { 0, 0, NULL, 0 } 109 }; 110 111 const struct rtk_type *rtk_cardbus_lookup 112 __P((const struct cardbus_attach_args *)); 113 static int rtk_cardbus_match __P((struct device *, struct cfdata *, void *)); 114 static void rtk_cardbus_attach __P((struct device *, struct device *, void *)); 115 116 struct rtk_cardbus_softc { 117 struct rtk_softc sc_rtk; /* real rtk softc */ 118 119 /* CardBus-specific goo. */ 120 void *sc_ih; 121 cardbus_devfunc_t sc_ct; 122 cardbustag_t sc_tag; 123 int sc_csr; 124 int sc_cben; 125 int sc_bar_reg; 126 pcireg_t sc_bar_val; 127 bus_size_t sc_mapsize; 128 int sc_intrline; 129 }; 130 131 struct cfattach rtk_cardbus_ca = { 132 sizeof(struct rtk_cardbus_softc), rtk_cardbus_match, rtk_cardbus_attach, 133 }; 134 135 const struct rtk_type * 136 rtk_cardbus_lookup(ca) 137 const struct cardbus_attach_args *ca; 138 { 139 const struct rtk_type *t; 140 141 for (t = rtk_cardbus_devs; t->rtk_name != NULL; t++){ 142 if (CARDBUS_VENDOR(ca->ca_id) == t->rtk_vid && 143 CARDBUS_PRODUCT(ca->ca_id) == t->rtk_did) { 144 return (t); 145 } 146 } 147 return (NULL); 148 } 149 150 int 151 rtk_cardbus_match(parent, match, aux) 152 struct device *parent; 153 struct cfdata *match; 154 void *aux; 155 { 156 struct cardbus_attach_args *ca = aux; 157 158 if (rtk_cardbus_lookup(ca) != NULL) 159 return (1); 160 161 return (0); 162 } 163 164 165 void 166 rtk_cardbus_attach(parent, self, aux) 167 struct device *parent, *self; 168 void *aux; 169 { 170 struct rtk_cardbus_softc *csc = (struct rtk_cardbus_softc *)self; 171 struct rtk_softc *sc = &csc->sc_rtk; 172 pcireg_t command; 173 struct cardbus_attach_args *ca = aux; 174 cardbus_devfunc_t ct = ca->ca_ct; 175 cardbus_chipset_tag_t cc = ct->ct_cc; 176 cardbus_function_tag_t cf = ct->ct_cf; 177 const struct rtk_type *t; 178 bus_addr_t adr; 179 pcireg_t reg; 180 int pmreg; 181 182 sc->sc_dmat = ca->ca_dmat; 183 csc->sc_ct = ct; 184 csc->sc_tag = ca->ca_tag; 185 csc->sc_intrline = ca->ca_intrline; 186 187 t = rtk_cardbus_lookup(ca); 188 if (t == NULL) { 189 printf("\n"); 190 panic("rtk_cardbus_attach: impossible"); 191 } 192 printf(": %s\n", t->rtk_name); 193 194 /* 195 * Handle power management nonsense. 196 */ 197 if (cardbus_get_capability(cc, cf, csc->sc_tag, 198 PCI_CAP_PWRMGMT, &pmreg, 0)) { 199 command = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4); 200 if (command & RL_PSTATE_MASK) { 201 pcireg_t iobase, membase, irq; 202 203 /* Save important PCI config data. */ 204 iobase = cardbus_conf_read(cc, cf, csc->sc_tag, 205 RL_PCI_LOIO); 206 membase = cardbus_conf_read(cc, cf,csc->sc_tag, 207 RL_PCI_LOMEM); 208 irq = cardbus_conf_read(cc, cf,csc->sc_tag, 209 PCI_PRODUCT_DELTA_8139); 210 211 /* Reset the power state. */ 212 printf("%s: chip is is in D%d power mode " 213 "-- setting to D0\n", sc->sc_dev.dv_xname, 214 command & RL_PSTATE_MASK); 215 command &= 0xFFFFFFFC; 216 cardbus_conf_write(cc, cf, csc->sc_tag, 217 pmreg + 4, command); 218 219 /* Restore PCI config data. */ 220 cardbus_conf_write(cc, cf, csc->sc_tag, 221 RL_PCI_LOIO, iobase); 222 cardbus_conf_write(cc, cf, csc->sc_tag, 223 RL_PCI_LOMEM, membase); 224 cardbus_conf_write(cc, cf, csc->sc_tag, 225 PCI_PRODUCT_DELTA_8139, irq); 226 } 227 } 228 /* 229 * Map control/status registers. 230 */ 231 #ifdef RL_USEIOSPACE 232 if (Cardbus_mapreg_map(ct, RL_PCI_LOIO, CARDBUS_MAPREG_TYPE_IO, 0, 233 &sc->rtk_btag, &sc->rtk_bhandle, &adr, &csc->sc_mapsize) == 0) { 234 #if rbus 235 #else 236 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 237 #endif 238 csc->sc_cben = CARDBUS_IO_ENABLE; 239 csc->sc_csr |= 240 (CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MASTER_ENABLE); 241 csc->sc_bar_reg = RL_PCI_LOIO; 242 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 243 } 244 #else 245 if (Cardbus_mapreg_map(ct, RL_PCI_LOMEM, CARDBUS_MAPREG_TYPE_MEM, 0, 246 &sc->rtk_btag, &sc->rtk_bhandle, &adr, &csc->sc_mapsize) == 0) { 247 #if rbus 248 #else 249 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 250 #endif 251 csc->sc_cben = CARDBUS_MEM_ENABLE; 252 csc->sc_csr |= 253 (CARDBUS_COMMAND_MEM_ENABLE|CARDBUS_COMMAND_MASTER_ENABLE); 254 csc->sc_bar_reg = RL_PCI_LOMEM; 255 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; 256 } 257 #endif 258 else { 259 printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname); 260 return; 261 } 262 /* Make sure the right access type is on the CardBus bridge. */ 263 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben); 264 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 265 266 /* Program the BAR */ 267 cardbus_conf_write(cc, cf, csc->sc_tag, 268 csc->sc_bar_reg, csc->sc_bar_val); 269 270 /* Enable the appropriate bits in the CARDBUS CSR. */ 271 reg = cardbus_conf_read(cc, cf, csc->sc_tag, 272 CARDBUS_COMMAND_STATUS_REG); 273 reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE); 274 reg |= csc->sc_csr; 275 cardbus_conf_write(cc, cf, csc->sc_tag, 276 CARDBUS_COMMAND_STATUS_REG, reg); 277 278 /* 279 * Make sure the latency timer is set to some reasonable 280 * value. 281 */ 282 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG); 283 if (CARDBUS_LATTIMER(reg) < 0x20) { 284 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT); 285 reg |= (0x20 << CARDBUS_LATTIMER_SHIFT); 286 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg); 287 } 288 289 sc->rtk_type = t->rtk_type; 290 291 /* Allocate interrupt */ 292 printf("%s: interrupting at %d\n", 293 sc->sc_dev.dv_xname, csc->sc_intrline); 294 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET, 295 rtk_intr, sc); 296 if (csc->sc_ih == NULL) { 297 printf("%s: unable to establish interrupt at %d\n", 298 sc->sc_dev.dv_xname, csc->sc_intrline); 299 printf("\n"); 300 return; 301 } 302 303 rtk_attach(sc); 304 } 305
Indexes created Fri Oct 03 02:09:57 GMT 2025