if_rtk_cardbus.c revision 1.25.2.1
1 /* $NetBSD: if_rtk_cardbus.c,v 1.25.2.1 2007/03/03 23:30:23 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Masanori Kanaoka 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * if_rtk_cardbus.c: 32 * Cardbus specific routines for Realtek 8139 ethernet adapter. 33 * Tested for 34 * - elecom-Laneed LD-10/100CBA (Accton MPX5030) 35 * - MELCO LPC3-TX-CB (Realtek 8139) 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_rtk_cardbus.c,v 1.25.2.1 2007/03/03 23:30:23 bouyer Exp $"); 40 41 #include "opt_inet.h" 42 #include "opt_ns.h" 43 #include "bpfilter.h" 44 #include "rnd.h" 45 46 #include <sys/param.h> 47 #include <sys/systm.h> 48 #include <sys/callout.h> 49 #include <sys/device.h> 50 #include <sys/sockio.h> 51 #include <sys/mbuf.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/socket.h> 55 56 #include <net/if.h> 57 #include <net/if_arp.h> 58 #include <net/if_ether.h> 59 #include <net/if_dl.h> 60 #include <net/if_media.h> 61 #ifdef INET 62 #include <netinet/in.h> 63 #include <netinet/if_inarp.h> 64 #endif 65 #ifdef NS 66 #include <netns/ns.h> 67 #include <netns/ns_if.h> 68 #endif 69 70 #if NBPFILTER > 0 71 #include <net/bpf.h> 72 #endif 73 #if NRND > 0 74 #include <sys/rnd.h> 75 #endif 76 77 #include <machine/bus.h> 78 79 #include <dev/pci/pcireg.h> 80 #include <dev/pci/pcivar.h> 81 #include <dev/pci/pcidevs.h> 82 83 #include <dev/cardbus/cardbusvar.h> 84 #include <dev/pci/pcidevs.h> 85 86 #include <dev/mii/mii.h> 87 #include <dev/mii/miivar.h> 88 89 /* 90 * Default to using PIO access for this driver. On SMP systems, 91 * there appear to be problems with memory mapped mode: it looks like 92 * doing too many memory mapped access back to back in rapid succession 93 * can hang the bus. I'm inclined to blame this on crummy design/construction 94 * on the part of Realtek. Memory mapped mode does appear to work on 95 * uniprocessor systems though. 96 */ 97 #define RTK_USEIOSPACE 98 99 #include <dev/ic/rtl81x9reg.h> 100 #include <dev/ic/rtl81x9var.h> 101 102 /* 103 * Various supported device vendors/types and their names. 104 */ 105 static const struct rtk_type rtk_cardbus_devs[] = { 106 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_MPX5030, 107 RTK_8139, "Accton MPX 5030/5038 10/100BaseTX" }, 108 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DFE690TXD, 109 RTK_8139, "D-Link DFE-690TXD 10/100BaseTX" }, 110 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8138, 111 RTK_8139, "Realtek 8138 10/100BaseTX" }, 112 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139, 113 RTK_8139, "Realtek 8139 10/100BaseTX" }, 114 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_CB_TXD, 115 RTK_8139, "Corega FEther CB-TXD 10/100BaseTX" }, 116 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_2CB_TXD, 117 RTK_8139, "Corega FEther II CB-TXD 10/100BaseTX" }, 118 { PCI_VENDOR_PLANEX, PCI_PRODUCT_PLANEX_FNW_3603_TX, 119 RTK_8139, "Planex FNW-3603 10/100BaseTX" }, 120 { PCI_VENDOR_PLANEX, PCI_PRODUCT_PLANEX_FNW_3800_TX, 121 RTK_8139, "Planex 10/100BaseTX FNW-3800-TX" }, 122 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2000VX, 123 RTK_8139, "AboCom FE2000VX 10/100BaseTX" }, 124 125 { 0, 0, 0, NULL } 126 }; 127 128 static int rtk_cardbus_match(struct device *, struct cfdata *, void *); 129 static void rtk_cardbus_attach(struct device *, struct device *, void *); 130 static int rtk_cardbus_detach(struct device *, int); 131 132 struct rtk_cardbus_softc { 133 struct rtk_softc sc_rtk; /* real rtk softc */ 134 135 /* CardBus-specific goo. */ 136 void *sc_ih; 137 cardbus_devfunc_t sc_ct; 138 cardbustag_t sc_tag; 139 int sc_csr; 140 int sc_cben; 141 int sc_bar_reg; 142 pcireg_t sc_bar_val; 143 bus_size_t sc_mapsize; 144 int sc_intrline; 145 }; 146 147 CFATTACH_DECL(rtk_cardbus, sizeof(struct rtk_cardbus_softc), 148 rtk_cardbus_match, rtk_cardbus_attach, rtk_cardbus_detach, rtk_activate); 149 150 const struct rtk_type *rtk_cardbus_lookup 151 (const struct cardbus_attach_args *); 152 153 void rtk_cardbus_setup (struct rtk_cardbus_softc *); 154 155 int rtk_cardbus_enable (struct rtk_softc *); 156 void rtk_cardbus_disable(struct rtk_softc *); 157 void rtk_cardbus_power (struct rtk_softc *, int); 158 const struct rtk_type * 159 rtk_cardbus_lookup(ca) 160 const struct cardbus_attach_args *ca; 161 { 162 const struct rtk_type *t; 163 164 for (t = rtk_cardbus_devs; t->rtk_name != NULL; t++){ 165 if (CARDBUS_VENDOR(ca->ca_id) == t->rtk_vid && 166 CARDBUS_PRODUCT(ca->ca_id) == t->rtk_did) { 167 return (t); 168 } 169 } 170 return (NULL); 171 } 172 173 int 174 rtk_cardbus_match(struct device *parent, struct cfdata *match, 175 void *aux) 176 { 177 struct cardbus_attach_args *ca = aux; 178 179 if (rtk_cardbus_lookup(ca) != NULL) 180 return (1); 181 182 return (0); 183 } 184 185 186 void 187 rtk_cardbus_attach(struct device *parent, struct device *self, 188 void *aux) 189 { 190 struct rtk_cardbus_softc *csc = (struct rtk_cardbus_softc *)self; 191 struct rtk_softc *sc = &csc->sc_rtk; 192 struct cardbus_attach_args *ca = aux; 193 cardbus_devfunc_t ct = ca->ca_ct; 194 const struct rtk_type *t; 195 bus_addr_t adr; 196 197 sc->sc_dmat = ca->ca_dmat; 198 csc->sc_ct = ct; 199 csc->sc_tag = ca->ca_tag; 200 csc->sc_intrline = ca->ca_intrline; 201 202 t = rtk_cardbus_lookup(ca); 203 if (t == NULL) { 204 printf("\n"); 205 panic("rtk_cardbus_attach: impossible"); 206 } 207 printf(": %s\n", t->rtk_name); 208 209 /* 210 * Power management hooks. 211 */ 212 sc->sc_enable = rtk_cardbus_enable; 213 sc->sc_disable = rtk_cardbus_disable; 214 sc->sc_power = rtk_cardbus_power; 215 216 /* 217 * Map control/status registers. 218 */ 219 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE; 220 #ifdef RTK_USEIOSPACE 221 if (Cardbus_mapreg_map(ct, RTK_PCI_LOIO, CARDBUS_MAPREG_TYPE_IO, 0, 222 &sc->rtk_btag, &sc->rtk_bhandle, &adr, &csc->sc_mapsize) == 0) { 223 #if rbus 224 #else 225 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 226 #endif 227 csc->sc_cben = CARDBUS_IO_ENABLE; 228 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE; 229 csc->sc_bar_reg = RTK_PCI_LOIO; 230 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 231 } 232 #else 233 if (Cardbus_mapreg_map(ct, RTK_PCI_LOMEM, CARDBUS_MAPREG_TYPE_MEM, 0, 234 &sc->rtk_btag, &sc->rtk_bhandle, &adr, &csc->sc_mapsize) == 0) { 235 #if rbus 236 #else 237 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 238 #endif 239 csc->sc_cben = CARDBUS_MEM_ENABLE; 240 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE; 241 csc->sc_bar_reg = RTK_PCI_LOMEM; 242 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; 243 } 244 #endif 245 else { 246 printf("%s: unable to map deviceregisters\n", 247 sc->sc_dev.dv_xname); 248 return; 249 } 250 /* 251 * Handle power management nonsense and initialize the 252 * configuration registers. 253 */ 254 rtk_cardbus_setup(csc); 255 sc->rtk_type = t->rtk_basetype; 256 257 rtk_attach(sc); 258 259 /* 260 * Power down the socket. 261 */ 262 Cardbus_function_disable(csc->sc_ct); 263 } 264 265 int 266 rtk_cardbus_detach(struct device *self, int flags) 267 { 268 struct rtk_cardbus_softc *csc = (void *) self; 269 struct rtk_softc *sc = &csc->sc_rtk; 270 struct cardbus_devfunc *ct = csc->sc_ct; 271 int rv; 272 273 #ifdef DIAGNOSTIC 274 if (ct == NULL) 275 panic("%s: data structure lacks", sc->sc_dev.dv_xname); 276 #endif 277 rv = rtk_detach(sc); 278 if (rv) 279 return (rv); 280 /* 281 * Unhook the interrupt handler. 282 */ 283 if (csc->sc_ih != NULL) 284 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih); 285 286 /* 287 * Release bus space and close window. 288 */ 289 if (csc->sc_bar_reg != 0) 290 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 291 sc->rtk_btag, sc->rtk_bhandle, csc->sc_mapsize); 292 293 return (0); 294 } 295 296 void 297 rtk_cardbus_setup(csc) 298 struct rtk_cardbus_softc *csc; 299 { 300 struct rtk_softc *sc = &csc->sc_rtk; 301 cardbus_devfunc_t ct = csc->sc_ct; 302 cardbus_chipset_tag_t cc = ct->ct_cc; 303 cardbus_function_tag_t cf = ct->ct_cf; 304 pcireg_t reg,command; 305 int pmreg; 306 307 /* 308 * Handle power management nonsense. 309 */ 310 if (cardbus_get_capability(cc, cf, csc->sc_tag, 311 PCI_CAP_PWRMGMT, &pmreg, 0)) { 312 command = cardbus_conf_read(cc, cf, csc->sc_tag, 313 pmreg + PCI_PMCSR); 314 if (command & PCI_PMCSR_STATE_MASK) { 315 pcireg_t iobase, membase, irq; 316 317 /* Save important PCI config data. */ 318 iobase = cardbus_conf_read(cc, cf, csc->sc_tag, 319 RTK_PCI_LOIO); 320 membase = cardbus_conf_read(cc, cf,csc->sc_tag, 321 RTK_PCI_LOMEM); 322 irq = cardbus_conf_read(cc, cf,csc->sc_tag, 323 CARDBUS_INTERRUPT_REG); 324 325 /* Reset the power state. */ 326 printf("%s: chip is in D%d power mode " 327 "-- setting to D0\n", sc->sc_dev.dv_xname, 328 command & PCI_PMCSR_STATE_MASK); 329 command &= ~PCI_PMCSR_STATE_MASK; 330 cardbus_conf_write(cc, cf, csc->sc_tag, 331 pmreg + PCI_PMCSR, command); 332 333 /* Restore PCI config data. */ 334 cardbus_conf_write(cc, cf, csc->sc_tag, 335 RTK_PCI_LOIO, iobase); 336 cardbus_conf_write(cc, cf, csc->sc_tag, 337 RTK_PCI_LOMEM, membase); 338 cardbus_conf_write(cc, cf, csc->sc_tag, 339 CARDBUS_INTERRUPT_REG, irq); 340 } 341 } 342 343 /* Program the BAR */ 344 cardbus_conf_write(cc, cf, csc->sc_tag, 345 csc->sc_bar_reg, csc->sc_bar_val); 346 347 /* Make sure the right access type is on the CardBus bridge. */ 348 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben); 349 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 350 351 /* Enable the appropriate bits in the CARDBUS CSR. */ 352 reg = cardbus_conf_read(cc, cf, csc->sc_tag, 353 CARDBUS_COMMAND_STATUS_REG); 354 reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE); 355 reg |= csc->sc_csr; 356 cardbus_conf_write(cc, cf, csc->sc_tag, 357 CARDBUS_COMMAND_STATUS_REG, reg); 358 359 /* 360 * Make sure the latency timer is set to some reasonable 361 * value. 362 */ 363 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG); 364 if (CARDBUS_LATTIMER(reg) < 0x20) { 365 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT); 366 reg |= (0x20 << CARDBUS_LATTIMER_SHIFT); 367 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg); 368 } 369 } 370 371 int 372 rtk_cardbus_enable(sc) 373 struct rtk_softc *sc; 374 { 375 struct rtk_cardbus_softc *csc = (void *) sc; 376 cardbus_devfunc_t ct = csc->sc_ct; 377 cardbus_chipset_tag_t cc = ct->ct_cc; 378 cardbus_function_tag_t cf = ct->ct_cf; 379 380 /* 381 * Power on the socket. 382 */ 383 Cardbus_function_enable(ct); 384 385 /* 386 * Set up the PCI configuration registers. 387 */ 388 rtk_cardbus_setup(csc); 389 390 /* 391 * Map and establish the interrupt. 392 */ 393 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, 394 IPL_NET, rtk_intr, sc); 395 if (csc->sc_ih == NULL) { 396 printf("%s: unable to establish interrupt at %d\n", 397 sc->sc_dev.dv_xname, csc->sc_intrline); 398 Cardbus_function_disable(csc->sc_ct); 399 return (1); 400 } 401 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname, 402 csc->sc_intrline); 403 return (0); 404 } 405 406 void 407 rtk_cardbus_disable(sc) 408 struct rtk_softc *sc; 409 { 410 struct rtk_cardbus_softc *csc = (void *) sc; 411 cardbus_devfunc_t ct = csc->sc_ct; 412 cardbus_chipset_tag_t cc = ct->ct_cc; 413 cardbus_function_tag_t cf = ct->ct_cf; 414 415 /* Unhook the interrupt handler. */ 416 cardbus_intr_disestablish(cc, cf, csc->sc_ih); 417 csc->sc_ih = NULL; 418 419 /* Power down the socket. */ 420 Cardbus_function_disable(ct); 421 } 422 423 void 424 rtk_cardbus_power(sc, why) 425 struct rtk_softc *sc; 426 int why; 427 { 428 struct rtk_cardbus_softc *csc = (void *) sc; 429 430 if (why == PWR_RESUME) { 431 /* 432 * Give the PCI configuration registers a kick 433 * in the head. 434 */ 435 #ifdef DIAGNOSTIC 436 if (RTK_IS_ENABLED(sc) == 0) 437 panic("rtk_cardbus_power"); 438 #endif 439 rtk_cardbus_setup(csc); 440 } 441 } 442
Indexes created Sat Oct 18 17:09:52 GMT 2025