if_rtk_cardbus.c revision 1.30
1 /* $NetBSD: if_rtk_cardbus.c,v 1.30 2006/10/27 18:47:07 dogcow Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Masanori Kanaoka 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * if_rtk_cardbus.c: 32 * Cardbus specific routines for Realtek 8139 ethernet adapter. 33 * Tested for 34 * - elecom-Laneed LD-10/100CBA (Accton MPX5030) 35 * - MELCO LPC3-TX-CB (Realtek 8139) 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_rtk_cardbus.c,v 1.30 2006/10/27 18:47:07 dogcow Exp $"); 40 41 #include "opt_inet.h" 42 #include "bpfilter.h" 43 #include "rnd.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/callout.h> 48 #include <sys/device.h> 49 #include <sys/sockio.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 55 #include <net/if.h> 56 #include <net/if_arp.h> 57 #include <net/if_ether.h> 58 #include <net/if_dl.h> 59 #include <net/if_media.h> 60 #ifdef INET 61 #include <netinet/in.h> 62 #include <netinet/if_inarp.h> 63 #endif 64 65 #if NBPFILTER > 0 66 #include <net/bpf.h> 67 #endif 68 #if NRND > 0 69 #include <sys/rnd.h> 70 #endif 71 72 #include <machine/bus.h> 73 74 #include <dev/pci/pcireg.h> 75 #include <dev/pci/pcivar.h> 76 #include <dev/pci/pcidevs.h> 77 78 #include <dev/cardbus/cardbusvar.h> 79 #include <dev/pci/pcidevs.h> 80 81 #include <dev/mii/mii.h> 82 #include <dev/mii/miivar.h> 83 84 /* 85 * Default to using PIO access for this driver. On SMP systems, 86 * there appear to be problems with memory mapped mode: it looks like 87 * doing too many memory mapped access back to back in rapid succession 88 * can hang the bus. I'm inclined to blame this on crummy design/construction 89 * on the part of Realtek. Memory mapped mode does appear to work on 90 * uniprocessor systems though. 91 */ 92 #define RTK_USEIOSPACE 93 94 #include <dev/ic/rtl81x9reg.h> 95 #include <dev/ic/rtl81x9var.h> 96 97 /* 98 * Various supported device vendors/types and their names. 99 */ 100 static const struct rtk_type rtk_cardbus_devs[] = { 101 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_MPX5030, 102 RTK_8139, "Accton MPX 5030/5038 10/100BaseTX" }, 103 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DFE690TXD, 104 RTK_8139, "D-Link DFE-690TXD 10/100BaseTX" }, 105 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8138, 106 RTK_8139, "Realtek 8138 10/100BaseTX" }, 107 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139, 108 RTK_8139, "Realtek 8139 10/100BaseTX" }, 109 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_CB_TXD, 110 RTK_8139, "Corega FEther CB-TXD 10/100BaseTX" }, 111 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_2CB_TXD, 112 RTK_8139, "Corega FEther II CB-TXD 10/100BaseTX" }, 113 { PCI_VENDOR_PLANEX, PCI_PRODUCT_PLANEX_FNW_3603_TX, 114 RTK_8139, "Planex FNW-3603 10/100BaseTX" }, 115 { PCI_VENDOR_PLANEX, PCI_PRODUCT_PLANEX_FNW_3800_TX, 116 RTK_8139, "Planex 10/100BaseTX FNW-3800-TX" }, 117 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2000VX, 118 RTK_8139, "AboCom FE2000VX 10/100BaseTX" }, 119 120 { 0, 0, 0, NULL } 121 }; 122 123 static int rtk_cardbus_match(struct device *, struct cfdata *, void *); 124 static void rtk_cardbus_attach(struct device *, struct device *, void *); 125 static int rtk_cardbus_detach(struct device *, int); 126 127 struct rtk_cardbus_softc { 128 struct rtk_softc sc_rtk; /* real rtk softc */ 129 130 /* CardBus-specific goo. */ 131 void *sc_ih; 132 cardbus_devfunc_t sc_ct; 133 cardbustag_t sc_tag; 134 int sc_csr; 135 int sc_cben; 136 int sc_bar_reg; 137 pcireg_t sc_bar_val; 138 bus_size_t sc_mapsize; 139 int sc_intrline; 140 }; 141 142 CFATTACH_DECL(rtk_cardbus, sizeof(struct rtk_cardbus_softc), 143 rtk_cardbus_match, rtk_cardbus_attach, rtk_cardbus_detach, rtk_activate); 144 145 const struct rtk_type *rtk_cardbus_lookup 146 (const struct cardbus_attach_args *); 147 148 void rtk_cardbus_setup (struct rtk_cardbus_softc *); 149 150 int rtk_cardbus_enable (struct rtk_softc *); 151 void rtk_cardbus_disable(struct rtk_softc *); 152 void rtk_cardbus_power (struct rtk_softc *, int); 153 const struct rtk_type * 154 rtk_cardbus_lookup(ca) 155 const struct cardbus_attach_args *ca; 156 { 157 const struct rtk_type *t; 158 159 for (t = rtk_cardbus_devs; t->rtk_name != NULL; t++){ 160 if (CARDBUS_VENDOR(ca->ca_id) == t->rtk_vid && 161 CARDBUS_PRODUCT(ca->ca_id) == t->rtk_did) { 162 return (t); 163 } 164 } 165 return (NULL); 166 } 167 168 int 169 rtk_cardbus_match(struct device *parent __unused, struct cfdata *match __unused, 170 void *aux) 171 { 172 struct cardbus_attach_args *ca = aux; 173 174 if (rtk_cardbus_lookup(ca) != NULL) 175 return (1); 176 177 return (0); 178 } 179 180 181 void 182 rtk_cardbus_attach(struct device *parent __unused, struct device *self, 183 void *aux) 184 { 185 struct rtk_cardbus_softc *csc = device_private(self); 186 struct rtk_softc *sc = &csc->sc_rtk; 187 struct cardbus_attach_args *ca = aux; 188 cardbus_devfunc_t ct = ca->ca_ct; 189 const struct rtk_type *t; 190 bus_addr_t adr; 191 192 sc->sc_dmat = ca->ca_dmat; 193 csc->sc_ct = ct; 194 csc->sc_tag = ca->ca_tag; 195 csc->sc_intrline = ca->ca_intrline; 196 197 t = rtk_cardbus_lookup(ca); 198 if (t == NULL) { 199 printf("\n"); 200 panic("rtk_cardbus_attach: impossible"); 201 } 202 printf(": %s\n", t->rtk_name); 203 204 /* 205 * Power management hooks. 206 */ 207 sc->sc_enable = rtk_cardbus_enable; 208 sc->sc_disable = rtk_cardbus_disable; 209 sc->sc_power = rtk_cardbus_power; 210 211 /* 212 * Map control/status registers. 213 */ 214 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE; 215 #ifdef RTK_USEIOSPACE 216 if (Cardbus_mapreg_map(ct, RTK_PCI_LOIO, CARDBUS_MAPREG_TYPE_IO, 0, 217 &sc->rtk_btag, &sc->rtk_bhandle, &adr, &csc->sc_mapsize) == 0) { 218 #if rbus 219 #else 220 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 221 #endif 222 csc->sc_cben = CARDBUS_IO_ENABLE; 223 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE; 224 csc->sc_bar_reg = RTK_PCI_LOIO; 225 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 226 } 227 #else 228 if (Cardbus_mapreg_map(ct, RTK_PCI_LOMEM, CARDBUS_MAPREG_TYPE_MEM, 0, 229 &sc->rtk_btag, &sc->rtk_bhandle, &adr, &csc->sc_mapsize) == 0) { 230 #if rbus 231 #else 232 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 233 #endif 234 csc->sc_cben = CARDBUS_MEM_ENABLE; 235 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE; 236 csc->sc_bar_reg = RTK_PCI_LOMEM; 237 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; 238 } 239 #endif 240 else { 241 printf("%s: unable to map deviceregisters\n", 242 sc->sc_dev.dv_xname); 243 return; 244 } 245 /* 246 * Handle power management nonsense and initialize the 247 * configuration registers. 248 */ 249 rtk_cardbus_setup(csc); 250 sc->rtk_type = t->rtk_basetype; 251 252 rtk_attach(sc); 253 254 /* 255 * Power down the socket. 256 */ 257 Cardbus_function_disable(csc->sc_ct); 258 } 259 260 int 261 rtk_cardbus_detach(struct device *self, int flags __unused) 262 { 263 struct rtk_cardbus_softc *csc = device_private(self); 264 struct rtk_softc *sc = &csc->sc_rtk; 265 struct cardbus_devfunc *ct = csc->sc_ct; 266 int rv; 267 268 #ifdef DIAGNOSTIC 269 if (ct == NULL) 270 panic("%s: data structure lacks", sc->sc_dev.dv_xname); 271 #endif 272 rv = rtk_detach(sc); 273 if (rv) 274 return (rv); 275 /* 276 * Unhook the interrupt handler. 277 */ 278 if (csc->sc_ih != NULL) 279 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih); 280 281 /* 282 * Release bus space and close window. 283 */ 284 if (csc->sc_bar_reg != 0) 285 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 286 sc->rtk_btag, sc->rtk_bhandle, csc->sc_mapsize); 287 288 return (0); 289 } 290 291 void 292 rtk_cardbus_setup(csc) 293 struct rtk_cardbus_softc *csc; 294 { 295 struct rtk_softc *sc = &csc->sc_rtk; 296 cardbus_devfunc_t ct = csc->sc_ct; 297 cardbus_chipset_tag_t cc = ct->ct_cc; 298 cardbus_function_tag_t cf = ct->ct_cf; 299 pcireg_t reg,command; 300 int pmreg; 301 302 /* 303 * Handle power management nonsense. 304 */ 305 if (cardbus_get_capability(cc, cf, csc->sc_tag, 306 PCI_CAP_PWRMGMT, &pmreg, 0)) { 307 command = cardbus_conf_read(cc, cf, csc->sc_tag, 308 pmreg + PCI_PMCSR); 309 if (command & PCI_PMCSR_STATE_MASK) { 310 pcireg_t iobase, membase, irq; 311 312 /* Save important PCI config data. */ 313 iobase = cardbus_conf_read(cc, cf, csc->sc_tag, 314 RTK_PCI_LOIO); 315 membase = cardbus_conf_read(cc, cf,csc->sc_tag, 316 RTK_PCI_LOMEM); 317 irq = cardbus_conf_read(cc, cf,csc->sc_tag, 318 CARDBUS_INTERRUPT_REG); 319 320 /* Reset the power state. */ 321 printf("%s: chip is in D%d power mode " 322 "-- setting to D0\n", sc->sc_dev.dv_xname, 323 command & PCI_PMCSR_STATE_MASK); 324 command &= ~PCI_PMCSR_STATE_MASK; 325 cardbus_conf_write(cc, cf, csc->sc_tag, 326 pmreg + PCI_PMCSR, command); 327 328 /* Restore PCI config data. */ 329 cardbus_conf_write(cc, cf, csc->sc_tag, 330 RTK_PCI_LOIO, iobase); 331 cardbus_conf_write(cc, cf, csc->sc_tag, 332 RTK_PCI_LOMEM, membase); 333 cardbus_conf_write(cc, cf, csc->sc_tag, 334 CARDBUS_INTERRUPT_REG, irq); 335 } 336 } 337 338 /* Program the BAR */ 339 cardbus_conf_write(cc, cf, csc->sc_tag, 340 csc->sc_bar_reg, csc->sc_bar_val); 341 342 /* Make sure the right access type is on the CardBus bridge. */ 343 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben); 344 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 345 346 /* Enable the appropriate bits in the CARDBUS CSR. */ 347 reg = cardbus_conf_read(cc, cf, csc->sc_tag, 348 CARDBUS_COMMAND_STATUS_REG); 349 reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE); 350 reg |= csc->sc_csr; 351 cardbus_conf_write(cc, cf, csc->sc_tag, 352 CARDBUS_COMMAND_STATUS_REG, reg); 353 354 /* 355 * Make sure the latency timer is set to some reasonable 356 * value. 357 */ 358 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG); 359 if (CARDBUS_LATTIMER(reg) < 0x20) { 360 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT); 361 reg |= (0x20 << CARDBUS_LATTIMER_SHIFT); 362 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg); 363 } 364 } 365 366 int 367 rtk_cardbus_enable(sc) 368 struct rtk_softc *sc; 369 { 370 struct rtk_cardbus_softc *csc = (void *) sc; 371 cardbus_devfunc_t ct = csc->sc_ct; 372 cardbus_chipset_tag_t cc = ct->ct_cc; 373 cardbus_function_tag_t cf = ct->ct_cf; 374 375 /* 376 * Power on the socket. 377 */ 378 Cardbus_function_enable(ct); 379 380 /* 381 * Set up the PCI configuration registers. 382 */ 383 rtk_cardbus_setup(csc); 384 385 /* 386 * Map and establish the interrupt. 387 */ 388 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, 389 IPL_NET, rtk_intr, sc); 390 if (csc->sc_ih == NULL) { 391 printf("%s: unable to establish interrupt at %d\n", 392 sc->sc_dev.dv_xname, csc->sc_intrline); 393 Cardbus_function_disable(csc->sc_ct); 394 return (1); 395 } 396 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname, 397 csc->sc_intrline); 398 return (0); 399 } 400 401 void 402 rtk_cardbus_disable(sc) 403 struct rtk_softc *sc; 404 { 405 struct rtk_cardbus_softc *csc = (void *) sc; 406 cardbus_devfunc_t ct = csc->sc_ct; 407 cardbus_chipset_tag_t cc = ct->ct_cc; 408 cardbus_function_tag_t cf = ct->ct_cf; 409 410 /* Unhook the interrupt handler. */ 411 cardbus_intr_disestablish(cc, cf, csc->sc_ih); 412 csc->sc_ih = NULL; 413 414 /* Power down the socket. */ 415 Cardbus_function_disable(ct); 416 } 417 418 void 419 rtk_cardbus_power(sc, why) 420 struct rtk_softc *sc; 421 int why; 422 { 423 struct rtk_cardbus_softc *csc = (void *) sc; 424 425 if (why == PWR_RESUME) { 426 /* 427 * Give the PCI configuration registers a kick 428 * in the head. 429 */ 430 #ifdef DIAGNOSTIC 431 if (RTK_IS_ENABLED(sc) == 0) 432 panic("rtk_cardbus_power"); 433 #endif 434 rtk_cardbus_setup(csc); 435 } 436 } 437
Indexes created Fri Oct 03 02:09:57 GMT 2025