if_rtk_cardbus.c revision 1.45
1 /* $NetBSD: if_rtk_cardbus.c,v 1.45 2010/07/27 21:05:04 jakllsch Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Masanori Kanaoka 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * if_rtk_cardbus.c: 32 * Cardbus specific routines for Realtek 8139 ethernet adapter. 33 * Tested for 34 * - elecom-Laneed LD-10/100CBA (Accton MPX5030) 35 * - MELCO LPC3-TX-CB (Realtek 8139) 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_rtk_cardbus.c,v 1.45 2010/07/27 21:05:04 jakllsch Exp $"); 40 41 #include "opt_inet.h" 42 #include "rnd.h" 43 44 #include <sys/param.h> 45 #include <sys/systm.h> 46 #include <sys/callout.h> 47 #include <sys/device.h> 48 #include <sys/sockio.h> 49 #include <sys/mbuf.h> 50 #include <sys/malloc.h> 51 #include <sys/kernel.h> 52 #include <sys/socket.h> 53 54 #include <net/if.h> 55 #include <net/if_arp.h> 56 #include <net/if_ether.h> 57 #include <net/if_dl.h> 58 #include <net/if_media.h> 59 #ifdef INET 60 #include <netinet/in.h> 61 #include <netinet/if_inarp.h> 62 #endif 63 64 #if NRND > 0 65 #include <sys/rnd.h> 66 #endif 67 68 #include <sys/bus.h> 69 70 #include <dev/pci/pcireg.h> 71 #include <dev/pci/pcivar.h> 72 #include <dev/pci/pcidevs.h> 73 74 #include <dev/cardbus/cardbusvar.h> 75 #include <dev/pci/pcidevs.h> 76 77 #include <dev/mii/mii.h> 78 #include <dev/mii/miivar.h> 79 80 /* 81 * Default to using PIO access for this driver. On SMP systems, 82 * there appear to be problems with memory mapped mode: it looks like 83 * doing too many memory mapped access back to back in rapid succession 84 * can hang the bus. I'm inclined to blame this on crummy design/construction 85 * on the part of Realtek. Memory mapped mode does appear to work on 86 * uniprocessor systems though. 87 */ 88 #define RTK_USEIOSPACE 89 90 #include <dev/ic/rtl81x9reg.h> 91 #include <dev/ic/rtl81x9var.h> 92 93 /* 94 * Various supported device vendors/types and their names. 95 */ 96 static const struct rtk_type rtk_cardbus_devs[] = { 97 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_MPX5030, 98 RTK_8139, "Accton MPX 5030/5038 10/100BaseTX" }, 99 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DFE690TXD, 100 RTK_8139, "D-Link DFE-690TXD 10/100BaseTX" }, 101 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8138, 102 RTK_8139, "Realtek 8138 10/100BaseTX" }, 103 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139, 104 RTK_8139, "Realtek 8139 10/100BaseTX" }, 105 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_CB_TXD, 106 RTK_8139, "Corega FEther CB-TXD 10/100BaseTX" }, 107 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_2CB_TXD, 108 RTK_8139, "Corega FEther II CB-TXD 10/100BaseTX" }, 109 { PCI_VENDOR_PLANEX, PCI_PRODUCT_PLANEX_FNW_3603_TX, 110 RTK_8139, "Planex FNW-3603 10/100BaseTX" }, 111 { PCI_VENDOR_PLANEX, PCI_PRODUCT_PLANEX_FNW_3800_TX, 112 RTK_8139, "Planex 10/100BaseTX FNW-3800-TX" }, 113 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2000VX, 114 RTK_8139, "AboCom FE2000VX 10/100BaseTX" }, 115 116 { 0, 0, 0, NULL } 117 }; 118 119 static int rtk_cardbus_match(device_t, cfdata_t, void *); 120 static void rtk_cardbus_attach(device_t, device_t, void *); 121 static int rtk_cardbus_detach(device_t, int); 122 123 struct rtk_cardbus_softc { 124 struct rtk_softc sc_rtk; /* real rtk softc */ 125 126 /* CardBus-specific goo. */ 127 void *sc_ih; 128 cardbus_devfunc_t sc_ct; 129 pcitag_t sc_tag; 130 pcireg_t sc_csr; 131 int sc_bar_reg; 132 pcireg_t sc_bar_val; 133 cardbus_intr_line_t sc_intrline; 134 }; 135 136 CFATTACH_DECL_NEW(rtk_cardbus, sizeof(struct rtk_cardbus_softc), 137 rtk_cardbus_match, rtk_cardbus_attach, rtk_cardbus_detach, rtk_activate); 138 139 const struct rtk_type *rtk_cardbus_lookup(const struct cardbus_attach_args *); 140 141 void rtk_cardbus_setup(struct rtk_cardbus_softc *); 142 143 int rtk_cardbus_enable(struct rtk_softc *); 144 void rtk_cardbus_disable(struct rtk_softc *); 145 void rtk_cardbus_power(struct rtk_softc *, int); 146 147 const struct rtk_type * 148 rtk_cardbus_lookup(const struct cardbus_attach_args *ca) 149 { 150 const struct rtk_type *t; 151 152 for (t = rtk_cardbus_devs; t->rtk_name != NULL; t++){ 153 if (PCI_VENDOR(ca->ca_id) == t->rtk_vid && 154 PCI_PRODUCT(ca->ca_id) == t->rtk_did) { 155 return t; 156 } 157 } 158 return NULL; 159 } 160 161 int 162 rtk_cardbus_match(device_t parent, cfdata_t cf, void *aux) 163 { 164 struct cardbus_attach_args *ca = aux; 165 166 if (rtk_cardbus_lookup(ca) != NULL) 167 return 1; 168 169 return 0; 170 } 171 172 173 void 174 rtk_cardbus_attach(device_t parent, device_t self, void *aux) 175 { 176 struct rtk_cardbus_softc *csc = device_private(self); 177 struct rtk_softc *sc = &csc->sc_rtk; 178 struct cardbus_attach_args *ca = aux; 179 cardbus_devfunc_t ct = ca->ca_ct; 180 const struct rtk_type *t; 181 bus_addr_t adr; 182 183 sc->sc_dev = self; 184 sc->sc_dmat = ca->ca_dmat; 185 csc->sc_ct = ct; 186 csc->sc_tag = ca->ca_tag; 187 csc->sc_intrline = ca->ca_intrline; 188 189 t = rtk_cardbus_lookup(ca); 190 if (t == NULL) { 191 aprint_error("\n"); 192 panic("%s: impossible", __func__); 193 } 194 aprint_normal(": %s\n", t->rtk_name); 195 196 /* 197 * Power management hooks. 198 */ 199 sc->sc_enable = rtk_cardbus_enable; 200 sc->sc_disable = rtk_cardbus_disable; 201 202 /* 203 * Map control/status registers. 204 */ 205 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE; 206 #ifdef RTK_USEIOSPACE 207 if (Cardbus_mapreg_map(ct, RTK_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0, 208 &sc->rtk_btag, &sc->rtk_bhandle, &adr, &sc->rtk_bsize) == 0) { 209 csc->sc_csr |= PCI_COMMAND_IO_ENABLE; 210 csc->sc_bar_reg = RTK_PCI_LOIO; 211 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_IO; 212 } 213 #else 214 if (Cardbus_mapreg_map(ct, RTK_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0, 215 &sc->rtk_btag, &sc->rtk_bhandle, &adr, &sc->rtk_bsize) == 0) { 216 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE; 217 csc->sc_bar_reg = RTK_PCI_LOMEM; 218 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_MEM; 219 } 220 #endif 221 else { 222 aprint_error_dev(self, " unable to map deviceregisters\n"); 223 return; 224 } 225 /* 226 * Handle power management nonsense and initialize the 227 * configuration registers. 228 */ 229 rtk_cardbus_setup(csc); 230 231 rtk_attach(sc); 232 233 if (pmf_device_register(self, NULL, NULL)) 234 pmf_class_network_register(self, &sc->ethercom.ec_if); 235 else 236 aprint_error_dev(self, "couldn't establish power handler\n"); 237 238 /* 239 * Power down the socket. 240 */ 241 Cardbus_function_disable(csc->sc_ct); 242 } 243 244 int 245 rtk_cardbus_detach(device_t self, int flags) 246 { 247 struct rtk_cardbus_softc *csc = device_private(self); 248 struct rtk_softc *sc = &csc->sc_rtk; 249 struct cardbus_devfunc *ct = csc->sc_ct; 250 int rv; 251 252 #ifdef DIAGNOSTIC 253 if (ct == NULL) 254 panic("%s: data structure lacks", device_xname(self)); 255 #endif 256 rv = rtk_detach(sc); 257 if (rv) 258 return rv; 259 /* 260 * Unhook the interrupt handler. 261 */ 262 if (csc->sc_ih != NULL) 263 Cardbus_intr_disestablish(ct, csc->sc_ih); 264 265 /* 266 * Release bus space and close window. 267 */ 268 if (csc->sc_bar_reg != 0) 269 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 270 sc->rtk_btag, sc->rtk_bhandle, sc->rtk_bsize); 271 272 return 0; 273 } 274 275 void 276 rtk_cardbus_setup(struct rtk_cardbus_softc *csc) 277 { 278 struct rtk_softc *sc = &csc->sc_rtk; 279 cardbus_devfunc_t ct = csc->sc_ct; 280 cardbus_chipset_tag_t cc = ct->ct_cc; 281 cardbus_function_tag_t cf = ct->ct_cf; 282 pcireg_t reg, command; 283 int pmreg; 284 285 /* 286 * Handle power management nonsense. 287 */ 288 if (cardbus_get_capability(cc, cf, csc->sc_tag, 289 PCI_CAP_PWRMGMT, &pmreg, 0)) { 290 command = Cardbus_conf_read(ct, csc->sc_tag, 291 pmreg + PCI_PMCSR); 292 if (command & PCI_PMCSR_STATE_MASK) { 293 pcireg_t iobase, membase, irq; 294 295 /* Save important PCI config data. */ 296 iobase = Cardbus_conf_read(ct, csc->sc_tag, 297 RTK_PCI_LOIO); 298 membase = Cardbus_conf_read(ct, csc->sc_tag, 299 RTK_PCI_LOMEM); 300 irq = Cardbus_conf_read(ct, csc->sc_tag, 301 PCI_INTERRUPT_REG); 302 303 /* Reset the power state. */ 304 aprint_normal_dev(sc->sc_dev, 305 "chip is in D%d power mode -- setting to D0\n", 306 command & PCI_PMCSR_STATE_MASK); 307 command &= ~PCI_PMCSR_STATE_MASK; 308 Cardbus_conf_write(ct, csc->sc_tag, 309 pmreg + PCI_PMCSR, command); 310 311 /* Restore PCI config data. */ 312 Cardbus_conf_write(ct, csc->sc_tag, 313 RTK_PCI_LOIO, iobase); 314 Cardbus_conf_write(ct, csc->sc_tag, 315 RTK_PCI_LOMEM, membase); 316 Cardbus_conf_write(ct, csc->sc_tag, 317 PCI_INTERRUPT_REG, irq); 318 } 319 } 320 321 /* Program the BAR */ 322 Cardbus_conf_write(ct, csc->sc_tag, csc->sc_bar_reg, csc->sc_bar_val); 323 324 /* Enable the appropriate bits in the CARDBUS CSR. */ 325 reg = Cardbus_conf_read(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG); 326 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 327 reg |= csc->sc_csr; 328 Cardbus_conf_write(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg); 329 330 /* 331 * Make sure the latency timer is set to some reasonable 332 * value. 333 */ 334 reg = Cardbus_conf_read(ct, csc->sc_tag, PCI_BHLC_REG); 335 if (PCI_LATTIMER(reg) < 0x20) { 336 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 337 reg |= (0x20 << PCI_LATTIMER_SHIFT); 338 Cardbus_conf_write(ct, csc->sc_tag, PCI_BHLC_REG, reg); 339 } 340 } 341 342 int 343 rtk_cardbus_enable(struct rtk_softc *sc) 344 { 345 struct rtk_cardbus_softc *csc = (struct rtk_cardbus_softc *)sc; 346 cardbus_devfunc_t ct = csc->sc_ct; 347 348 /* 349 * Power on the socket. 350 */ 351 Cardbus_function_enable(ct); 352 353 /* 354 * Set up the PCI configuration registers. 355 */ 356 rtk_cardbus_setup(csc); 357 358 /* 359 * Map and establish the interrupt. 360 */ 361 csc->sc_ih = Cardbus_intr_establish(ct, csc->sc_intrline, 362 IPL_NET, rtk_intr, sc); 363 if (csc->sc_ih == NULL) { 364 aprint_error_dev(sc->sc_dev, 365 "unable to establish interrupt\n"); 366 Cardbus_function_disable(csc->sc_ct); 367 return 1; 368 } 369 return 0; 370 } 371 372 void 373 rtk_cardbus_disable(struct rtk_softc *sc) 374 { 375 struct rtk_cardbus_softc *csc = (struct rtk_cardbus_softc *)sc; 376 cardbus_devfunc_t ct = csc->sc_ct; 377 378 /* Unhook the interrupt handler. */ 379 Cardbus_intr_disestablish(ct, csc->sc_ih); 380 csc->sc_ih = NULL; 381 382 /* Power down the socket. */ 383 Cardbus_function_disable(ct); 384 } 385
Indexes created Fri Oct 03 02:09:57 GMT 2025