if_rtk_cardbus.c revision 1.46.2.1
1 /* $NetBSD: if_rtk_cardbus.c,v 1.46.2.1 2012/04/17 00:07:29 yamt Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Masanori Kanaoka 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * if_rtk_cardbus.c: 32 * Cardbus specific routines for Realtek 8139 ethernet adapter. 33 * Tested for 34 * - elecom-Laneed LD-10/100CBA (Accton MPX5030) 35 * - MELCO LPC3-TX-CB (Realtek 8139) 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_rtk_cardbus.c,v 1.46.2.1 2012/04/17 00:07:29 yamt Exp $"); 40 41 #include "opt_inet.h" 42 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/callout.h> 46 #include <sys/device.h> 47 #include <sys/sockio.h> 48 #include <sys/mbuf.h> 49 #include <sys/malloc.h> 50 #include <sys/kernel.h> 51 #include <sys/socket.h> 52 53 #include <net/if.h> 54 #include <net/if_arp.h> 55 #include <net/if_ether.h> 56 #include <net/if_dl.h> 57 #include <net/if_media.h> 58 #ifdef INET 59 #include <netinet/in.h> 60 #include <netinet/if_inarp.h> 61 #endif 62 63 #include <sys/rnd.h> 64 65 #include <sys/bus.h> 66 67 #include <dev/pci/pcireg.h> 68 #include <dev/pci/pcivar.h> 69 #include <dev/pci/pcidevs.h> 70 71 #include <dev/cardbus/cardbusvar.h> 72 #include <dev/pci/pcidevs.h> 73 74 #include <dev/mii/mii.h> 75 #include <dev/mii/miivar.h> 76 77 /* 78 * Default to using PIO access for this driver. On SMP systems, 79 * there appear to be problems with memory mapped mode: it looks like 80 * doing too many memory mapped access back to back in rapid succession 81 * can hang the bus. I'm inclined to blame this on crummy design/construction 82 * on the part of Realtek. Memory mapped mode does appear to work on 83 * uniprocessor systems though. 84 */ 85 #define RTK_USEIOSPACE 86 87 #include <dev/ic/rtl81x9reg.h> 88 #include <dev/ic/rtl81x9var.h> 89 90 /* 91 * Various supported device vendors/types and their names. 92 */ 93 static const struct rtk_type rtk_cardbus_devs[] = { 94 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_MPX5030, 95 RTK_8139, "Accton MPX 5030/5038 10/100BaseTX" }, 96 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DFE690TXD, 97 RTK_8139, "D-Link DFE-690TXD 10/100BaseTX" }, 98 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8138, 99 RTK_8139, "Realtek 8138 10/100BaseTX" }, 100 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139, 101 RTK_8139, "Realtek 8139 10/100BaseTX" }, 102 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_CB_TXD, 103 RTK_8139, "Corega FEther CB-TXD 10/100BaseTX" }, 104 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_2CB_TXD, 105 RTK_8139, "Corega FEther II CB-TXD 10/100BaseTX" }, 106 { PCI_VENDOR_PLANEX, PCI_PRODUCT_PLANEX_FNW_3603_TX, 107 RTK_8139, "Planex FNW-3603 10/100BaseTX" }, 108 { PCI_VENDOR_PLANEX, PCI_PRODUCT_PLANEX_FNW_3800_TX, 109 RTK_8139, "Planex 10/100BaseTX FNW-3800-TX" }, 110 { PCI_VENDOR_ABOCOM, PCI_PRODUCT_ABOCOM_FE2000VX, 111 RTK_8139, "AboCom FE2000VX 10/100BaseTX" }, 112 113 { 0, 0, 0, NULL } 114 }; 115 116 static int rtk_cardbus_match(device_t, cfdata_t, void *); 117 static void rtk_cardbus_attach(device_t, device_t, void *); 118 static int rtk_cardbus_detach(device_t, int); 119 120 struct rtk_cardbus_softc { 121 struct rtk_softc sc_rtk; /* real rtk softc */ 122 123 /* CardBus-specific goo. */ 124 void *sc_ih; 125 cardbus_devfunc_t sc_ct; 126 pcitag_t sc_tag; 127 pcireg_t sc_csr; 128 int sc_bar_reg; 129 pcireg_t sc_bar_val; 130 }; 131 132 CFATTACH_DECL_NEW(rtk_cardbus, sizeof(struct rtk_cardbus_softc), 133 rtk_cardbus_match, rtk_cardbus_attach, rtk_cardbus_detach, rtk_activate); 134 135 const struct rtk_type *rtk_cardbus_lookup(const struct cardbus_attach_args *); 136 137 void rtk_cardbus_setup(struct rtk_cardbus_softc *); 138 139 int rtk_cardbus_enable(struct rtk_softc *); 140 void rtk_cardbus_disable(struct rtk_softc *); 141 void rtk_cardbus_power(struct rtk_softc *, int); 142 143 const struct rtk_type * 144 rtk_cardbus_lookup(const struct cardbus_attach_args *ca) 145 { 146 const struct rtk_type *t; 147 148 for (t = rtk_cardbus_devs; t->rtk_name != NULL; t++){ 149 if (PCI_VENDOR(ca->ca_id) == t->rtk_vid && 150 PCI_PRODUCT(ca->ca_id) == t->rtk_did) { 151 return t; 152 } 153 } 154 return NULL; 155 } 156 157 int 158 rtk_cardbus_match(device_t parent, cfdata_t cf, void *aux) 159 { 160 struct cardbus_attach_args *ca = aux; 161 162 if (rtk_cardbus_lookup(ca) != NULL) 163 return 1; 164 165 return 0; 166 } 167 168 169 void 170 rtk_cardbus_attach(device_t parent, device_t self, void *aux) 171 { 172 struct rtk_cardbus_softc *csc = device_private(self); 173 struct rtk_softc *sc = &csc->sc_rtk; 174 struct cardbus_attach_args *ca = aux; 175 cardbus_devfunc_t ct = ca->ca_ct; 176 const struct rtk_type *t; 177 bus_addr_t adr; 178 179 sc->sc_dev = self; 180 sc->sc_dmat = ca->ca_dmat; 181 csc->sc_ct = ct; 182 csc->sc_tag = ca->ca_tag; 183 184 t = rtk_cardbus_lookup(ca); 185 if (t == NULL) { 186 aprint_error("\n"); 187 panic("%s: impossible", __func__); 188 } 189 aprint_normal(": %s\n", t->rtk_name); 190 191 /* 192 * Power management hooks. 193 */ 194 sc->sc_enable = rtk_cardbus_enable; 195 sc->sc_disable = rtk_cardbus_disable; 196 197 /* 198 * Map control/status registers. 199 */ 200 csc->sc_csr = PCI_COMMAND_MASTER_ENABLE; 201 #ifdef RTK_USEIOSPACE 202 if (Cardbus_mapreg_map(ct, RTK_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0, 203 &sc->rtk_btag, &sc->rtk_bhandle, &adr, &sc->rtk_bsize) == 0) { 204 csc->sc_csr |= PCI_COMMAND_IO_ENABLE; 205 csc->sc_bar_reg = RTK_PCI_LOIO; 206 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_IO; 207 } 208 #else 209 if (Cardbus_mapreg_map(ct, RTK_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0, 210 &sc->rtk_btag, &sc->rtk_bhandle, &adr, &sc->rtk_bsize) == 0) { 211 csc->sc_csr |= PCI_COMMAND_MEM_ENABLE; 212 csc->sc_bar_reg = RTK_PCI_LOMEM; 213 csc->sc_bar_val = adr | PCI_MAPREG_TYPE_MEM; 214 } 215 #endif 216 else { 217 aprint_error_dev(self, " unable to map deviceregisters\n"); 218 return; 219 } 220 /* 221 * Handle power management nonsense and initialize the 222 * configuration registers. 223 */ 224 rtk_cardbus_setup(csc); 225 226 rtk_attach(sc); 227 228 if (pmf_device_register(self, NULL, NULL)) 229 pmf_class_network_register(self, &sc->ethercom.ec_if); 230 else 231 aprint_error_dev(self, "couldn't establish power handler\n"); 232 233 /* 234 * Power down the socket. 235 */ 236 Cardbus_function_disable(csc->sc_ct); 237 } 238 239 int 240 rtk_cardbus_detach(device_t self, int flags) 241 { 242 struct rtk_cardbus_softc *csc = device_private(self); 243 struct rtk_softc *sc = &csc->sc_rtk; 244 struct cardbus_devfunc *ct = csc->sc_ct; 245 int rv; 246 247 #ifdef DIAGNOSTIC 248 if (ct == NULL) 249 panic("%s: data structure lacks", device_xname(self)); 250 #endif 251 rv = rtk_detach(sc); 252 if (rv) 253 return rv; 254 /* 255 * Unhook the interrupt handler. 256 */ 257 if (csc->sc_ih != NULL) 258 Cardbus_intr_disestablish(ct, csc->sc_ih); 259 260 /* 261 * Release bus space and close window. 262 */ 263 if (csc->sc_bar_reg != 0) 264 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 265 sc->rtk_btag, sc->rtk_bhandle, sc->rtk_bsize); 266 267 return 0; 268 } 269 270 void 271 rtk_cardbus_setup(struct rtk_cardbus_softc *csc) 272 { 273 struct rtk_softc *sc = &csc->sc_rtk; 274 cardbus_devfunc_t ct = csc->sc_ct; 275 cardbus_chipset_tag_t cc = ct->ct_cc; 276 cardbus_function_tag_t cf = ct->ct_cf; 277 pcireg_t reg, command; 278 int pmreg; 279 280 /* 281 * Handle power management nonsense. 282 */ 283 if (cardbus_get_capability(cc, cf, csc->sc_tag, 284 PCI_CAP_PWRMGMT, &pmreg, 0)) { 285 command = Cardbus_conf_read(ct, csc->sc_tag, 286 pmreg + PCI_PMCSR); 287 if (command & PCI_PMCSR_STATE_MASK) { 288 pcireg_t iobase, membase, irq; 289 290 /* Save important PCI config data. */ 291 iobase = Cardbus_conf_read(ct, csc->sc_tag, 292 RTK_PCI_LOIO); 293 membase = Cardbus_conf_read(ct, csc->sc_tag, 294 RTK_PCI_LOMEM); 295 irq = Cardbus_conf_read(ct, csc->sc_tag, 296 PCI_INTERRUPT_REG); 297 298 /* Reset the power state. */ 299 aprint_normal_dev(sc->sc_dev, 300 "chip is in D%d power mode -- setting to D0\n", 301 command & PCI_PMCSR_STATE_MASK); 302 command &= ~PCI_PMCSR_STATE_MASK; 303 Cardbus_conf_write(ct, csc->sc_tag, 304 pmreg + PCI_PMCSR, command); 305 306 /* Restore PCI config data. */ 307 Cardbus_conf_write(ct, csc->sc_tag, 308 RTK_PCI_LOIO, iobase); 309 Cardbus_conf_write(ct, csc->sc_tag, 310 RTK_PCI_LOMEM, membase); 311 Cardbus_conf_write(ct, csc->sc_tag, 312 PCI_INTERRUPT_REG, irq); 313 } 314 } 315 316 /* Program the BAR */ 317 Cardbus_conf_write(ct, csc->sc_tag, csc->sc_bar_reg, csc->sc_bar_val); 318 319 /* Enable the appropriate bits in the CARDBUS CSR. */ 320 reg = Cardbus_conf_read(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG); 321 reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 322 reg |= csc->sc_csr; 323 Cardbus_conf_write(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg); 324 325 /* 326 * Make sure the latency timer is set to some reasonable 327 * value. 328 */ 329 reg = Cardbus_conf_read(ct, csc->sc_tag, PCI_BHLC_REG); 330 if (PCI_LATTIMER(reg) < 0x20) { 331 reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 332 reg |= (0x20 << PCI_LATTIMER_SHIFT); 333 Cardbus_conf_write(ct, csc->sc_tag, PCI_BHLC_REG, reg); 334 } 335 } 336 337 int 338 rtk_cardbus_enable(struct rtk_softc *sc) 339 { 340 struct rtk_cardbus_softc *csc = (struct rtk_cardbus_softc *)sc; 341 cardbus_devfunc_t ct = csc->sc_ct; 342 343 /* 344 * Power on the socket. 345 */ 346 Cardbus_function_enable(ct); 347 348 /* 349 * Set up the PCI configuration registers. 350 */ 351 rtk_cardbus_setup(csc); 352 353 /* 354 * Map and establish the interrupt. 355 */ 356 csc->sc_ih = Cardbus_intr_establish(ct, IPL_NET, rtk_intr, sc); 357 if (csc->sc_ih == NULL) { 358 aprint_error_dev(sc->sc_dev, 359 "unable to establish interrupt\n"); 360 Cardbus_function_disable(csc->sc_ct); 361 return 1; 362 } 363 return 0; 364 } 365 366 void 367 rtk_cardbus_disable(struct rtk_softc *sc) 368 { 369 struct rtk_cardbus_softc *csc = (struct rtk_cardbus_softc *)sc; 370 cardbus_devfunc_t ct = csc->sc_ct; 371 372 /* Unhook the interrupt handler. */ 373 Cardbus_intr_disestablish(ct, csc->sc_ih); 374 csc->sc_ih = NULL; 375 376 /* Power down the socket. */ 377 Cardbus_function_disable(ct); 378 } 379
Indexes created Sun Oct 19 02:09:48 GMT 2025