if_rtw_cardbus.c revision 1.10 1 1.10 thorpej /* $NetBSD: if_rtw_cardbus.c,v 1.10 2006/03/29 06:22:38 thorpej Exp $ */
2 1.1 dyoung
3 1.1 dyoung /*-
4 1.1 dyoung * Copyright (c) 2004, 2005 David Young. All rights reserved.
5 1.1 dyoung *
6 1.1 dyoung * Adapted for the RTL8180 by David Young.
7 1.1 dyoung *
8 1.1 dyoung * Redistribution and use in source and binary forms, with or without
9 1.1 dyoung * modification, are permitted provided that the following conditions
10 1.1 dyoung * are met:
11 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
12 1.1 dyoung * notice, this list of conditions and the following disclaimer.
13 1.1 dyoung * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 dyoung * notice, this list of conditions and the following disclaimer in the
15 1.1 dyoung * documentation and/or other materials provided with the distribution.
16 1.1 dyoung * 3. The name of David Young may not be used to endorse or promote
17 1.1 dyoung * products derived from this software without specific prior
18 1.1 dyoung * written permission.
19 1.1 dyoung *
20 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
21 1.1 dyoung * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 1.1 dyoung * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
23 1.1 dyoung * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
24 1.1 dyoung * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 1.1 dyoung * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
26 1.1 dyoung * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 dyoung * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 1.1 dyoung * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 1.1 dyoung * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 1.1 dyoung * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31 1.1 dyoung * OF SUCH DAMAGE.
32 1.1 dyoung */
33 1.1 dyoung /*-
34 1.1 dyoung * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
35 1.1 dyoung * All rights reserved.
36 1.1 dyoung *
37 1.1 dyoung * This code is derived from software contributed to The NetBSD Foundation
38 1.1 dyoung * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
39 1.1 dyoung * NASA Ames Research Center.
40 1.1 dyoung *
41 1.1 dyoung * Redistribution and use in source and binary forms, with or without
42 1.1 dyoung * modification, are permitted provided that the following conditions
43 1.1 dyoung * are met:
44 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
45 1.1 dyoung * notice, this list of conditions and the following disclaimer.
46 1.1 dyoung * 2. Redistributions in binary form must reproduce the above copyright
47 1.1 dyoung * notice, this list of conditions and the following disclaimer in the
48 1.1 dyoung * documentation and/or other materials provided with the distribution.
49 1.1 dyoung * 3. All advertising materials mentioning features or use of this software
50 1.1 dyoung * must display the following acknowledgement:
51 1.1 dyoung * This product includes software developed by the NetBSD
52 1.1 dyoung * Foundation, Inc. and its contributors.
53 1.1 dyoung * 4. Neither the name of The NetBSD Foundation nor the names of its
54 1.1 dyoung * contributors may be used to endorse or promote products derived
55 1.1 dyoung * from this software without specific prior written permission.
56 1.1 dyoung *
57 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
58 1.1 dyoung * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
59 1.1 dyoung * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
60 1.1 dyoung * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
61 1.1 dyoung * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
62 1.1 dyoung * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
63 1.1 dyoung * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
64 1.1 dyoung * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
65 1.1 dyoung * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
66 1.1 dyoung * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
67 1.1 dyoung * POSSIBILITY OF SUCH DAMAGE.
68 1.1 dyoung */
69 1.1 dyoung
70 1.1 dyoung /*
71 1.1 dyoung * Cardbus front-end for the Realtek RTL8180 802.11 MAC/BBP driver.
72 1.1 dyoung *
73 1.1 dyoung * TBD factor with atw, tlp Cardbus front-ends?
74 1.1 dyoung */
75 1.1 dyoung
76 1.1 dyoung #include <sys/cdefs.h>
77 1.10 thorpej __KERNEL_RCSID(0, "$NetBSD: if_rtw_cardbus.c,v 1.10 2006/03/29 06:22:38 thorpej Exp $");
78 1.1 dyoung
79 1.1 dyoung #include "opt_inet.h"
80 1.1 dyoung #include "opt_ns.h"
81 1.1 dyoung #include "bpfilter.h"
82 1.1 dyoung
83 1.1 dyoung #include <sys/param.h>
84 1.6 perry #include <sys/systm.h>
85 1.6 perry #include <sys/mbuf.h>
86 1.1 dyoung #include <sys/malloc.h>
87 1.1 dyoung #include <sys/kernel.h>
88 1.1 dyoung #include <sys/socket.h>
89 1.1 dyoung #include <sys/ioctl.h>
90 1.1 dyoung #include <sys/errno.h>
91 1.1 dyoung #include <sys/device.h>
92 1.1 dyoung
93 1.1 dyoung #include <machine/endian.h>
94 1.6 perry
95 1.1 dyoung #include <net/if.h>
96 1.1 dyoung #include <net/if_dl.h>
97 1.1 dyoung #include <net/if_media.h>
98 1.1 dyoung #include <net/if_ether.h>
99 1.1 dyoung
100 1.7 dyoung #include <net80211/ieee80211_netbsd.h>
101 1.1 dyoung #include <net80211/ieee80211_radiotap.h>
102 1.1 dyoung #include <net80211/ieee80211_var.h>
103 1.1 dyoung
104 1.6 perry #if NBPFILTER > 0
105 1.1 dyoung #include <net/bpf.h>
106 1.6 perry #endif
107 1.1 dyoung
108 1.1 dyoung #ifdef INET
109 1.6 perry #include <netinet/in.h>
110 1.1 dyoung #include <netinet/if_inarp.h>
111 1.1 dyoung #endif
112 1.1 dyoung
113 1.1 dyoung #ifdef NS
114 1.1 dyoung #include <netns/ns.h>
115 1.1 dyoung #include <netns/ns_if.h>
116 1.1 dyoung #endif
117 1.1 dyoung
118 1.1 dyoung #include <machine/bus.h>
119 1.1 dyoung #include <machine/intr.h>
120 1.1 dyoung
121 1.1 dyoung #include <dev/ic/rtwreg.h>
122 1.1 dyoung #include <dev/ic/rtwvar.h>
123 1.1 dyoung
124 1.1 dyoung #include <dev/pci/pcivar.h>
125 1.1 dyoung #include <dev/pci/pcireg.h>
126 1.1 dyoung #include <dev/pci/pcidevs.h>
127 1.1 dyoung
128 1.1 dyoung #include <dev/cardbus/cardbusvar.h>
129 1.1 dyoung #include <dev/pci/pcidevs.h>
130 1.1 dyoung
131 1.1 dyoung /*
132 1.1 dyoung * PCI configuration space registers used by the RTL8180.
133 1.1 dyoung */
134 1.1 dyoung #define RTW_PCI_IOBA 0x10 /* i/o mapped base */
135 1.1 dyoung #define RTW_PCI_MMBA 0x14 /* memory mapped base */
136 1.1 dyoung
137 1.9 dyoung #define RTW_LATTIMER 0x50
138 1.9 dyoung
139 1.1 dyoung struct rtw_cardbus_softc {
140 1.1 dyoung struct rtw_softc sc_rtw; /* real RTL8180 softc */
141 1.1 dyoung
142 1.1 dyoung /* CardBus-specific goo. */
143 1.1 dyoung void *sc_ih; /* interrupt handle */
144 1.1 dyoung cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
145 1.1 dyoung cardbustag_t sc_tag; /* our CardBus tag */
146 1.1 dyoung int sc_csr; /* CSR bits */
147 1.1 dyoung bus_size_t sc_mapsize; /* size of the mapped bus space
148 1.1 dyoung * region
149 1.1 dyoung */
150 1.1 dyoung
151 1.1 dyoung int sc_cben; /* CardBus enables */
152 1.1 dyoung int sc_bar_reg; /* which BAR to use */
153 1.1 dyoung pcireg_t sc_bar_val; /* value of the BAR */
154 1.1 dyoung
155 1.1 dyoung int sc_intrline; /* interrupt line */
156 1.1 dyoung };
157 1.1 dyoung
158 1.1 dyoung int rtw_cardbus_match(struct device *, struct cfdata *, void *);
159 1.1 dyoung void rtw_cardbus_attach(struct device *, struct device *, void *);
160 1.1 dyoung int rtw_cardbus_detach(struct device *, int);
161 1.1 dyoung
162 1.1 dyoung CFATTACH_DECL(rtw_cardbus, sizeof(struct rtw_cardbus_softc),
163 1.1 dyoung rtw_cardbus_match, rtw_cardbus_attach, rtw_cardbus_detach, rtw_activate);
164 1.1 dyoung
165 1.1 dyoung void rtw_cardbus_setup(struct rtw_cardbus_softc *);
166 1.1 dyoung
167 1.1 dyoung int rtw_cardbus_enable(struct rtw_softc *);
168 1.1 dyoung void rtw_cardbus_disable(struct rtw_softc *);
169 1.1 dyoung void rtw_cardbus_power(struct rtw_softc *, int);
170 1.1 dyoung
171 1.1 dyoung const struct rtw_cardbus_product *rtw_cardbus_lookup(
172 1.1 dyoung const struct cardbus_attach_args *);
173 1.1 dyoung
174 1.1 dyoung const struct rtw_cardbus_product {
175 1.1 dyoung u_int32_t rcp_vendor; /* PCI vendor ID */
176 1.1 dyoung u_int32_t rcp_product; /* PCI product ID */
177 1.1 dyoung const char *rcp_product_name;
178 1.1 dyoung } rtw_cardbus_products[] = {
179 1.1 dyoung { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180,
180 1.1 dyoung "Realtek RTL8180 802.11 MAC/BBP" },
181 1.1 dyoung
182 1.3 jdarrow { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6020V3,
183 1.3 jdarrow "Belkin F5D6020v3 802.11b (RTL8180 MAC/BBP)" },
184 1.3 jdarrow
185 1.1 dyoung { 0, 0, NULL },
186 1.1 dyoung };
187 1.1 dyoung
188 1.1 dyoung const struct rtw_cardbus_product *
189 1.1 dyoung rtw_cardbus_lookup(ca)
190 1.1 dyoung const struct cardbus_attach_args *ca;
191 1.1 dyoung {
192 1.1 dyoung const struct rtw_cardbus_product *rcp;
193 1.1 dyoung
194 1.1 dyoung for (rcp = rtw_cardbus_products;
195 1.1 dyoung rcp->rcp_product_name != NULL;
196 1.1 dyoung rcp++) {
197 1.1 dyoung if (PCI_VENDOR(ca->ca_id) == rcp->rcp_vendor &&
198 1.1 dyoung PCI_PRODUCT(ca->ca_id) == rcp->rcp_product)
199 1.1 dyoung return (rcp);
200 1.1 dyoung }
201 1.1 dyoung return (NULL);
202 1.1 dyoung }
203 1.1 dyoung
204 1.1 dyoung int
205 1.1 dyoung rtw_cardbus_match(parent, match, aux)
206 1.1 dyoung struct device *parent;
207 1.1 dyoung struct cfdata *match;
208 1.1 dyoung void *aux;
209 1.1 dyoung {
210 1.1 dyoung struct cardbus_attach_args *ca = aux;
211 1.1 dyoung
212 1.1 dyoung if (rtw_cardbus_lookup(ca) != NULL)
213 1.1 dyoung return (1);
214 1.1 dyoung
215 1.1 dyoung return (0);
216 1.1 dyoung }
217 1.1 dyoung
218 1.1 dyoung static void
219 1.1 dyoung rtw_cardbus_intr_ack(struct rtw_regs *regs)
220 1.1 dyoung {
221 1.1 dyoung RTW_WRITE(regs, RTW_FER, RTW_FER_INTR);
222 1.1 dyoung }
223 1.1 dyoung
224 1.1 dyoung static void
225 1.1 dyoung rtw_cardbus_funcregen(struct rtw_regs *regs, int enable)
226 1.1 dyoung {
227 1.1 dyoung u_int32_t reg;
228 1.1 dyoung rtw_config0123_enable(regs, 1);
229 1.1 dyoung reg = RTW_READ(regs, RTW_CONFIG3);
230 1.1 dyoung if (enable) {
231 1.1 dyoung RTW_WRITE(regs, RTW_CONFIG3, reg | RTW_CONFIG3_FUNCREGEN);
232 1.1 dyoung } else {
233 1.1 dyoung RTW_WRITE(regs, RTW_CONFIG3, reg & ~RTW_CONFIG3_FUNCREGEN);
234 1.1 dyoung }
235 1.1 dyoung rtw_config0123_enable(regs, 0);
236 1.1 dyoung }
237 1.1 dyoung
238 1.1 dyoung void
239 1.1 dyoung rtw_cardbus_attach(parent, self, aux)
240 1.1 dyoung struct device *parent, *self;
241 1.1 dyoung void *aux;
242 1.1 dyoung {
243 1.10 thorpej struct rtw_cardbus_softc *csc = device_private(self);
244 1.1 dyoung struct rtw_softc *sc = &csc->sc_rtw;
245 1.1 dyoung struct rtw_regs *regs = &sc->sc_regs;
246 1.1 dyoung struct cardbus_attach_args *ca = aux;
247 1.1 dyoung cardbus_devfunc_t ct = ca->ca_ct;
248 1.1 dyoung const struct rtw_cardbus_product *rcp;
249 1.1 dyoung bus_addr_t adr;
250 1.1 dyoung int rev;
251 1.1 dyoung
252 1.1 dyoung sc->sc_dmat = ca->ca_dmat;
253 1.1 dyoung csc->sc_ct = ct;
254 1.1 dyoung csc->sc_tag = ca->ca_tag;
255 1.1 dyoung
256 1.1 dyoung rcp = rtw_cardbus_lookup(ca);
257 1.1 dyoung if (rcp == NULL) {
258 1.1 dyoung printf("\n");
259 1.1 dyoung panic("rtw_cardbus_attach: impossible");
260 1.1 dyoung }
261 1.1 dyoung
262 1.1 dyoung /*
263 1.1 dyoung * Power management hooks.
264 1.1 dyoung */
265 1.1 dyoung sc->sc_enable = rtw_cardbus_enable;
266 1.1 dyoung sc->sc_disable = rtw_cardbus_disable;
267 1.1 dyoung sc->sc_power = rtw_cardbus_power;
268 1.1 dyoung
269 1.1 dyoung sc->sc_intr_ack = rtw_cardbus_intr_ack;
270 1.1 dyoung
271 1.1 dyoung /* Get revision info. */
272 1.1 dyoung rev = PCI_REVISION(ca->ca_class);
273 1.1 dyoung
274 1.1 dyoung printf(": %s\n", rcp->rcp_product_name);
275 1.1 dyoung
276 1.5 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH,
277 1.5 dyoung ("%s: pass %d.%d signature %08x\n", sc->sc_dev.dv_xname,
278 1.5 dyoung (rev >> 4) & 0xf, rev & 0xf,
279 1.5 dyoung cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80)));
280 1.1 dyoung
281 1.1 dyoung /*
282 1.1 dyoung * Map the device.
283 1.1 dyoung */
284 1.1 dyoung csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE;
285 1.1 dyoung if (Cardbus_mapreg_map(ct, RTW_PCI_MMBA,
286 1.1 dyoung CARDBUS_MAPREG_TYPE_MEM, 0, ®s->r_bt, ®s->r_bh, &adr,
287 1.1 dyoung &csc->sc_mapsize) == 0) {
288 1.5 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH,
289 1.5 dyoung ("%s: %s mapped %lu bytes mem space\n",
290 1.5 dyoung sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize));
291 1.1 dyoung #if rbus
292 1.1 dyoung #else
293 1.1 dyoung (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
294 1.1 dyoung #endif
295 1.1 dyoung csc->sc_cben = CARDBUS_MEM_ENABLE;
296 1.1 dyoung csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE;
297 1.1 dyoung csc->sc_bar_reg = RTW_PCI_MMBA;
298 1.1 dyoung csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM;
299 1.1 dyoung } else if (Cardbus_mapreg_map(ct, RTW_PCI_IOBA,
300 1.1 dyoung CARDBUS_MAPREG_TYPE_IO, 0, ®s->r_bt, ®s->r_bh, &adr,
301 1.1 dyoung &csc->sc_mapsize) == 0) {
302 1.5 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH,
303 1.5 dyoung ("%s: %s mapped %lu bytes I/O space\n",
304 1.5 dyoung sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize));
305 1.1 dyoung #if rbus
306 1.1 dyoung #else
307 1.1 dyoung (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
308 1.1 dyoung #endif
309 1.1 dyoung csc->sc_cben = CARDBUS_IO_ENABLE;
310 1.1 dyoung csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE;
311 1.1 dyoung csc->sc_bar_reg = RTW_PCI_IOBA;
312 1.1 dyoung csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO;
313 1.1 dyoung } else {
314 1.1 dyoung printf("%s: unable to map device registers\n",
315 1.1 dyoung sc->sc_dev.dv_xname);
316 1.1 dyoung return;
317 1.1 dyoung }
318 1.1 dyoung
319 1.1 dyoung /*
320 1.1 dyoung * Bring the chip out of powersave mode and initialize the
321 1.1 dyoung * configuration registers.
322 1.1 dyoung */
323 1.1 dyoung rtw_cardbus_setup(csc);
324 1.1 dyoung
325 1.1 dyoung /* Remember which interrupt line. */
326 1.1 dyoung csc->sc_intrline = ca->ca_intrline;
327 1.1 dyoung
328 1.1 dyoung printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname,
329 1.1 dyoung csc->sc_intrline);
330 1.1 dyoung /*
331 1.1 dyoung * Finish off the attach.
332 1.1 dyoung */
333 1.1 dyoung rtw_attach(sc);
334 1.1 dyoung
335 1.1 dyoung rtw_cardbus_funcregen(regs, 1);
336 1.1 dyoung
337 1.1 dyoung RTW_WRITE(regs, RTW_FEMR, RTW_FEMR_INTR);
338 1.1 dyoung RTW_WRITE(regs, RTW_FER, RTW_FER_INTR);
339 1.1 dyoung
340 1.1 dyoung /*
341 1.1 dyoung * Power down the socket.
342 1.1 dyoung */
343 1.1 dyoung Cardbus_function_disable(csc->sc_ct);
344 1.1 dyoung }
345 1.1 dyoung
346 1.1 dyoung int
347 1.1 dyoung rtw_cardbus_detach(self, flags)
348 1.1 dyoung struct device *self;
349 1.1 dyoung int flags;
350 1.1 dyoung {
351 1.10 thorpej struct rtw_cardbus_softc *csc = device_private(self);
352 1.1 dyoung struct rtw_softc *sc = &csc->sc_rtw;
353 1.1 dyoung struct rtw_regs *regs = &sc->sc_regs;
354 1.1 dyoung struct cardbus_devfunc *ct = csc->sc_ct;
355 1.1 dyoung int rv;
356 1.1 dyoung
357 1.1 dyoung #if defined(DIAGNOSTIC)
358 1.1 dyoung if (ct == NULL)
359 1.1 dyoung panic("%s: data structure lacks", sc->sc_dev.dv_xname);
360 1.1 dyoung #endif
361 1.1 dyoung
362 1.1 dyoung rv = rtw_detach(sc);
363 1.1 dyoung if (rv)
364 1.1 dyoung return (rv);
365 1.1 dyoung
366 1.1 dyoung rtw_cardbus_funcregen(regs, 0);
367 1.1 dyoung
368 1.1 dyoung /*
369 1.1 dyoung * Unhook the interrupt handler.
370 1.1 dyoung */
371 1.1 dyoung if (csc->sc_ih != NULL)
372 1.1 dyoung cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
373 1.1 dyoung
374 1.1 dyoung /*
375 1.1 dyoung * Release bus space and close window.
376 1.1 dyoung */
377 1.1 dyoung if (csc->sc_bar_reg != 0)
378 1.1 dyoung Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
379 1.1 dyoung regs->r_bt, regs->r_bh, csc->sc_mapsize);
380 1.1 dyoung
381 1.1 dyoung return (0);
382 1.1 dyoung }
383 1.1 dyoung
384 1.1 dyoung int
385 1.1 dyoung rtw_cardbus_enable(sc)
386 1.1 dyoung struct rtw_softc *sc;
387 1.1 dyoung {
388 1.1 dyoung struct rtw_cardbus_softc *csc = (void *) sc;
389 1.1 dyoung cardbus_devfunc_t ct = csc->sc_ct;
390 1.1 dyoung cardbus_chipset_tag_t cc = ct->ct_cc;
391 1.1 dyoung cardbus_function_tag_t cf = ct->ct_cf;
392 1.1 dyoung
393 1.1 dyoung /*
394 1.1 dyoung * Power on the socket.
395 1.1 dyoung */
396 1.1 dyoung Cardbus_function_enable(ct);
397 1.1 dyoung
398 1.1 dyoung /*
399 1.1 dyoung * Set up the PCI configuration registers.
400 1.1 dyoung */
401 1.1 dyoung rtw_cardbus_setup(csc);
402 1.1 dyoung
403 1.1 dyoung /*
404 1.1 dyoung * Map and establish the interrupt.
405 1.1 dyoung */
406 1.1 dyoung csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
407 1.1 dyoung rtw_intr, sc);
408 1.1 dyoung if (csc->sc_ih == NULL) {
409 1.1 dyoung printf("%s: unable to establish interrupt at %d\n",
410 1.1 dyoung sc->sc_dev.dv_xname, csc->sc_intrline);
411 1.1 dyoung Cardbus_function_disable(csc->sc_ct);
412 1.1 dyoung return (1);
413 1.1 dyoung }
414 1.1 dyoung
415 1.1 dyoung rtw_cardbus_funcregen(&sc->sc_regs, 1);
416 1.1 dyoung
417 1.1 dyoung RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR);
418 1.1 dyoung RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR);
419 1.1 dyoung
420 1.1 dyoung return (0);
421 1.1 dyoung }
422 1.1 dyoung
423 1.1 dyoung void
424 1.1 dyoung rtw_cardbus_disable(sc)
425 1.1 dyoung struct rtw_softc *sc;
426 1.1 dyoung {
427 1.1 dyoung struct rtw_cardbus_softc *csc = (void *) sc;
428 1.1 dyoung cardbus_devfunc_t ct = csc->sc_ct;
429 1.1 dyoung cardbus_chipset_tag_t cc = ct->ct_cc;
430 1.1 dyoung cardbus_function_tag_t cf = ct->ct_cf;
431 1.1 dyoung
432 1.1 dyoung RTW_WRITE(&sc->sc_regs, RTW_FEMR,
433 1.1 dyoung RTW_READ(&sc->sc_regs, RTW_FEMR) & ~RTW_FEMR_INTR);
434 1.1 dyoung
435 1.1 dyoung rtw_cardbus_funcregen(&sc->sc_regs, 0);
436 1.1 dyoung
437 1.1 dyoung /* Unhook the interrupt handler. */
438 1.1 dyoung cardbus_intr_disestablish(cc, cf, csc->sc_ih);
439 1.1 dyoung csc->sc_ih = NULL;
440 1.1 dyoung
441 1.1 dyoung /* Power down the socket. */
442 1.1 dyoung Cardbus_function_disable(ct);
443 1.1 dyoung }
444 1.1 dyoung
445 1.1 dyoung void
446 1.1 dyoung rtw_cardbus_power(sc, why)
447 1.1 dyoung struct rtw_softc *sc;
448 1.1 dyoung int why;
449 1.1 dyoung {
450 1.1 dyoung struct rtw_cardbus_softc *csc = (void *) sc;
451 1.1 dyoung
452 1.5 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH,
453 1.5 dyoung ("%s: rtw_cardbus_power\n", sc->sc_dev.dv_xname));
454 1.1 dyoung
455 1.1 dyoung if (why == PWR_RESUME) {
456 1.1 dyoung /*
457 1.1 dyoung * Give the PCI configuration registers a kick
458 1.1 dyoung * in the head.
459 1.1 dyoung */
460 1.1 dyoung #ifdef DIAGNOSTIC
461 1.1 dyoung if ((sc->sc_flags & RTW_F_ENABLED) == 0)
462 1.1 dyoung panic("rtw_cardbus_power");
463 1.1 dyoung #endif
464 1.1 dyoung rtw_cardbus_setup(csc);
465 1.1 dyoung }
466 1.1 dyoung }
467 1.1 dyoung
468 1.1 dyoung void
469 1.1 dyoung rtw_cardbus_setup(csc)
470 1.1 dyoung struct rtw_cardbus_softc *csc;
471 1.1 dyoung {
472 1.1 dyoung struct rtw_softc *sc = &csc->sc_rtw;
473 1.1 dyoung cardbus_devfunc_t ct = csc->sc_ct;
474 1.1 dyoung cardbus_chipset_tag_t cc = ct->ct_cc;
475 1.1 dyoung cardbus_function_tag_t cf = ct->ct_cf;
476 1.1 dyoung pcireg_t reg;
477 1.1 dyoung int pmreg;
478 1.1 dyoung
479 1.1 dyoung if (cardbus_get_capability(cc, cf, csc->sc_tag,
480 1.1 dyoung PCI_CAP_PWRMGMT, &pmreg, 0)) {
481 1.1 dyoung reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03;
482 1.1 dyoung #if 1 /* XXX Probably not right for CardBus. */
483 1.1 dyoung if (reg == 3) {
484 1.1 dyoung /*
485 1.1 dyoung * The card has lost all configuration data in
486 1.1 dyoung * this state, so punt.
487 1.1 dyoung */
488 1.1 dyoung printf("%s: unable to wake up from power state D3\n",
489 1.1 dyoung sc->sc_dev.dv_xname);
490 1.1 dyoung return;
491 1.1 dyoung }
492 1.1 dyoung #endif
493 1.1 dyoung if (reg != 0) {
494 1.1 dyoung printf("%s: waking up from power state D%d\n",
495 1.1 dyoung sc->sc_dev.dv_xname, reg);
496 1.1 dyoung cardbus_conf_write(cc, cf, csc->sc_tag,
497 1.1 dyoung pmreg + 4, 0);
498 1.1 dyoung }
499 1.1 dyoung }
500 1.1 dyoung
501 1.1 dyoung /* Program the BAR. */
502 1.1 dyoung cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
503 1.1 dyoung csc->sc_bar_val);
504 1.1 dyoung
505 1.1 dyoung /* Make sure the right access type is on the CardBus bridge. */
506 1.1 dyoung (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
507 1.1 dyoung (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
508 1.1 dyoung
509 1.1 dyoung /* Enable the appropriate bits in the PCI CSR. */
510 1.1 dyoung reg = cardbus_conf_read(cc, cf, csc->sc_tag,
511 1.1 dyoung CARDBUS_COMMAND_STATUS_REG);
512 1.1 dyoung reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE);
513 1.1 dyoung reg |= csc->sc_csr;
514 1.1 dyoung cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG,
515 1.1 dyoung reg);
516 1.1 dyoung
517 1.1 dyoung /*
518 1.1 dyoung * Make sure the latency timer is set to some reasonable
519 1.1 dyoung * value.
520 1.1 dyoung */
521 1.1 dyoung reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG);
522 1.9 dyoung if (CARDBUS_LATTIMER(reg) < RTW_LATTIMER) {
523 1.1 dyoung reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT);
524 1.9 dyoung reg |= (RTW_LATTIMER << CARDBUS_LATTIMER_SHIFT);
525 1.1 dyoung cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg);
526 1.1 dyoung }
527 1.1 dyoung }
528