if_rtw_cardbus.c revision 1.10 1 /* $NetBSD: if_rtw_cardbus.c,v 1.10 2006/03/29 06:22:38 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2004, 2005 David Young. All rights reserved.
5 *
6 * Adapted for the RTL8180 by David Young.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. The name of David Young may not be used to endorse or promote
17 * products derived from this software without specific prior
18 * written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
23 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
24 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
26 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31 * OF SUCH DAMAGE.
32 */
33 /*-
34 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
35 * All rights reserved.
36 *
37 * This code is derived from software contributed to The NetBSD Foundation
38 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
39 * NASA Ames Research Center.
40 *
41 * Redistribution and use in source and binary forms, with or without
42 * modification, are permitted provided that the following conditions
43 * are met:
44 * 1. Redistributions of source code must retain the above copyright
45 * notice, this list of conditions and the following disclaimer.
46 * 2. Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in the
48 * documentation and/or other materials provided with the distribution.
49 * 3. All advertising materials mentioning features or use of this software
50 * must display the following acknowledgement:
51 * This product includes software developed by the NetBSD
52 * Foundation, Inc. and its contributors.
53 * 4. Neither the name of The NetBSD Foundation nor the names of its
54 * contributors may be used to endorse or promote products derived
55 * from this software without specific prior written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
58 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
67 * POSSIBILITY OF SUCH DAMAGE.
68 */
69
70 /*
71 * Cardbus front-end for the Realtek RTL8180 802.11 MAC/BBP driver.
72 *
73 * TBD factor with atw, tlp Cardbus front-ends?
74 */
75
76 #include <sys/cdefs.h>
77 __KERNEL_RCSID(0, "$NetBSD: if_rtw_cardbus.c,v 1.10 2006/03/29 06:22:38 thorpej Exp $");
78
79 #include "opt_inet.h"
80 #include "opt_ns.h"
81 #include "bpfilter.h"
82
83 #include <sys/param.h>
84 #include <sys/systm.h>
85 #include <sys/mbuf.h>
86 #include <sys/malloc.h>
87 #include <sys/kernel.h>
88 #include <sys/socket.h>
89 #include <sys/ioctl.h>
90 #include <sys/errno.h>
91 #include <sys/device.h>
92
93 #include <machine/endian.h>
94
95 #include <net/if.h>
96 #include <net/if_dl.h>
97 #include <net/if_media.h>
98 #include <net/if_ether.h>
99
100 #include <net80211/ieee80211_netbsd.h>
101 #include <net80211/ieee80211_radiotap.h>
102 #include <net80211/ieee80211_var.h>
103
104 #if NBPFILTER > 0
105 #include <net/bpf.h>
106 #endif
107
108 #ifdef INET
109 #include <netinet/in.h>
110 #include <netinet/if_inarp.h>
111 #endif
112
113 #ifdef NS
114 #include <netns/ns.h>
115 #include <netns/ns_if.h>
116 #endif
117
118 #include <machine/bus.h>
119 #include <machine/intr.h>
120
121 #include <dev/ic/rtwreg.h>
122 #include <dev/ic/rtwvar.h>
123
124 #include <dev/pci/pcivar.h>
125 #include <dev/pci/pcireg.h>
126 #include <dev/pci/pcidevs.h>
127
128 #include <dev/cardbus/cardbusvar.h>
129 #include <dev/pci/pcidevs.h>
130
131 /*
132 * PCI configuration space registers used by the RTL8180.
133 */
134 #define RTW_PCI_IOBA 0x10 /* i/o mapped base */
135 #define RTW_PCI_MMBA 0x14 /* memory mapped base */
136
137 #define RTW_LATTIMER 0x50
138
139 struct rtw_cardbus_softc {
140 struct rtw_softc sc_rtw; /* real RTL8180 softc */
141
142 /* CardBus-specific goo. */
143 void *sc_ih; /* interrupt handle */
144 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
145 cardbustag_t sc_tag; /* our CardBus tag */
146 int sc_csr; /* CSR bits */
147 bus_size_t sc_mapsize; /* size of the mapped bus space
148 * region
149 */
150
151 int sc_cben; /* CardBus enables */
152 int sc_bar_reg; /* which BAR to use */
153 pcireg_t sc_bar_val; /* value of the BAR */
154
155 int sc_intrline; /* interrupt line */
156 };
157
158 int rtw_cardbus_match(struct device *, struct cfdata *, void *);
159 void rtw_cardbus_attach(struct device *, struct device *, void *);
160 int rtw_cardbus_detach(struct device *, int);
161
162 CFATTACH_DECL(rtw_cardbus, sizeof(struct rtw_cardbus_softc),
163 rtw_cardbus_match, rtw_cardbus_attach, rtw_cardbus_detach, rtw_activate);
164
165 void rtw_cardbus_setup(struct rtw_cardbus_softc *);
166
167 int rtw_cardbus_enable(struct rtw_softc *);
168 void rtw_cardbus_disable(struct rtw_softc *);
169 void rtw_cardbus_power(struct rtw_softc *, int);
170
171 const struct rtw_cardbus_product *rtw_cardbus_lookup(
172 const struct cardbus_attach_args *);
173
174 const struct rtw_cardbus_product {
175 u_int32_t rcp_vendor; /* PCI vendor ID */
176 u_int32_t rcp_product; /* PCI product ID */
177 const char *rcp_product_name;
178 } rtw_cardbus_products[] = {
179 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180,
180 "Realtek RTL8180 802.11 MAC/BBP" },
181
182 { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6020V3,
183 "Belkin F5D6020v3 802.11b (RTL8180 MAC/BBP)" },
184
185 { 0, 0, NULL },
186 };
187
188 const struct rtw_cardbus_product *
189 rtw_cardbus_lookup(ca)
190 const struct cardbus_attach_args *ca;
191 {
192 const struct rtw_cardbus_product *rcp;
193
194 for (rcp = rtw_cardbus_products;
195 rcp->rcp_product_name != NULL;
196 rcp++) {
197 if (PCI_VENDOR(ca->ca_id) == rcp->rcp_vendor &&
198 PCI_PRODUCT(ca->ca_id) == rcp->rcp_product)
199 return (rcp);
200 }
201 return (NULL);
202 }
203
204 int
205 rtw_cardbus_match(parent, match, aux)
206 struct device *parent;
207 struct cfdata *match;
208 void *aux;
209 {
210 struct cardbus_attach_args *ca = aux;
211
212 if (rtw_cardbus_lookup(ca) != NULL)
213 return (1);
214
215 return (0);
216 }
217
218 static void
219 rtw_cardbus_intr_ack(struct rtw_regs *regs)
220 {
221 RTW_WRITE(regs, RTW_FER, RTW_FER_INTR);
222 }
223
224 static void
225 rtw_cardbus_funcregen(struct rtw_regs *regs, int enable)
226 {
227 u_int32_t reg;
228 rtw_config0123_enable(regs, 1);
229 reg = RTW_READ(regs, RTW_CONFIG3);
230 if (enable) {
231 RTW_WRITE(regs, RTW_CONFIG3, reg | RTW_CONFIG3_FUNCREGEN);
232 } else {
233 RTW_WRITE(regs, RTW_CONFIG3, reg & ~RTW_CONFIG3_FUNCREGEN);
234 }
235 rtw_config0123_enable(regs, 0);
236 }
237
238 void
239 rtw_cardbus_attach(parent, self, aux)
240 struct device *parent, *self;
241 void *aux;
242 {
243 struct rtw_cardbus_softc *csc = device_private(self);
244 struct rtw_softc *sc = &csc->sc_rtw;
245 struct rtw_regs *regs = &sc->sc_regs;
246 struct cardbus_attach_args *ca = aux;
247 cardbus_devfunc_t ct = ca->ca_ct;
248 const struct rtw_cardbus_product *rcp;
249 bus_addr_t adr;
250 int rev;
251
252 sc->sc_dmat = ca->ca_dmat;
253 csc->sc_ct = ct;
254 csc->sc_tag = ca->ca_tag;
255
256 rcp = rtw_cardbus_lookup(ca);
257 if (rcp == NULL) {
258 printf("\n");
259 panic("rtw_cardbus_attach: impossible");
260 }
261
262 /*
263 * Power management hooks.
264 */
265 sc->sc_enable = rtw_cardbus_enable;
266 sc->sc_disable = rtw_cardbus_disable;
267 sc->sc_power = rtw_cardbus_power;
268
269 sc->sc_intr_ack = rtw_cardbus_intr_ack;
270
271 /* Get revision info. */
272 rev = PCI_REVISION(ca->ca_class);
273
274 printf(": %s\n", rcp->rcp_product_name);
275
276 RTW_DPRINTF(RTW_DEBUG_ATTACH,
277 ("%s: pass %d.%d signature %08x\n", sc->sc_dev.dv_xname,
278 (rev >> 4) & 0xf, rev & 0xf,
279 cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80)));
280
281 /*
282 * Map the device.
283 */
284 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE;
285 if (Cardbus_mapreg_map(ct, RTW_PCI_MMBA,
286 CARDBUS_MAPREG_TYPE_MEM, 0, ®s->r_bt, ®s->r_bh, &adr,
287 &csc->sc_mapsize) == 0) {
288 RTW_DPRINTF(RTW_DEBUG_ATTACH,
289 ("%s: %s mapped %lu bytes mem space\n",
290 sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize));
291 #if rbus
292 #else
293 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
294 #endif
295 csc->sc_cben = CARDBUS_MEM_ENABLE;
296 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE;
297 csc->sc_bar_reg = RTW_PCI_MMBA;
298 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM;
299 } else if (Cardbus_mapreg_map(ct, RTW_PCI_IOBA,
300 CARDBUS_MAPREG_TYPE_IO, 0, ®s->r_bt, ®s->r_bh, &adr,
301 &csc->sc_mapsize) == 0) {
302 RTW_DPRINTF(RTW_DEBUG_ATTACH,
303 ("%s: %s mapped %lu bytes I/O space\n",
304 sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize));
305 #if rbus
306 #else
307 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
308 #endif
309 csc->sc_cben = CARDBUS_IO_ENABLE;
310 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE;
311 csc->sc_bar_reg = RTW_PCI_IOBA;
312 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO;
313 } else {
314 printf("%s: unable to map device registers\n",
315 sc->sc_dev.dv_xname);
316 return;
317 }
318
319 /*
320 * Bring the chip out of powersave mode and initialize the
321 * configuration registers.
322 */
323 rtw_cardbus_setup(csc);
324
325 /* Remember which interrupt line. */
326 csc->sc_intrline = ca->ca_intrline;
327
328 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname,
329 csc->sc_intrline);
330 /*
331 * Finish off the attach.
332 */
333 rtw_attach(sc);
334
335 rtw_cardbus_funcregen(regs, 1);
336
337 RTW_WRITE(regs, RTW_FEMR, RTW_FEMR_INTR);
338 RTW_WRITE(regs, RTW_FER, RTW_FER_INTR);
339
340 /*
341 * Power down the socket.
342 */
343 Cardbus_function_disable(csc->sc_ct);
344 }
345
346 int
347 rtw_cardbus_detach(self, flags)
348 struct device *self;
349 int flags;
350 {
351 struct rtw_cardbus_softc *csc = device_private(self);
352 struct rtw_softc *sc = &csc->sc_rtw;
353 struct rtw_regs *regs = &sc->sc_regs;
354 struct cardbus_devfunc *ct = csc->sc_ct;
355 int rv;
356
357 #if defined(DIAGNOSTIC)
358 if (ct == NULL)
359 panic("%s: data structure lacks", sc->sc_dev.dv_xname);
360 #endif
361
362 rv = rtw_detach(sc);
363 if (rv)
364 return (rv);
365
366 rtw_cardbus_funcregen(regs, 0);
367
368 /*
369 * Unhook the interrupt handler.
370 */
371 if (csc->sc_ih != NULL)
372 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
373
374 /*
375 * Release bus space and close window.
376 */
377 if (csc->sc_bar_reg != 0)
378 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
379 regs->r_bt, regs->r_bh, csc->sc_mapsize);
380
381 return (0);
382 }
383
384 int
385 rtw_cardbus_enable(sc)
386 struct rtw_softc *sc;
387 {
388 struct rtw_cardbus_softc *csc = (void *) sc;
389 cardbus_devfunc_t ct = csc->sc_ct;
390 cardbus_chipset_tag_t cc = ct->ct_cc;
391 cardbus_function_tag_t cf = ct->ct_cf;
392
393 /*
394 * Power on the socket.
395 */
396 Cardbus_function_enable(ct);
397
398 /*
399 * Set up the PCI configuration registers.
400 */
401 rtw_cardbus_setup(csc);
402
403 /*
404 * Map and establish the interrupt.
405 */
406 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
407 rtw_intr, sc);
408 if (csc->sc_ih == NULL) {
409 printf("%s: unable to establish interrupt at %d\n",
410 sc->sc_dev.dv_xname, csc->sc_intrline);
411 Cardbus_function_disable(csc->sc_ct);
412 return (1);
413 }
414
415 rtw_cardbus_funcregen(&sc->sc_regs, 1);
416
417 RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR);
418 RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR);
419
420 return (0);
421 }
422
423 void
424 rtw_cardbus_disable(sc)
425 struct rtw_softc *sc;
426 {
427 struct rtw_cardbus_softc *csc = (void *) sc;
428 cardbus_devfunc_t ct = csc->sc_ct;
429 cardbus_chipset_tag_t cc = ct->ct_cc;
430 cardbus_function_tag_t cf = ct->ct_cf;
431
432 RTW_WRITE(&sc->sc_regs, RTW_FEMR,
433 RTW_READ(&sc->sc_regs, RTW_FEMR) & ~RTW_FEMR_INTR);
434
435 rtw_cardbus_funcregen(&sc->sc_regs, 0);
436
437 /* Unhook the interrupt handler. */
438 cardbus_intr_disestablish(cc, cf, csc->sc_ih);
439 csc->sc_ih = NULL;
440
441 /* Power down the socket. */
442 Cardbus_function_disable(ct);
443 }
444
445 void
446 rtw_cardbus_power(sc, why)
447 struct rtw_softc *sc;
448 int why;
449 {
450 struct rtw_cardbus_softc *csc = (void *) sc;
451
452 RTW_DPRINTF(RTW_DEBUG_ATTACH,
453 ("%s: rtw_cardbus_power\n", sc->sc_dev.dv_xname));
454
455 if (why == PWR_RESUME) {
456 /*
457 * Give the PCI configuration registers a kick
458 * in the head.
459 */
460 #ifdef DIAGNOSTIC
461 if ((sc->sc_flags & RTW_F_ENABLED) == 0)
462 panic("rtw_cardbus_power");
463 #endif
464 rtw_cardbus_setup(csc);
465 }
466 }
467
468 void
469 rtw_cardbus_setup(csc)
470 struct rtw_cardbus_softc *csc;
471 {
472 struct rtw_softc *sc = &csc->sc_rtw;
473 cardbus_devfunc_t ct = csc->sc_ct;
474 cardbus_chipset_tag_t cc = ct->ct_cc;
475 cardbus_function_tag_t cf = ct->ct_cf;
476 pcireg_t reg;
477 int pmreg;
478
479 if (cardbus_get_capability(cc, cf, csc->sc_tag,
480 PCI_CAP_PWRMGMT, &pmreg, 0)) {
481 reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03;
482 #if 1 /* XXX Probably not right for CardBus. */
483 if (reg == 3) {
484 /*
485 * The card has lost all configuration data in
486 * this state, so punt.
487 */
488 printf("%s: unable to wake up from power state D3\n",
489 sc->sc_dev.dv_xname);
490 return;
491 }
492 #endif
493 if (reg != 0) {
494 printf("%s: waking up from power state D%d\n",
495 sc->sc_dev.dv_xname, reg);
496 cardbus_conf_write(cc, cf, csc->sc_tag,
497 pmreg + 4, 0);
498 }
499 }
500
501 /* Program the BAR. */
502 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg,
503 csc->sc_bar_val);
504
505 /* Make sure the right access type is on the CardBus bridge. */
506 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
507 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
508
509 /* Enable the appropriate bits in the PCI CSR. */
510 reg = cardbus_conf_read(cc, cf, csc->sc_tag,
511 CARDBUS_COMMAND_STATUS_REG);
512 reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE);
513 reg |= csc->sc_csr;
514 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG,
515 reg);
516
517 /*
518 * Make sure the latency timer is set to some reasonable
519 * value.
520 */
521 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG);
522 if (CARDBUS_LATTIMER(reg) < RTW_LATTIMER) {
523 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT);
524 reg |= (RTW_LATTIMER << CARDBUS_LATTIMER_SHIFT);
525 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg);
526 }
527 }
528