if_rtw_cardbus.c revision 1.12
1 /* $NetBSD: if_rtw_cardbus.c,v 1.12 2006/06/05 21:09:29 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 2004, 2005 David Young. All rights reserved. 5 * 6 * Adapted for the RTL8180 by David Young. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of David Young may not be used to endorse or promote 17 * products derived from this software without specific prior 18 * written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY 21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 23 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David 24 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 26 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 31 * OF SUCH DAMAGE. 32 */ 33 /*- 34 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 35 * All rights reserved. 36 * 37 * This code is derived from software contributed to The NetBSD Foundation 38 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 39 * NASA Ames Research Center. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by the NetBSD 52 * Foundation, Inc. and its contributors. 53 * 4. Neither the name of The NetBSD Foundation nor the names of its 54 * contributors may be used to endorse or promote products derived 55 * from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 58 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 * POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 /* 71 * Cardbus front-end for the Realtek RTL8180 802.11 MAC/BBP driver. 72 * 73 * TBD factor with atw, tlp Cardbus front-ends? 74 */ 75 76 #include <sys/cdefs.h> 77 __KERNEL_RCSID(0, "$NetBSD: if_rtw_cardbus.c,v 1.12 2006/06/05 21:09:29 martin Exp $"); 78 79 #include "opt_inet.h" 80 #include "opt_ns.h" 81 #include "bpfilter.h" 82 83 #include <sys/param.h> 84 #include <sys/systm.h> 85 #include <sys/mbuf.h> 86 #include <sys/malloc.h> 87 #include <sys/kernel.h> 88 #include <sys/socket.h> 89 #include <sys/ioctl.h> 90 #include <sys/errno.h> 91 #include <sys/device.h> 92 93 #include <machine/endian.h> 94 95 #include <net/if.h> 96 #include <net/if_dl.h> 97 #include <net/if_media.h> 98 #include <net/if_ether.h> 99 100 #include <net80211/ieee80211_netbsd.h> 101 #include <net80211/ieee80211_radiotap.h> 102 #include <net80211/ieee80211_var.h> 103 104 #if NBPFILTER > 0 105 #include <net/bpf.h> 106 #endif 107 108 #ifdef INET 109 #include <netinet/in.h> 110 #include <netinet/if_inarp.h> 111 #endif 112 113 #ifdef NS 114 #include <netns/ns.h> 115 #include <netns/ns_if.h> 116 #endif 117 118 #include <machine/bus.h> 119 #include <machine/intr.h> 120 121 #include <dev/ic/rtwreg.h> 122 #include <dev/ic/rtwvar.h> 123 124 #include <dev/pci/pcivar.h> 125 #include <dev/pci/pcireg.h> 126 #include <dev/pci/pcidevs.h> 127 128 #include <dev/cardbus/cardbusvar.h> 129 #include <dev/pci/pcidevs.h> 130 131 /* 132 * PCI configuration space registers used by the RTL8180. 133 */ 134 #define RTW_PCI_IOBA 0x10 /* i/o mapped base */ 135 #define RTW_PCI_MMBA 0x14 /* memory mapped base */ 136 137 #define RTW_LATTIMER 0x50 138 139 struct rtw_cardbus_softc { 140 struct rtw_softc sc_rtw; /* real RTL8180 softc */ 141 142 /* CardBus-specific goo. */ 143 void *sc_ih; /* interrupt handle */ 144 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 145 cardbustag_t sc_tag; /* our CardBus tag */ 146 int sc_csr; /* CSR bits */ 147 bus_size_t sc_mapsize; /* size of the mapped bus space 148 * region 149 */ 150 151 int sc_cben; /* CardBus enables */ 152 int sc_bar_reg; /* which BAR to use */ 153 pcireg_t sc_bar_val; /* value of the BAR */ 154 155 int sc_intrline; /* interrupt line */ 156 }; 157 158 int rtw_cardbus_match(struct device *, struct cfdata *, void *); 159 void rtw_cardbus_attach(struct device *, struct device *, void *); 160 int rtw_cardbus_detach(struct device *, int); 161 162 CFATTACH_DECL(rtw_cardbus, sizeof(struct rtw_cardbus_softc), 163 rtw_cardbus_match, rtw_cardbus_attach, rtw_cardbus_detach, rtw_activate); 164 165 void rtw_cardbus_setup(struct rtw_cardbus_softc *); 166 167 int rtw_cardbus_enable(struct rtw_softc *); 168 void rtw_cardbus_disable(struct rtw_softc *); 169 void rtw_cardbus_power(struct rtw_softc *, int); 170 171 const struct rtw_cardbus_product *rtw_cardbus_lookup( 172 const struct cardbus_attach_args *); 173 174 const struct rtw_cardbus_product { 175 u_int32_t rcp_vendor; /* PCI vendor ID */ 176 u_int32_t rcp_product; /* PCI product ID */ 177 const char *rcp_product_name; 178 } rtw_cardbus_products[] = { 179 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180, 180 "Realtek RTL8180 802.11 MAC/BBP" }, 181 182 { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6020V3, 183 "Belkin F5D6020v3 802.11b (RTL8180 MAC/BBP)" }, 184 185 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DWL610, 186 "DWL-610 D-Link Air 802.11b (RTL8180 MAC/BBP)" }, 187 188 { 0, 0, NULL }, 189 }; 190 191 const struct rtw_cardbus_product * 192 rtw_cardbus_lookup(const struct cardbus_attach_args *ca) 193 { 194 const struct rtw_cardbus_product *rcp; 195 196 for (rcp = rtw_cardbus_products; 197 rcp->rcp_product_name != NULL; 198 rcp++) { 199 if (PCI_VENDOR(ca->ca_id) == rcp->rcp_vendor && 200 PCI_PRODUCT(ca->ca_id) == rcp->rcp_product) 201 return (rcp); 202 } 203 return (NULL); 204 } 205 206 int 207 rtw_cardbus_match(struct device *parent, struct cfdata *match, void *aux) 208 { 209 struct cardbus_attach_args *ca = aux; 210 211 if (rtw_cardbus_lookup(ca) != NULL) 212 return (1); 213 214 return (0); 215 } 216 217 static void 218 rtw_cardbus_intr_ack(struct rtw_regs *regs) 219 { 220 RTW_WRITE(regs, RTW_FER, RTW_FER_INTR); 221 } 222 223 static void 224 rtw_cardbus_funcregen(struct rtw_regs *regs, int enable) 225 { 226 u_int32_t reg; 227 rtw_config0123_enable(regs, 1); 228 reg = RTW_READ(regs, RTW_CONFIG3); 229 if (enable) { 230 RTW_WRITE(regs, RTW_CONFIG3, reg | RTW_CONFIG3_FUNCREGEN); 231 } else { 232 RTW_WRITE(regs, RTW_CONFIG3, reg & ~RTW_CONFIG3_FUNCREGEN); 233 } 234 rtw_config0123_enable(regs, 0); 235 } 236 237 void 238 rtw_cardbus_attach(struct device *parent, struct device *self, void *aux) 239 { 240 struct rtw_cardbus_softc *csc = device_private(self); 241 struct rtw_softc *sc = &csc->sc_rtw; 242 struct rtw_regs *regs = &sc->sc_regs; 243 struct cardbus_attach_args *ca = aux; 244 cardbus_devfunc_t ct = ca->ca_ct; 245 const struct rtw_cardbus_product *rcp; 246 bus_addr_t adr; 247 int rev; 248 249 sc->sc_dmat = ca->ca_dmat; 250 csc->sc_ct = ct; 251 csc->sc_tag = ca->ca_tag; 252 253 rcp = rtw_cardbus_lookup(ca); 254 if (rcp == NULL) { 255 printf("\n"); 256 panic("rtw_cardbus_attach: impossible"); 257 } 258 259 /* 260 * Power management hooks. 261 */ 262 sc->sc_enable = rtw_cardbus_enable; 263 sc->sc_disable = rtw_cardbus_disable; 264 sc->sc_power = rtw_cardbus_power; 265 266 sc->sc_intr_ack = rtw_cardbus_intr_ack; 267 268 /* Get revision info. */ 269 rev = PCI_REVISION(ca->ca_class); 270 271 printf(": %s\n", rcp->rcp_product_name); 272 273 RTW_DPRINTF(RTW_DEBUG_ATTACH, 274 ("%s: pass %d.%d signature %08x\n", sc->sc_dev.dv_xname, 275 (rev >> 4) & 0xf, rev & 0xf, 276 cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80))); 277 278 /* 279 * Map the device. 280 */ 281 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE; 282 if (Cardbus_mapreg_map(ct, RTW_PCI_MMBA, 283 CARDBUS_MAPREG_TYPE_MEM, 0, ®s->r_bt, ®s->r_bh, &adr, 284 &csc->sc_mapsize) == 0) { 285 RTW_DPRINTF(RTW_DEBUG_ATTACH, 286 ("%s: %s mapped %lu bytes mem space\n", 287 sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize)); 288 #if rbus 289 #else 290 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 291 #endif 292 csc->sc_cben = CARDBUS_MEM_ENABLE; 293 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE; 294 csc->sc_bar_reg = RTW_PCI_MMBA; 295 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; 296 } else if (Cardbus_mapreg_map(ct, RTW_PCI_IOBA, 297 CARDBUS_MAPREG_TYPE_IO, 0, ®s->r_bt, ®s->r_bh, &adr, 298 &csc->sc_mapsize) == 0) { 299 RTW_DPRINTF(RTW_DEBUG_ATTACH, 300 ("%s: %s mapped %lu bytes I/O space\n", 301 sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize)); 302 #if rbus 303 #else 304 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 305 #endif 306 csc->sc_cben = CARDBUS_IO_ENABLE; 307 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE; 308 csc->sc_bar_reg = RTW_PCI_IOBA; 309 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 310 } else { 311 printf("%s: unable to map device registers\n", 312 sc->sc_dev.dv_xname); 313 return; 314 } 315 316 /* 317 * Bring the chip out of powersave mode and initialize the 318 * configuration registers. 319 */ 320 rtw_cardbus_setup(csc); 321 322 /* Remember which interrupt line. */ 323 csc->sc_intrline = ca->ca_intrline; 324 325 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname, 326 csc->sc_intrline); 327 /* 328 * Finish off the attach. 329 */ 330 rtw_attach(sc); 331 332 rtw_cardbus_funcregen(regs, 1); 333 334 RTW_WRITE(regs, RTW_FEMR, RTW_FEMR_INTR); 335 RTW_WRITE(regs, RTW_FER, RTW_FER_INTR); 336 337 /* 338 * Power down the socket. 339 */ 340 Cardbus_function_disable(csc->sc_ct); 341 } 342 343 int 344 rtw_cardbus_detach(struct device *self, int flags) 345 { 346 struct rtw_cardbus_softc *csc = device_private(self); 347 struct rtw_softc *sc = &csc->sc_rtw; 348 struct rtw_regs *regs = &sc->sc_regs; 349 struct cardbus_devfunc *ct = csc->sc_ct; 350 int rv; 351 352 #if defined(DIAGNOSTIC) 353 if (ct == NULL) 354 panic("%s: data structure lacks", sc->sc_dev.dv_xname); 355 #endif 356 357 rv = rtw_detach(sc); 358 if (rv) 359 return (rv); 360 361 rtw_cardbus_funcregen(regs, 0); 362 363 /* 364 * Unhook the interrupt handler. 365 */ 366 if (csc->sc_ih != NULL) 367 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih); 368 369 /* 370 * Release bus space and close window. 371 */ 372 if (csc->sc_bar_reg != 0) 373 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 374 regs->r_bt, regs->r_bh, csc->sc_mapsize); 375 376 return (0); 377 } 378 379 int 380 rtw_cardbus_enable(struct rtw_softc *sc) 381 { 382 struct rtw_cardbus_softc *csc = (void *) sc; 383 cardbus_devfunc_t ct = csc->sc_ct; 384 cardbus_chipset_tag_t cc = ct->ct_cc; 385 cardbus_function_tag_t cf = ct->ct_cf; 386 387 /* 388 * Power on the socket. 389 */ 390 Cardbus_function_enable(ct); 391 392 /* 393 * Set up the PCI configuration registers. 394 */ 395 rtw_cardbus_setup(csc); 396 397 /* 398 * Map and establish the interrupt. 399 */ 400 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET, 401 rtw_intr, sc); 402 if (csc->sc_ih == NULL) { 403 printf("%s: unable to establish interrupt at %d\n", 404 sc->sc_dev.dv_xname, csc->sc_intrline); 405 Cardbus_function_disable(csc->sc_ct); 406 return (1); 407 } 408 409 rtw_cardbus_funcregen(&sc->sc_regs, 1); 410 411 RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR); 412 RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR); 413 414 return (0); 415 } 416 417 void 418 rtw_cardbus_disable(struct rtw_softc *sc) 419 { 420 struct rtw_cardbus_softc *csc = (void *) sc; 421 cardbus_devfunc_t ct = csc->sc_ct; 422 cardbus_chipset_tag_t cc = ct->ct_cc; 423 cardbus_function_tag_t cf = ct->ct_cf; 424 425 RTW_WRITE(&sc->sc_regs, RTW_FEMR, 426 RTW_READ(&sc->sc_regs, RTW_FEMR) & ~RTW_FEMR_INTR); 427 428 rtw_cardbus_funcregen(&sc->sc_regs, 0); 429 430 /* Unhook the interrupt handler. */ 431 cardbus_intr_disestablish(cc, cf, csc->sc_ih); 432 csc->sc_ih = NULL; 433 434 /* Power down the socket. */ 435 Cardbus_function_disable(ct); 436 } 437 438 void 439 rtw_cardbus_power(struct rtw_softc *sc, int why) 440 { 441 struct rtw_cardbus_softc *csc = (void *) sc; 442 443 RTW_DPRINTF(RTW_DEBUG_ATTACH, 444 ("%s: rtw_cardbus_power\n", sc->sc_dev.dv_xname)); 445 446 if (why == PWR_RESUME) { 447 /* 448 * Give the PCI configuration registers a kick 449 * in the head. 450 */ 451 #ifdef DIAGNOSTIC 452 if ((sc->sc_flags & RTW_F_ENABLED) == 0) 453 panic("rtw_cardbus_power"); 454 #endif 455 rtw_cardbus_setup(csc); 456 } 457 } 458 459 void 460 rtw_cardbus_setup(struct rtw_cardbus_softc *csc) 461 { 462 struct rtw_softc *sc = &csc->sc_rtw; 463 cardbus_devfunc_t ct = csc->sc_ct; 464 cardbus_chipset_tag_t cc = ct->ct_cc; 465 cardbus_function_tag_t cf = ct->ct_cf; 466 pcireg_t reg; 467 int pmreg; 468 469 if (cardbus_get_capability(cc, cf, csc->sc_tag, 470 PCI_CAP_PWRMGMT, &pmreg, 0)) { 471 reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03; 472 #if 1 /* XXX Probably not right for CardBus. */ 473 if (reg == 3) { 474 /* 475 * The card has lost all configuration data in 476 * this state, so punt. 477 */ 478 printf("%s: unable to wake up from power state D3\n", 479 sc->sc_dev.dv_xname); 480 return; 481 } 482 #endif 483 if (reg != 0) { 484 printf("%s: waking up from power state D%d\n", 485 sc->sc_dev.dv_xname, reg); 486 cardbus_conf_write(cc, cf, csc->sc_tag, 487 pmreg + 4, 0); 488 } 489 } 490 491 /* Program the BAR. */ 492 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg, 493 csc->sc_bar_val); 494 495 /* Make sure the right access type is on the CardBus bridge. */ 496 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben); 497 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 498 499 /* Enable the appropriate bits in the PCI CSR. */ 500 reg = cardbus_conf_read(cc, cf, csc->sc_tag, 501 CARDBUS_COMMAND_STATUS_REG); 502 reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE); 503 reg |= csc->sc_csr; 504 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG, 505 reg); 506 507 /* 508 * Make sure the latency timer is set to some reasonable 509 * value. 510 */ 511 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG); 512 if (CARDBUS_LATTIMER(reg) < RTW_LATTIMER) { 513 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT); 514 reg |= (RTW_LATTIMER << CARDBUS_LATTIMER_SHIFT); 515 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg); 516 } 517 } 518
Indexes created Mon Sep 29 21:09:56 GMT 2025