if_rtw_cardbus.c revision 1.15
1 /* $NetBSD: if_rtw_cardbus.c,v 1.15 2006/11/16 01:32:48 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 2004, 2005 David Young. All rights reserved. 5 * 6 * Adapted for the RTL8180 by David Young. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of David Young may not be used to endorse or promote 17 * products derived from this software without specific prior 18 * written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY 21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 23 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David 24 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 26 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 31 * OF SUCH DAMAGE. 32 */ 33 /*- 34 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 35 * All rights reserved. 36 * 37 * This code is derived from software contributed to The NetBSD Foundation 38 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 39 * NASA Ames Research Center. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by the NetBSD 52 * Foundation, Inc. and its contributors. 53 * 4. Neither the name of The NetBSD Foundation nor the names of its 54 * contributors may be used to endorse or promote products derived 55 * from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 58 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 * POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 /* 71 * Cardbus front-end for the Realtek RTL8180 802.11 MAC/BBP driver. 72 * 73 * TBD factor with atw, tlp Cardbus front-ends? 74 */ 75 76 #include <sys/cdefs.h> 77 __KERNEL_RCSID(0, "$NetBSD: if_rtw_cardbus.c,v 1.15 2006/11/16 01:32:48 christos Exp $"); 78 79 #include "opt_inet.h" 80 #include "bpfilter.h" 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/mbuf.h> 85 #include <sys/malloc.h> 86 #include <sys/kernel.h> 87 #include <sys/socket.h> 88 #include <sys/ioctl.h> 89 #include <sys/errno.h> 90 #include <sys/device.h> 91 92 #include <machine/endian.h> 93 94 #include <net/if.h> 95 #include <net/if_dl.h> 96 #include <net/if_media.h> 97 #include <net/if_ether.h> 98 99 #include <net80211/ieee80211_netbsd.h> 100 #include <net80211/ieee80211_radiotap.h> 101 #include <net80211/ieee80211_var.h> 102 103 #if NBPFILTER > 0 104 #include <net/bpf.h> 105 #endif 106 107 #ifdef INET 108 #include <netinet/in.h> 109 #include <netinet/if_inarp.h> 110 #endif 111 112 113 #include <machine/bus.h> 114 #include <machine/intr.h> 115 116 #include <dev/ic/rtwreg.h> 117 #include <dev/ic/rtwvar.h> 118 119 #include <dev/pci/pcivar.h> 120 #include <dev/pci/pcireg.h> 121 #include <dev/pci/pcidevs.h> 122 123 #include <dev/cardbus/cardbusvar.h> 124 #include <dev/pci/pcidevs.h> 125 126 /* 127 * PCI configuration space registers used by the RTL8180. 128 */ 129 #define RTW_PCI_IOBA 0x10 /* i/o mapped base */ 130 #define RTW_PCI_MMBA 0x14 /* memory mapped base */ 131 132 #define RTW_LATTIMER 0x50 133 134 struct rtw_cardbus_softc { 135 struct rtw_softc sc_rtw; /* real RTL8180 softc */ 136 137 /* CardBus-specific goo. */ 138 void *sc_ih; /* interrupt handle */ 139 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 140 cardbustag_t sc_tag; /* our CardBus tag */ 141 int sc_csr; /* CSR bits */ 142 bus_size_t sc_mapsize; /* size of the mapped bus space 143 * region 144 */ 145 146 int sc_cben; /* CardBus enables */ 147 int sc_bar_reg; /* which BAR to use */ 148 pcireg_t sc_bar_val; /* value of the BAR */ 149 150 int sc_intrline; /* interrupt line */ 151 }; 152 153 int rtw_cardbus_match(struct device *, struct cfdata *, void *); 154 void rtw_cardbus_attach(struct device *, struct device *, void *); 155 int rtw_cardbus_detach(struct device *, int); 156 157 CFATTACH_DECL(rtw_cardbus, sizeof(struct rtw_cardbus_softc), 158 rtw_cardbus_match, rtw_cardbus_attach, rtw_cardbus_detach, rtw_activate); 159 160 void rtw_cardbus_setup(struct rtw_cardbus_softc *); 161 162 int rtw_cardbus_enable(struct rtw_softc *); 163 void rtw_cardbus_disable(struct rtw_softc *); 164 void rtw_cardbus_power(struct rtw_softc *, int); 165 166 const struct rtw_cardbus_product *rtw_cardbus_lookup( 167 const struct cardbus_attach_args *); 168 169 const struct rtw_cardbus_product { 170 u_int32_t rcp_vendor; /* PCI vendor ID */ 171 u_int32_t rcp_product; /* PCI product ID */ 172 const char *rcp_product_name; 173 } rtw_cardbus_products[] = { 174 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180, 175 "Realtek RTL8180 802.11 MAC/BBP" }, 176 177 { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6020V3, 178 "Belkin F5D6020v3 802.11b (RTL8180 MAC/BBP)" }, 179 180 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DWL610, 181 "DWL-610 D-Link Air 802.11b (RTL8180 MAC/BBP)" }, 182 183 { 0, 0, NULL }, 184 }; 185 186 const struct rtw_cardbus_product * 187 rtw_cardbus_lookup(const struct cardbus_attach_args *ca) 188 { 189 const struct rtw_cardbus_product *rcp; 190 191 for (rcp = rtw_cardbus_products; 192 rcp->rcp_product_name != NULL; 193 rcp++) { 194 if (PCI_VENDOR(ca->ca_id) == rcp->rcp_vendor && 195 PCI_PRODUCT(ca->ca_id) == rcp->rcp_product) 196 return (rcp); 197 } 198 return (NULL); 199 } 200 201 int 202 rtw_cardbus_match(struct device *parent, struct cfdata *match, 203 void *aux) 204 { 205 struct cardbus_attach_args *ca = aux; 206 207 if (rtw_cardbus_lookup(ca) != NULL) 208 return (1); 209 210 return (0); 211 } 212 213 static void 214 rtw_cardbus_intr_ack(struct rtw_regs *regs) 215 { 216 RTW_WRITE(regs, RTW_FER, RTW_FER_INTR); 217 } 218 219 static void 220 rtw_cardbus_funcregen(struct rtw_regs *regs, int enable) 221 { 222 u_int32_t reg; 223 rtw_config0123_enable(regs, 1); 224 reg = RTW_READ(regs, RTW_CONFIG3); 225 if (enable) { 226 RTW_WRITE(regs, RTW_CONFIG3, reg | RTW_CONFIG3_FUNCREGEN); 227 } else { 228 RTW_WRITE(regs, RTW_CONFIG3, reg & ~RTW_CONFIG3_FUNCREGEN); 229 } 230 rtw_config0123_enable(regs, 0); 231 } 232 233 void 234 rtw_cardbus_attach(struct device *parent, struct device *self, 235 void *aux) 236 { 237 struct rtw_cardbus_softc *csc = device_private(self); 238 struct rtw_softc *sc = &csc->sc_rtw; 239 struct rtw_regs *regs = &sc->sc_regs; 240 struct cardbus_attach_args *ca = aux; 241 cardbus_devfunc_t ct = ca->ca_ct; 242 const struct rtw_cardbus_product *rcp; 243 bus_addr_t adr; 244 int rev; 245 246 sc->sc_dmat = ca->ca_dmat; 247 csc->sc_ct = ct; 248 csc->sc_tag = ca->ca_tag; 249 250 rcp = rtw_cardbus_lookup(ca); 251 if (rcp == NULL) { 252 printf("\n"); 253 panic("rtw_cardbus_attach: impossible"); 254 } 255 256 /* 257 * Power management hooks. 258 */ 259 sc->sc_enable = rtw_cardbus_enable; 260 sc->sc_disable = rtw_cardbus_disable; 261 sc->sc_power = rtw_cardbus_power; 262 263 sc->sc_intr_ack = rtw_cardbus_intr_ack; 264 265 /* Get revision info. */ 266 rev = PCI_REVISION(ca->ca_class); 267 268 printf(": %s\n", rcp->rcp_product_name); 269 270 RTW_DPRINTF(RTW_DEBUG_ATTACH, 271 ("%s: pass %d.%d signature %08x\n", sc->sc_dev.dv_xname, 272 (rev >> 4) & 0xf, rev & 0xf, 273 cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80))); 274 275 /* 276 * Map the device. 277 */ 278 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE; 279 if (Cardbus_mapreg_map(ct, RTW_PCI_MMBA, 280 CARDBUS_MAPREG_TYPE_MEM, 0, ®s->r_bt, ®s->r_bh, &adr, 281 &csc->sc_mapsize) == 0) { 282 RTW_DPRINTF(RTW_DEBUG_ATTACH, 283 ("%s: %s mapped %lu bytes mem space\n", 284 sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize)); 285 #if rbus 286 #else 287 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 288 #endif 289 csc->sc_cben = CARDBUS_MEM_ENABLE; 290 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE; 291 csc->sc_bar_reg = RTW_PCI_MMBA; 292 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; 293 } else if (Cardbus_mapreg_map(ct, RTW_PCI_IOBA, 294 CARDBUS_MAPREG_TYPE_IO, 0, ®s->r_bt, ®s->r_bh, &adr, 295 &csc->sc_mapsize) == 0) { 296 RTW_DPRINTF(RTW_DEBUG_ATTACH, 297 ("%s: %s mapped %lu bytes I/O space\n", 298 sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize)); 299 #if rbus 300 #else 301 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 302 #endif 303 csc->sc_cben = CARDBUS_IO_ENABLE; 304 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE; 305 csc->sc_bar_reg = RTW_PCI_IOBA; 306 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 307 } else { 308 printf("%s: unable to map device registers\n", 309 sc->sc_dev.dv_xname); 310 return; 311 } 312 313 /* 314 * Bring the chip out of powersave mode and initialize the 315 * configuration registers. 316 */ 317 rtw_cardbus_setup(csc); 318 319 /* Remember which interrupt line. */ 320 csc->sc_intrline = ca->ca_intrline; 321 322 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname, 323 csc->sc_intrline); 324 /* 325 * Finish off the attach. 326 */ 327 rtw_attach(sc); 328 329 rtw_cardbus_funcregen(regs, 1); 330 331 RTW_WRITE(regs, RTW_FEMR, RTW_FEMR_INTR); 332 RTW_WRITE(regs, RTW_FER, RTW_FER_INTR); 333 334 /* 335 * Power down the socket. 336 */ 337 Cardbus_function_disable(csc->sc_ct); 338 } 339 340 int 341 rtw_cardbus_detach(struct device *self, int flags) 342 { 343 struct rtw_cardbus_softc *csc = device_private(self); 344 struct rtw_softc *sc = &csc->sc_rtw; 345 struct rtw_regs *regs = &sc->sc_regs; 346 struct cardbus_devfunc *ct = csc->sc_ct; 347 int rv; 348 349 #if defined(DIAGNOSTIC) 350 if (ct == NULL) 351 panic("%s: data structure lacks", sc->sc_dev.dv_xname); 352 #endif 353 354 rv = rtw_detach(sc); 355 if (rv) 356 return (rv); 357 358 rtw_cardbus_funcregen(regs, 0); 359 360 /* 361 * Unhook the interrupt handler. 362 */ 363 if (csc->sc_ih != NULL) 364 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih); 365 366 /* 367 * Release bus space and close window. 368 */ 369 if (csc->sc_bar_reg != 0) 370 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 371 regs->r_bt, regs->r_bh, csc->sc_mapsize); 372 373 return (0); 374 } 375 376 int 377 rtw_cardbus_enable(struct rtw_softc *sc) 378 { 379 struct rtw_cardbus_softc *csc = (void *) sc; 380 cardbus_devfunc_t ct = csc->sc_ct; 381 cardbus_chipset_tag_t cc = ct->ct_cc; 382 cardbus_function_tag_t cf = ct->ct_cf; 383 384 /* 385 * Power on the socket. 386 */ 387 Cardbus_function_enable(ct); 388 389 /* 390 * Set up the PCI configuration registers. 391 */ 392 rtw_cardbus_setup(csc); 393 394 /* 395 * Map and establish the interrupt. 396 */ 397 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET, 398 rtw_intr, sc); 399 if (csc->sc_ih == NULL) { 400 printf("%s: unable to establish interrupt at %d\n", 401 sc->sc_dev.dv_xname, csc->sc_intrline); 402 Cardbus_function_disable(csc->sc_ct); 403 return (1); 404 } 405 406 rtw_cardbus_funcregen(&sc->sc_regs, 1); 407 408 RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR); 409 RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR); 410 411 return (0); 412 } 413 414 void 415 rtw_cardbus_disable(struct rtw_softc *sc) 416 { 417 struct rtw_cardbus_softc *csc = (void *) sc; 418 cardbus_devfunc_t ct = csc->sc_ct; 419 cardbus_chipset_tag_t cc = ct->ct_cc; 420 cardbus_function_tag_t cf = ct->ct_cf; 421 422 RTW_WRITE(&sc->sc_regs, RTW_FEMR, 423 RTW_READ(&sc->sc_regs, RTW_FEMR) & ~RTW_FEMR_INTR); 424 425 rtw_cardbus_funcregen(&sc->sc_regs, 0); 426 427 /* Unhook the interrupt handler. */ 428 cardbus_intr_disestablish(cc, cf, csc->sc_ih); 429 csc->sc_ih = NULL; 430 431 /* Power down the socket. */ 432 Cardbus_function_disable(ct); 433 } 434 435 void 436 rtw_cardbus_power(struct rtw_softc *sc, int why) 437 { 438 struct rtw_cardbus_softc *csc = (void *) sc; 439 440 RTW_DPRINTF(RTW_DEBUG_ATTACH, 441 ("%s: rtw_cardbus_power\n", sc->sc_dev.dv_xname)); 442 443 if (why == PWR_RESUME) { 444 /* 445 * Give the PCI configuration registers a kick 446 * in the head. 447 */ 448 #ifdef DIAGNOSTIC 449 if ((sc->sc_flags & RTW_F_ENABLED) == 0) 450 panic("rtw_cardbus_power"); 451 #endif 452 rtw_cardbus_setup(csc); 453 } 454 } 455 456 void 457 rtw_cardbus_setup(struct rtw_cardbus_softc *csc) 458 { 459 struct rtw_softc *sc = &csc->sc_rtw; 460 cardbus_devfunc_t ct = csc->sc_ct; 461 cardbus_chipset_tag_t cc = ct->ct_cc; 462 cardbus_function_tag_t cf = ct->ct_cf; 463 pcireg_t reg; 464 int pmreg; 465 466 if (cardbus_get_capability(cc, cf, csc->sc_tag, 467 PCI_CAP_PWRMGMT, &pmreg, 0)) { 468 reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03; 469 #if 1 /* XXX Probably not right for CardBus. */ 470 if (reg == 3) { 471 /* 472 * The card has lost all configuration data in 473 * this state, so punt. 474 */ 475 printf("%s: unable to wake up from power state D3\n", 476 sc->sc_dev.dv_xname); 477 return; 478 } 479 #endif 480 if (reg != 0) { 481 printf("%s: waking up from power state D%d\n", 482 sc->sc_dev.dv_xname, reg); 483 cardbus_conf_write(cc, cf, csc->sc_tag, 484 pmreg + 4, 0); 485 } 486 } 487 488 /* Program the BAR. */ 489 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg, 490 csc->sc_bar_val); 491 492 /* Make sure the right access type is on the CardBus bridge. */ 493 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben); 494 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 495 496 /* Enable the appropriate bits in the PCI CSR. */ 497 reg = cardbus_conf_read(cc, cf, csc->sc_tag, 498 CARDBUS_COMMAND_STATUS_REG); 499 reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE); 500 reg |= csc->sc_csr; 501 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG, 502 reg); 503 504 /* 505 * Make sure the latency timer is set to some reasonable 506 * value. 507 */ 508 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG); 509 if (CARDBUS_LATTIMER(reg) < RTW_LATTIMER) { 510 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT); 511 reg |= (RTW_LATTIMER << CARDBUS_LATTIMER_SHIFT); 512 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg); 513 } 514 } 515
Indexes created Tue Sep 30 07:10:03 GMT 2025