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if_rtw_cardbus.c revision 1.17
      1 /* $NetBSD: if_rtw_cardbus.c,v 1.17 2007/11/16 18:46:23 dyoung Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2004, 2005 David Young.  All rights reserved.
      5  *
      6  * Adapted for the RTL8180 by David Young.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. The name of David Young may not be used to endorse or promote
     17  *    products derived from this software without specific prior
     18  *    written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
     21  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     22  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
     23  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL David
     24  * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     25  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
     26  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     28  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     29  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
     31  * OF SUCH DAMAGE.
     32  */
     33 /*-
     34  * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
     35  * All rights reserved.
     36  *
     37  * This code is derived from software contributed to The NetBSD Foundation
     38  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
     39  * NASA Ames Research Center.
     40  *
     41  * Redistribution and use in source and binary forms, with or without
     42  * modification, are permitted provided that the following conditions
     43  * are met:
     44  * 1. Redistributions of source code must retain the above copyright
     45  *    notice, this list of conditions and the following disclaimer.
     46  * 2. Redistributions in binary form must reproduce the above copyright
     47  *    notice, this list of conditions and the following disclaimer in the
     48  *    documentation and/or other materials provided with the distribution.
     49  * 3. All advertising materials mentioning features or use of this software
     50  *    must display the following acknowledgement:
     51  *	This product includes software developed by the NetBSD
     52  *	Foundation, Inc. and its contributors.
     53  * 4. Neither the name of The NetBSD Foundation nor the names of its
     54  *    contributors may be used to endorse or promote products derived
     55  *    from this software without specific prior written permission.
     56  *
     57  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     58  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     59  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     60  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     61  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     62  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     63  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     64  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     65  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     66  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     67  * POSSIBILITY OF SUCH DAMAGE.
     68  */
     69 
     70 /*
     71  * Cardbus front-end for the Realtek RTL8180 802.11 MAC/BBP driver.
     72  *
     73  * TBD factor with atw, tlp Cardbus front-ends?
     74  */
     75 
     76 #include <sys/cdefs.h>
     77 __KERNEL_RCSID(0, "$NetBSD: if_rtw_cardbus.c,v 1.17 2007/11/16 18:46:23 dyoung Exp $");
     78 
     79 #include "opt_inet.h"
     80 #include "bpfilter.h"
     81 
     82 #include <sys/param.h>
     83 #include <sys/systm.h>
     84 #include <sys/mbuf.h>
     85 #include <sys/malloc.h>
     86 #include <sys/kernel.h>
     87 #include <sys/socket.h>
     88 #include <sys/ioctl.h>
     89 #include <sys/errno.h>
     90 #include <sys/device.h>
     91 
     92 #include <machine/endian.h>
     93 
     94 #include <net/if.h>
     95 #include <net/if_dl.h>
     96 #include <net/if_media.h>
     97 #include <net/if_ether.h>
     98 
     99 #include <net80211/ieee80211_netbsd.h>
    100 #include <net80211/ieee80211_radiotap.h>
    101 #include <net80211/ieee80211_var.h>
    102 
    103 #if NBPFILTER > 0
    104 #include <net/bpf.h>
    105 #endif
    106 
    107 #ifdef INET
    108 #include <netinet/in.h>
    109 #include <netinet/if_inarp.h>
    110 #endif
    111 
    112 
    113 #include <sys/bus.h>
    114 #include <sys/intr.h>
    115 
    116 #include <dev/ic/rtwreg.h>
    117 #include <dev/ic/rtwvar.h>
    118 
    119 #include <dev/pci/pcivar.h>
    120 #include <dev/pci/pcireg.h>
    121 #include <dev/pci/pcidevs.h>
    122 
    123 #include <dev/cardbus/cardbusvar.h>
    124 #include <dev/pci/pcidevs.h>
    125 
    126 /*
    127  * PCI configuration space registers used by the RTL8180.
    128  */
    129 #define	RTW_PCI_IOBA		0x10	/* i/o mapped base */
    130 #define	RTW_PCI_MMBA		0x14	/* memory mapped base */
    131 
    132 struct rtw_cardbus_softc {
    133 	struct rtw_softc sc_rtw;	/* real RTL8180 softc */
    134 
    135 	/* CardBus-specific goo. */
    136 	void			*sc_ih;		/* interrupt handle */
    137 	cardbus_devfunc_t	sc_ct;		/* our CardBus devfuncs */
    138 	cardbustag_t		sc_tag;		/* our CardBus tag */
    139 	int			sc_csr;		/* CSR bits */
    140 	bus_size_t		sc_mapsize;	/* size of the mapped bus space
    141 						 * region
    142 						 */
    143 
    144 	int			sc_cben;	/* CardBus enables */
    145 	int			sc_bar_reg;	/* which BAR to use */
    146 	pcireg_t		sc_bar_val;	/* value of the BAR */
    147 
    148 	int			sc_intrline;	/* interrupt line */
    149 };
    150 
    151 int	rtw_cardbus_match(struct device *, struct cfdata *, void *);
    152 void	rtw_cardbus_attach(struct device *, struct device *, void *);
    153 int	rtw_cardbus_detach(struct device *, int);
    154 
    155 CFATTACH_DECL(rtw_cardbus, sizeof(struct rtw_cardbus_softc),
    156     rtw_cardbus_match, rtw_cardbus_attach, rtw_cardbus_detach, rtw_activate);
    157 
    158 void	rtw_cardbus_setup(struct rtw_cardbus_softc *);
    159 
    160 int rtw_cardbus_enable(struct rtw_softc *);
    161 void rtw_cardbus_disable(struct rtw_softc *);
    162 void rtw_cardbus_power(struct rtw_softc *, int);
    163 
    164 const struct rtw_cardbus_product *rtw_cardbus_lookup(
    165      const struct cardbus_attach_args *);
    166 
    167 const struct rtw_cardbus_product {
    168 	u_int32_t	 rcp_vendor;	/* PCI vendor ID */
    169 	u_int32_t	 rcp_product;	/* PCI product ID */
    170 	const char	*rcp_product_name;
    171 } rtw_cardbus_products[] = {
    172 	{ PCI_VENDOR_REALTEK,		PCI_PRODUCT_REALTEK_RT8180,
    173 	  "Realtek RTL8180 802.11 MAC/BBP" },
    174 
    175 	{ PCI_VENDOR_BELKIN,		PCI_PRODUCT_BELKIN_F5D6020V3,
    176 	  "Belkin F5D6020v3 802.11b (RTL8180 MAC/BBP)" },
    177 
    178 	{ PCI_VENDOR_DLINK,		PCI_PRODUCT_DLINK_DWL610,
    179 	  "DWL-610 D-Link Air 802.11b (RTL8180 MAC/BBP)" },
    180 
    181 	{ 0,				0,	NULL },
    182 };
    183 
    184 const struct rtw_cardbus_product *
    185 rtw_cardbus_lookup(const struct cardbus_attach_args *ca)
    186 {
    187 	const struct rtw_cardbus_product *rcp;
    188 
    189 	for (rcp = rtw_cardbus_products;
    190 	     rcp->rcp_product_name != NULL;
    191 	     rcp++) {
    192 		if (PCI_VENDOR(ca->ca_id) == rcp->rcp_vendor &&
    193 		    PCI_PRODUCT(ca->ca_id) == rcp->rcp_product)
    194 			return (rcp);
    195 	}
    196 	return (NULL);
    197 }
    198 
    199 int
    200 rtw_cardbus_match(struct device *parent, struct cfdata *match,
    201     void *aux)
    202 {
    203 	struct cardbus_attach_args *ca = aux;
    204 
    205 	if (rtw_cardbus_lookup(ca) != NULL)
    206 		return (1);
    207 
    208 	return (0);
    209 }
    210 
    211 static void
    212 rtw_cardbus_intr_ack(struct rtw_regs *regs)
    213 {
    214 	RTW_WRITE(regs, RTW_FER, RTW_FER_INTR);
    215 }
    216 
    217 static void
    218 rtw_cardbus_funcregen(struct rtw_regs *regs, int enable)
    219 {
    220 	u_int32_t reg;
    221 	rtw_config0123_enable(regs, 1);
    222 	reg = RTW_READ(regs, RTW_CONFIG3);
    223 	if (enable) {
    224 		RTW_WRITE(regs, RTW_CONFIG3, reg | RTW_CONFIG3_FUNCREGEN);
    225 	} else {
    226 		RTW_WRITE(regs, RTW_CONFIG3, reg & ~RTW_CONFIG3_FUNCREGEN);
    227 	}
    228 	rtw_config0123_enable(regs, 0);
    229 }
    230 
    231 void
    232 rtw_cardbus_attach(struct device *parent, struct device *self,
    233     void *aux)
    234 {
    235 	struct rtw_cardbus_softc *csc = device_private(self);
    236 	struct rtw_softc *sc = &csc->sc_rtw;
    237 	struct rtw_regs *regs = &sc->sc_regs;
    238 	struct cardbus_attach_args *ca = aux;
    239 	cardbus_devfunc_t ct = ca->ca_ct;
    240 	const struct rtw_cardbus_product *rcp;
    241 	bus_addr_t adr;
    242 	int rev;
    243 
    244 	sc->sc_dmat = ca->ca_dmat;
    245 	csc->sc_ct = ct;
    246 	csc->sc_tag = ca->ca_tag;
    247 
    248 	rcp = rtw_cardbus_lookup(ca);
    249 	if (rcp == NULL) {
    250 		printf("\n");
    251 		panic("rtw_cardbus_attach: impossible");
    252 	}
    253 
    254 	/*
    255 	 * Power management hooks.
    256 	 */
    257 	sc->sc_enable = rtw_cardbus_enable;
    258 	sc->sc_disable = rtw_cardbus_disable;
    259 	sc->sc_power = rtw_cardbus_power;
    260 
    261 	sc->sc_intr_ack = rtw_cardbus_intr_ack;
    262 
    263 	/* Get revision info. */
    264 	rev = PCI_REVISION(ca->ca_class);
    265 
    266 	printf(": %s\n", rcp->rcp_product_name);
    267 
    268 	RTW_DPRINTF(RTW_DEBUG_ATTACH,
    269 	    ("%s: pass %d.%d signature %08x\n", sc->sc_dev.dv_xname,
    270 	     (rev >> 4) & 0xf, rev & 0xf,
    271 	     cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80)));
    272 
    273 	/*
    274 	 * Map the device.
    275 	 */
    276 	csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE;
    277 	if (Cardbus_mapreg_map(ct, RTW_PCI_MMBA,
    278 	    CARDBUS_MAPREG_TYPE_MEM, 0, &regs->r_bt, &regs->r_bh, &adr,
    279 	    &csc->sc_mapsize) == 0) {
    280 		RTW_DPRINTF(RTW_DEBUG_ATTACH,
    281 		    ("%s: %s mapped %lu bytes mem space\n",
    282 		     sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize));
    283 #if rbus
    284 #else
    285 		(*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
    286 #endif
    287 		csc->sc_cben = CARDBUS_MEM_ENABLE;
    288 		csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE;
    289 		csc->sc_bar_reg = RTW_PCI_MMBA;
    290 		csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM;
    291 	} else if (Cardbus_mapreg_map(ct, RTW_PCI_IOBA,
    292 	    CARDBUS_MAPREG_TYPE_IO, 0, &regs->r_bt, &regs->r_bh, &adr,
    293 	    &csc->sc_mapsize) == 0) {
    294 		RTW_DPRINTF(RTW_DEBUG_ATTACH,
    295 		    ("%s: %s mapped %lu bytes I/O space\n",
    296 		     sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize));
    297 #if rbus
    298 #else
    299 		(*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
    300 #endif
    301 		csc->sc_cben = CARDBUS_IO_ENABLE;
    302 		csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE;
    303 		csc->sc_bar_reg = RTW_PCI_IOBA;
    304 		csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO;
    305 	} else {
    306 		printf("%s: unable to map device registers\n",
    307 		    sc->sc_dev.dv_xname);
    308 		return;
    309 	}
    310 
    311 	/*
    312 	 * Bring the chip out of powersave mode and initialize the
    313 	 * configuration registers.
    314 	 */
    315 	rtw_cardbus_setup(csc);
    316 
    317 	/* Remember which interrupt line. */
    318 	csc->sc_intrline = ca->ca_intrline;
    319 
    320 	printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname,
    321 	    csc->sc_intrline);
    322 	/*
    323 	 * Finish off the attach.
    324 	 */
    325 	rtw_attach(sc);
    326 
    327 	rtw_cardbus_funcregen(regs, 1);
    328 
    329 	RTW_WRITE(regs, RTW_FEMR, RTW_FEMR_INTR);
    330 	RTW_WRITE(regs, RTW_FER, RTW_FER_INTR);
    331 
    332 	/*
    333 	 * Power down the socket.
    334 	 */
    335 	Cardbus_function_disable(csc->sc_ct);
    336 }
    337 
    338 int
    339 rtw_cardbus_detach(struct device *self, int flags)
    340 {
    341 	struct rtw_cardbus_softc *csc = device_private(self);
    342 	struct rtw_softc *sc = &csc->sc_rtw;
    343 	struct rtw_regs *regs = &sc->sc_regs;
    344 	struct cardbus_devfunc *ct = csc->sc_ct;
    345 	int rv;
    346 
    347 #if defined(DIAGNOSTIC)
    348 	if (ct == NULL)
    349 		panic("%s: data structure lacks", sc->sc_dev.dv_xname);
    350 #endif
    351 
    352 	rv = rtw_detach(sc);
    353 	if (rv)
    354 		return (rv);
    355 
    356 	rtw_cardbus_funcregen(regs, 0);
    357 
    358 	/*
    359 	 * Unhook the interrupt handler.
    360 	 */
    361 	if (csc->sc_ih != NULL)
    362 		cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
    363 
    364 	/*
    365 	 * Release bus space and close window.
    366 	 */
    367 	if (csc->sc_bar_reg != 0)
    368 		Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
    369 		    regs->r_bt, regs->r_bh, csc->sc_mapsize);
    370 
    371 	return (0);
    372 }
    373 
    374 int
    375 rtw_cardbus_enable(struct rtw_softc *sc)
    376 {
    377 	struct rtw_cardbus_softc *csc = (void *) sc;
    378 	cardbus_devfunc_t ct = csc->sc_ct;
    379 	cardbus_chipset_tag_t cc = ct->ct_cc;
    380 	cardbus_function_tag_t cf = ct->ct_cf;
    381 
    382 	/*
    383 	 * Power on the socket.
    384 	 */
    385 	Cardbus_function_enable(ct);
    386 
    387 	/*
    388 	 * Set up the PCI configuration registers.
    389 	 */
    390 	rtw_cardbus_setup(csc);
    391 
    392 	/*
    393 	 * Map and establish the interrupt.
    394 	 */
    395 	csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
    396 	    rtw_intr, sc);
    397 	if (csc->sc_ih == NULL) {
    398 		printf("%s: unable to establish interrupt at %d\n",
    399 		    sc->sc_dev.dv_xname, csc->sc_intrline);
    400 		Cardbus_function_disable(csc->sc_ct);
    401 		return (1);
    402 	}
    403 
    404 	rtw_cardbus_funcregen(&sc->sc_regs, 1);
    405 
    406 	RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR);
    407 	RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR);
    408 
    409 	return (0);
    410 }
    411 
    412 void
    413 rtw_cardbus_disable(struct rtw_softc *sc)
    414 {
    415 	struct rtw_cardbus_softc *csc = (void *) sc;
    416 	cardbus_devfunc_t ct = csc->sc_ct;
    417 	cardbus_chipset_tag_t cc = ct->ct_cc;
    418 	cardbus_function_tag_t cf = ct->ct_cf;
    419 
    420 	RTW_WRITE(&sc->sc_regs, RTW_FEMR,
    421 	    RTW_READ(&sc->sc_regs, RTW_FEMR) & ~RTW_FEMR_INTR);
    422 
    423 	rtw_cardbus_funcregen(&sc->sc_regs, 0);
    424 
    425 	/* Unhook the interrupt handler. */
    426 	cardbus_intr_disestablish(cc, cf, csc->sc_ih);
    427 	csc->sc_ih = NULL;
    428 
    429 	/* Power down the socket. */
    430 	Cardbus_function_disable(ct);
    431 }
    432 
    433 void
    434 rtw_cardbus_power(struct rtw_softc *sc, int why)
    435 {
    436 	struct rtw_cardbus_softc *csc = (void *) sc;
    437 
    438 	RTW_DPRINTF(RTW_DEBUG_ATTACH,
    439 	    ("%s: rtw_cardbus_power\n", sc->sc_dev.dv_xname));
    440 
    441 	if (why == PWR_RESUME) {
    442 		/*
    443 		 * Give the PCI configuration registers a kick
    444 		 * in the head.
    445 		 */
    446 #ifdef DIAGNOSTIC
    447 		if ((sc->sc_flags & RTW_F_ENABLED) == 0)
    448 			panic("rtw_cardbus_power");
    449 #endif
    450 		rtw_cardbus_setup(csc);
    451 	}
    452 }
    453 
    454 void
    455 rtw_cardbus_setup(struct rtw_cardbus_softc *csc)
    456 {
    457 	struct rtw_softc *sc = &csc->sc_rtw;
    458 	cardbustag_t tag = csc->sc_tag;
    459 	cardbus_devfunc_t ct = csc->sc_ct;
    460 	cardbus_chipset_tag_t cc = ct->ct_cc;
    461 	cardbusreg_t bhlc, csr, lattimer;
    462 	cardbus_function_tag_t cf = ct->ct_cf;
    463 
    464 	(void)cardbus_setpowerstate(device_xname(&sc->sc_dev), ct, tag,
    465 	    PCI_PWR_D0);
    466 
    467 	/* I believe the datasheet tries to warn us that the RTL8180
    468 	 * wants for 16 (0x10) to divide the latency timer.
    469 	 */
    470 	bhlc = cardbus_conf_read(cc, cf, tag, CARDBUS_BHLC_REG);
    471 	lattimer = rounddown(PCI_LATTIMER(bhlc), 0x10);
    472 	if (PCI_LATTIMER(bhlc) != lattimer) {
    473 		bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
    474 		bhlc |= (lattimer << PCI_LATTIMER_SHIFT);
    475 		cardbus_conf_write(cc, cf, tag, CARDBUS_BHLC_REG, bhlc);
    476 	}
    477 
    478 	/* Program the BAR. */
    479 	cardbus_conf_write(cc, cf, tag, csc->sc_bar_reg, csc->sc_bar_val);
    480 
    481 	/* Make sure the right access type is on the CardBus bridge. */
    482 	(*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
    483 	(*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
    484 
    485 	/* Enable the appropriate bits in the PCI CSR. */
    486 	csr = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG);
    487 	csr &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
    488 	csr |= csc->sc_csr;
    489 	csr |= CARDBUS_COMMAND_PARITY_ENABLE | CARDBUS_COMMAND_SERR_ENABLE;
    490 	cardbus_conf_write(cc, cf, tag, PCI_COMMAND_STATUS_REG, csr);
    491 }
    492