if_rtw_cardbus.c revision 1.2
1 /* $NetBSD: if_rtw_cardbus.c,v 1.2 2004/10/09 07:09:40 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 2004, 2005 David Young. All rights reserved. 5 * 6 * Adapted for the RTL8180 by David Young. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of David Young may not be used to endorse or promote 17 * products derived from this software without specific prior 18 * written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY 21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 23 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David 24 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 26 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 31 * OF SUCH DAMAGE. 32 */ 33 /*- 34 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 35 * All rights reserved. 36 * 37 * This code is derived from software contributed to The NetBSD Foundation 38 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 39 * NASA Ames Research Center. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by the NetBSD 52 * Foundation, Inc. and its contributors. 53 * 4. Neither the name of The NetBSD Foundation nor the names of its 54 * contributors may be used to endorse or promote products derived 55 * from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 58 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 * POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 /* 71 * Cardbus front-end for the Realtek RTL8180 802.11 MAC/BBP driver. 72 * 73 * TBD factor with atw, tlp Cardbus front-ends? 74 */ 75 76 #include <sys/cdefs.h> 77 __KERNEL_RCSID(0, "$NetBSD: if_rtw_cardbus.c,v 1.2 2004/10/09 07:09:40 mycroft Exp $"); 78 79 #include "opt_inet.h" 80 #include "opt_ns.h" 81 #include "bpfilter.h" 82 83 #include <sys/param.h> 84 #include <sys/systm.h> 85 #include <sys/mbuf.h> 86 #include <sys/malloc.h> 87 #include <sys/kernel.h> 88 #include <sys/socket.h> 89 #include <sys/ioctl.h> 90 #include <sys/errno.h> 91 #include <sys/device.h> 92 93 #include <machine/endian.h> 94 95 #include <net/if.h> 96 #include <net/if_dl.h> 97 #include <net/if_media.h> 98 #include <net/if_ether.h> 99 100 #include <net80211/ieee80211_compat.h> 101 #include <net80211/ieee80211_radiotap.h> 102 #include <net80211/ieee80211_var.h> 103 104 #if NBPFILTER > 0 105 #include <net/bpf.h> 106 #endif 107 108 #ifdef INET 109 #include <netinet/in.h> 110 #include <netinet/if_inarp.h> 111 #endif 112 113 #ifdef NS 114 #include <netns/ns.h> 115 #include <netns/ns_if.h> 116 #endif 117 118 #include <machine/bus.h> 119 #include <machine/intr.h> 120 121 #include <dev/ic/rtwreg.h> 122 #include <dev/ic/rtwvar.h> 123 124 #include <dev/pci/pcivar.h> 125 #include <dev/pci/pcireg.h> 126 #include <dev/pci/pcidevs.h> 127 128 #include <dev/cardbus/cardbusvar.h> 129 #include <dev/pci/pcidevs.h> 130 131 /* 132 * PCI configuration space registers used by the RTL8180. 133 */ 134 #define RTW_PCI_IOBA 0x10 /* i/o mapped base */ 135 #define RTW_PCI_MMBA 0x14 /* memory mapped base */ 136 137 struct rtw_cardbus_softc { 138 struct rtw_softc sc_rtw; /* real RTL8180 softc */ 139 140 /* CardBus-specific goo. */ 141 void *sc_ih; /* interrupt handle */ 142 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 143 cardbustag_t sc_tag; /* our CardBus tag */ 144 int sc_csr; /* CSR bits */ 145 bus_size_t sc_mapsize; /* size of the mapped bus space 146 * region 147 */ 148 149 int sc_cben; /* CardBus enables */ 150 int sc_bar_reg; /* which BAR to use */ 151 pcireg_t sc_bar_val; /* value of the BAR */ 152 153 int sc_intrline; /* interrupt line */ 154 }; 155 156 int rtw_cardbus_match(struct device *, struct cfdata *, void *); 157 void rtw_cardbus_attach(struct device *, struct device *, void *); 158 int rtw_cardbus_detach(struct device *, int); 159 160 CFATTACH_DECL(rtw_cardbus, sizeof(struct rtw_cardbus_softc), 161 rtw_cardbus_match, rtw_cardbus_attach, rtw_cardbus_detach, rtw_activate); 162 163 void rtw_cardbus_setup(struct rtw_cardbus_softc *); 164 165 int rtw_cardbus_enable(struct rtw_softc *); 166 void rtw_cardbus_disable(struct rtw_softc *); 167 void rtw_cardbus_power(struct rtw_softc *, int); 168 169 const struct rtw_cardbus_product *rtw_cardbus_lookup( 170 const struct cardbus_attach_args *); 171 172 const struct rtw_cardbus_product { 173 u_int32_t rcp_vendor; /* PCI vendor ID */ 174 u_int32_t rcp_product; /* PCI product ID */ 175 const char *rcp_product_name; 176 } rtw_cardbus_products[] = { 177 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180, 178 "Realtek RTL8180 802.11 MAC/BBP" }, 179 180 { 0, 0, NULL }, 181 }; 182 183 const struct rtw_cardbus_product * 184 rtw_cardbus_lookup(ca) 185 const struct cardbus_attach_args *ca; 186 { 187 const struct rtw_cardbus_product *rcp; 188 189 for (rcp = rtw_cardbus_products; 190 rcp->rcp_product_name != NULL; 191 rcp++) { 192 if (PCI_VENDOR(ca->ca_id) == rcp->rcp_vendor && 193 PCI_PRODUCT(ca->ca_id) == rcp->rcp_product) 194 return (rcp); 195 } 196 return (NULL); 197 } 198 199 int 200 rtw_cardbus_match(parent, match, aux) 201 struct device *parent; 202 struct cfdata *match; 203 void *aux; 204 { 205 struct cardbus_attach_args *ca = aux; 206 207 if (rtw_cardbus_lookup(ca) != NULL) 208 return (1); 209 210 return (0); 211 } 212 213 static void 214 rtw_cardbus_intr_ack(struct rtw_regs *regs) 215 { 216 RTW_WRITE(regs, RTW_FER, RTW_FER_INTR); 217 } 218 219 static void 220 rtw_cardbus_funcregen(struct rtw_regs *regs, int enable) 221 { 222 u_int32_t reg; 223 rtw_config0123_enable(regs, 1); 224 reg = RTW_READ(regs, RTW_CONFIG3); 225 if (enable) { 226 RTW_WRITE(regs, RTW_CONFIG3, reg | RTW_CONFIG3_FUNCREGEN); 227 } else { 228 RTW_WRITE(regs, RTW_CONFIG3, reg & ~RTW_CONFIG3_FUNCREGEN); 229 } 230 rtw_config0123_enable(regs, 0); 231 } 232 233 void 234 rtw_cardbus_attach(parent, self, aux) 235 struct device *parent, *self; 236 void *aux; 237 { 238 struct rtw_cardbus_softc *csc = (void *)self; 239 struct rtw_softc *sc = &csc->sc_rtw; 240 struct rtw_regs *regs = &sc->sc_regs; 241 struct cardbus_attach_args *ca = aux; 242 cardbus_devfunc_t ct = ca->ca_ct; 243 const struct rtw_cardbus_product *rcp; 244 bus_addr_t adr; 245 int rev; 246 247 sc->sc_dmat = ca->ca_dmat; 248 csc->sc_ct = ct; 249 csc->sc_tag = ca->ca_tag; 250 251 rcp = rtw_cardbus_lookup(ca); 252 if (rcp == NULL) { 253 printf("\n"); 254 panic("rtw_cardbus_attach: impossible"); 255 } 256 257 /* 258 * Power management hooks. 259 */ 260 sc->sc_enable = rtw_cardbus_enable; 261 sc->sc_disable = rtw_cardbus_disable; 262 sc->sc_power = rtw_cardbus_power; 263 264 sc->sc_intr_ack = rtw_cardbus_intr_ack; 265 266 /* Get revision info. */ 267 rev = PCI_REVISION(ca->ca_class); 268 269 printf(": %s\n", rcp->rcp_product_name); 270 271 #if 0 272 printf("%s: pass %d.%d signature %08x\n", sc->sc_dev.dv_xname, 273 (rev >> 4) & 0xf, rev & 0xf, 274 cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80)); 275 #endif 276 277 /* 278 * Map the device. 279 */ 280 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE; 281 if (Cardbus_mapreg_map(ct, RTW_PCI_MMBA, 282 CARDBUS_MAPREG_TYPE_MEM, 0, ®s->r_bt, ®s->r_bh, &adr, 283 &csc->sc_mapsize) == 0) { 284 printf("%s: %s mapped %lu bytes mem space\n", 285 sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize); 286 #if rbus 287 #else 288 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 289 #endif 290 csc->sc_cben = CARDBUS_MEM_ENABLE; 291 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE; 292 csc->sc_bar_reg = RTW_PCI_MMBA; 293 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; 294 } else if (Cardbus_mapreg_map(ct, RTW_PCI_IOBA, 295 CARDBUS_MAPREG_TYPE_IO, 0, ®s->r_bt, ®s->r_bh, &adr, 296 &csc->sc_mapsize) == 0) { 297 printf("%s: %s mapped %lu bytes I/O space\n", 298 sc->sc_dev.dv_xname, __func__, (long)csc->sc_mapsize); 299 #if rbus 300 #else 301 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 302 #endif 303 csc->sc_cben = CARDBUS_IO_ENABLE; 304 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE; 305 csc->sc_bar_reg = RTW_PCI_IOBA; 306 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 307 } else { 308 printf("%s: unable to map device registers\n", 309 sc->sc_dev.dv_xname); 310 return; 311 } 312 313 /* 314 * Bring the chip out of powersave mode and initialize the 315 * configuration registers. 316 */ 317 rtw_cardbus_setup(csc); 318 319 /* Remember which interrupt line. */ 320 csc->sc_intrline = ca->ca_intrline; 321 322 printf("%s: interrupting at %d\n", sc->sc_dev.dv_xname, 323 csc->sc_intrline); 324 /* 325 * Finish off the attach. 326 */ 327 rtw_attach(sc); 328 329 rtw_cardbus_funcregen(regs, 1); 330 331 RTW_WRITE(regs, RTW_FEMR, RTW_FEMR_INTR); 332 RTW_WRITE(regs, RTW_FER, RTW_FER_INTR); 333 334 /* 335 * Power down the socket. 336 */ 337 Cardbus_function_disable(csc->sc_ct); 338 } 339 340 int 341 rtw_cardbus_detach(self, flags) 342 struct device *self; 343 int flags; 344 { 345 struct rtw_cardbus_softc *csc = (void *)self; 346 struct rtw_softc *sc = &csc->sc_rtw; 347 struct rtw_regs *regs = &sc->sc_regs; 348 struct cardbus_devfunc *ct = csc->sc_ct; 349 int rv; 350 351 #if defined(DIAGNOSTIC) 352 if (ct == NULL) 353 panic("%s: data structure lacks", sc->sc_dev.dv_xname); 354 #endif 355 356 rv = rtw_detach(sc); 357 if (rv) 358 return (rv); 359 360 rtw_cardbus_funcregen(regs, 0); 361 362 /* 363 * Unhook the interrupt handler. 364 */ 365 if (csc->sc_ih != NULL) 366 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih); 367 368 /* 369 * Release bus space and close window. 370 */ 371 if (csc->sc_bar_reg != 0) 372 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 373 regs->r_bt, regs->r_bh, csc->sc_mapsize); 374 375 return (0); 376 } 377 378 int 379 rtw_cardbus_enable(sc) 380 struct rtw_softc *sc; 381 { 382 struct rtw_cardbus_softc *csc = (void *) sc; 383 cardbus_devfunc_t ct = csc->sc_ct; 384 cardbus_chipset_tag_t cc = ct->ct_cc; 385 cardbus_function_tag_t cf = ct->ct_cf; 386 387 /* 388 * Power on the socket. 389 */ 390 Cardbus_function_enable(ct); 391 392 /* 393 * Set up the PCI configuration registers. 394 */ 395 rtw_cardbus_setup(csc); 396 397 /* 398 * Map and establish the interrupt. 399 */ 400 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET, 401 rtw_intr, sc); 402 if (csc->sc_ih == NULL) { 403 printf("%s: unable to establish interrupt at %d\n", 404 sc->sc_dev.dv_xname, csc->sc_intrline); 405 Cardbus_function_disable(csc->sc_ct); 406 return (1); 407 } 408 409 rtw_cardbus_funcregen(&sc->sc_regs, 1); 410 411 RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR); 412 RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR); 413 414 return (0); 415 } 416 417 void 418 rtw_cardbus_disable(sc) 419 struct rtw_softc *sc; 420 { 421 struct rtw_cardbus_softc *csc = (void *) sc; 422 cardbus_devfunc_t ct = csc->sc_ct; 423 cardbus_chipset_tag_t cc = ct->ct_cc; 424 cardbus_function_tag_t cf = ct->ct_cf; 425 426 RTW_WRITE(&sc->sc_regs, RTW_FEMR, 427 RTW_READ(&sc->sc_regs, RTW_FEMR) & ~RTW_FEMR_INTR); 428 429 rtw_cardbus_funcregen(&sc->sc_regs, 0); 430 431 /* Unhook the interrupt handler. */ 432 cardbus_intr_disestablish(cc, cf, csc->sc_ih); 433 csc->sc_ih = NULL; 434 435 /* Power down the socket. */ 436 Cardbus_function_disable(ct); 437 } 438 439 void 440 rtw_cardbus_power(sc, why) 441 struct rtw_softc *sc; 442 int why; 443 { 444 struct rtw_cardbus_softc *csc = (void *) sc; 445 446 printf("%s: rtw_cardbus_power\n", sc->sc_dev.dv_xname); 447 448 if (why == PWR_RESUME) { 449 /* 450 * Give the PCI configuration registers a kick 451 * in the head. 452 */ 453 #ifdef DIAGNOSTIC 454 if ((sc->sc_flags & RTW_F_ENABLED) == 0) 455 panic("rtw_cardbus_power"); 456 #endif 457 rtw_cardbus_setup(csc); 458 } 459 } 460 461 void 462 rtw_cardbus_setup(csc) 463 struct rtw_cardbus_softc *csc; 464 { 465 struct rtw_softc *sc = &csc->sc_rtw; 466 cardbus_devfunc_t ct = csc->sc_ct; 467 cardbus_chipset_tag_t cc = ct->ct_cc; 468 cardbus_function_tag_t cf = ct->ct_cf; 469 pcireg_t reg; 470 int pmreg; 471 472 if (cardbus_get_capability(cc, cf, csc->sc_tag, 473 PCI_CAP_PWRMGMT, &pmreg, 0)) { 474 reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03; 475 #if 1 /* XXX Probably not right for CardBus. */ 476 if (reg == 3) { 477 /* 478 * The card has lost all configuration data in 479 * this state, so punt. 480 */ 481 printf("%s: unable to wake up from power state D3\n", 482 sc->sc_dev.dv_xname); 483 return; 484 } 485 #endif 486 if (reg != 0) { 487 printf("%s: waking up from power state D%d\n", 488 sc->sc_dev.dv_xname, reg); 489 cardbus_conf_write(cc, cf, csc->sc_tag, 490 pmreg + 4, 0); 491 } 492 } 493 494 /* Program the BAR. */ 495 cardbus_conf_write(cc, cf, csc->sc_tag, csc->sc_bar_reg, 496 csc->sc_bar_val); 497 498 /* Make sure the right access type is on the CardBus bridge. */ 499 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben); 500 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE); 501 502 /* Enable the appropriate bits in the PCI CSR. */ 503 reg = cardbus_conf_read(cc, cf, csc->sc_tag, 504 CARDBUS_COMMAND_STATUS_REG); 505 reg &= ~(CARDBUS_COMMAND_IO_ENABLE|CARDBUS_COMMAND_MEM_ENABLE); 506 reg |= csc->sc_csr; 507 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_COMMAND_STATUS_REG, 508 reg); 509 510 /* 511 * Make sure the latency timer is set to some reasonable 512 * value. 513 */ 514 reg = cardbus_conf_read(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG); 515 if (CARDBUS_LATTIMER(reg) < 0x20) { 516 reg &= ~(CARDBUS_LATTIMER_MASK << CARDBUS_LATTIMER_SHIFT); 517 reg |= (0x20 << CARDBUS_LATTIMER_SHIFT); 518 cardbus_conf_write(cc, cf, csc->sc_tag, CARDBUS_BHLC_REG, reg); 519 } 520 } 521
Indexes created Mon Sep 29 21:09:56 GMT 2025