if_rtw_cardbus.c revision 1.21 1 /* $NetBSD: if_rtw_cardbus.c,v 1.21 2007/12/21 18:22:43 dyoung Exp $ */
2
3 /*-
4 * Copyright (c) 2004, 2005 David Young. All rights reserved.
5 *
6 * Adapted for the RTL8180 by David Young.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. The name of David Young may not be used to endorse or promote
17 * products derived from this software without specific prior
18 * written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
23 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
24 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
26 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31 * OF SUCH DAMAGE.
32 */
33 /*-
34 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
35 * All rights reserved.
36 *
37 * This code is derived from software contributed to The NetBSD Foundation
38 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
39 * NASA Ames Research Center.
40 *
41 * Redistribution and use in source and binary forms, with or without
42 * modification, are permitted provided that the following conditions
43 * are met:
44 * 1. Redistributions of source code must retain the above copyright
45 * notice, this list of conditions and the following disclaimer.
46 * 2. Redistributions in binary form must reproduce the above copyright
47 * notice, this list of conditions and the following disclaimer in the
48 * documentation and/or other materials provided with the distribution.
49 * 3. All advertising materials mentioning features or use of this software
50 * must display the following acknowledgement:
51 * This product includes software developed by the NetBSD
52 * Foundation, Inc. and its contributors.
53 * 4. Neither the name of The NetBSD Foundation nor the names of its
54 * contributors may be used to endorse or promote products derived
55 * from this software without specific prior written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
58 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
67 * POSSIBILITY OF SUCH DAMAGE.
68 */
69
70 /*
71 * Cardbus front-end for the Realtek RTL8180 802.11 MAC/BBP driver.
72 *
73 * TBD factor with atw, tlp Cardbus front-ends?
74 */
75
76 #include <sys/cdefs.h>
77 __KERNEL_RCSID(0, "$NetBSD: if_rtw_cardbus.c,v 1.21 2007/12/21 18:22:43 dyoung Exp $");
78
79 #include "opt_inet.h"
80 #include "bpfilter.h"
81
82 #include <sys/param.h>
83 #include <sys/systm.h>
84 #include <sys/mbuf.h>
85 #include <sys/malloc.h>
86 #include <sys/kernel.h>
87 #include <sys/socket.h>
88 #include <sys/ioctl.h>
89 #include <sys/errno.h>
90 #include <sys/device.h>
91
92 #include <machine/endian.h>
93
94 #include <net/if.h>
95 #include <net/if_dl.h>
96 #include <net/if_media.h>
97 #include <net/if_ether.h>
98
99 #include <net80211/ieee80211_netbsd.h>
100 #include <net80211/ieee80211_radiotap.h>
101 #include <net80211/ieee80211_var.h>
102
103 #if NBPFILTER > 0
104 #include <net/bpf.h>
105 #endif
106
107 #ifdef INET
108 #include <netinet/in.h>
109 #include <netinet/if_inarp.h>
110 #endif
111
112
113 #include <sys/bus.h>
114 #include <sys/intr.h>
115
116 #include <dev/ic/rtwreg.h>
117 #include <dev/ic/rtwvar.h>
118
119 #include <dev/pci/pcivar.h>
120 #include <dev/pci/pcireg.h>
121 #include <dev/pci/pcidevs.h>
122
123 #include <dev/cardbus/cardbusvar.h>
124 #include <dev/pci/pcidevs.h>
125
126 /*
127 * PCI configuration space registers used by the RTL8180.
128 */
129 #define RTW_PCI_IOBA 0x10 /* i/o mapped base */
130 #define RTW_PCI_MMBA 0x14 /* memory mapped base */
131
132 struct rtw_cardbus_softc {
133 struct rtw_softc sc_rtw; /* real RTL8180 softc */
134
135 /* CardBus-specific goo. */
136 void *sc_ih; /* interrupt handle */
137 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */
138 cardbustag_t sc_tag; /* our CardBus tag */
139 int sc_csr; /* CSR bits */
140 bus_size_t sc_mapsize; /* size of the mapped bus space
141 * region
142 */
143
144 int sc_cben; /* CardBus enables */
145 int sc_bar_reg; /* which BAR to use */
146 pcireg_t sc_bar_val; /* value of the BAR */
147
148 int sc_intrline; /* interrupt line */
149 #if 0
150 struct cardbus_conf_state sc_conf; /* configuration regs */
151 #endif
152 };
153
154 int rtw_cardbus_match(device_t, struct cfdata *, void *);
155 void rtw_cardbus_attach(device_t, device_t, void *);
156 int rtw_cardbus_detach(device_t, int);
157
158 CFATTACH_DECL_NEW(rtw_cardbus, sizeof(struct rtw_cardbus_softc),
159 rtw_cardbus_match, rtw_cardbus_attach, rtw_cardbus_detach, rtw_activate);
160
161 void rtw_cardbus_setup(struct rtw_cardbus_softc *);
162
163 int rtw_cardbus_enable(struct rtw_softc *);
164 void rtw_cardbus_disable(struct rtw_softc *);
165 void rtw_cardbus_power(struct rtw_softc *, int);
166
167 const struct rtw_cardbus_product *rtw_cardbus_lookup(
168 const struct cardbus_attach_args *);
169
170 const struct rtw_cardbus_product {
171 u_int32_t rcp_vendor; /* PCI vendor ID */
172 u_int32_t rcp_product; /* PCI product ID */
173 const char *rcp_product_name;
174 } rtw_cardbus_products[] = {
175 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180,
176 "Realtek RTL8180 802.11 MAC/BBP" },
177
178 { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6020V3,
179 "Belkin F5D6020v3 802.11b (RTL8180 MAC/BBP)" },
180
181 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DWL610,
182 "DWL-610 D-Link Air 802.11b (RTL8180 MAC/BBP)" },
183
184 { 0, 0, NULL },
185 };
186
187 const struct rtw_cardbus_product *
188 rtw_cardbus_lookup(const struct cardbus_attach_args *ca)
189 {
190 const struct rtw_cardbus_product *rcp;
191
192 for (rcp = rtw_cardbus_products; rcp->rcp_product_name != NULL; rcp++) {
193 if (PCI_VENDOR(ca->ca_id) == rcp->rcp_vendor &&
194 PCI_PRODUCT(ca->ca_id) == rcp->rcp_product)
195 return rcp;
196 }
197 return NULL;
198 }
199
200 int
201 rtw_cardbus_match(device_t parent, struct cfdata *match, void *aux)
202 {
203 struct cardbus_attach_args *ca = aux;
204
205 if (rtw_cardbus_lookup(ca) != NULL)
206 return 1;
207
208 return 0;
209 }
210
211 static void
212 rtw_cardbus_intr_ack(struct rtw_regs *regs)
213 {
214 RTW_WRITE(regs, RTW_FER, RTW_FER_INTR);
215 }
216
217 static void
218 rtw_cardbus_funcregen(struct rtw_regs *regs, int enable)
219 {
220 u_int32_t reg;
221 rtw_config0123_enable(regs, 1);
222 reg = RTW_READ(regs, RTW_CONFIG3);
223 if (enable)
224 RTW_WRITE(regs, RTW_CONFIG3, reg | RTW_CONFIG3_FUNCREGEN);
225 else
226 RTW_WRITE(regs, RTW_CONFIG3, reg & ~RTW_CONFIG3_FUNCREGEN);
227 rtw_config0123_enable(regs, 0);
228 }
229
230 void
231 rtw_cardbus_attach(device_t parent, device_t self, void *aux)
232 {
233 struct rtw_cardbus_softc *csc = device_private(self);
234 struct rtw_softc *sc = &csc->sc_rtw;
235 struct rtw_regs *regs = &sc->sc_regs;
236 struct cardbus_attach_args *ca = aux;
237 cardbus_devfunc_t ct = ca->ca_ct;
238 const struct rtw_cardbus_product *rcp;
239 bus_addr_t adr;
240 int rev;
241
242 sc->sc_dev = self;
243 sc->sc_dmat = ca->ca_dmat;
244 csc->sc_ct = ct;
245 csc->sc_tag = ca->ca_tag;
246
247 rcp = rtw_cardbus_lookup(ca);
248 if (rcp == NULL) {
249 printf("\n");
250 panic("rtw_cardbus_attach: impossible");
251 }
252
253 /*
254 * Power management hooks.
255 */
256 sc->sc_enable = rtw_cardbus_enable;
257 sc->sc_disable = rtw_cardbus_disable;
258
259 sc->sc_intr_ack = rtw_cardbus_intr_ack;
260
261 /* Get revision info. */
262 rev = PCI_REVISION(ca->ca_class);
263
264 printf(": %s\n", rcp->rcp_product_name);
265
266 RTW_DPRINTF(RTW_DEBUG_ATTACH,
267 ("%s: pass %d.%d signature %08x\n", device_xname(sc->sc_dev),
268 (rev >> 4) & 0xf, rev & 0xf,
269 cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80)));
270
271 /*
272 * Map the device.
273 */
274 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE;
275 if (Cardbus_mapreg_map(ct, RTW_PCI_MMBA,
276 CARDBUS_MAPREG_TYPE_MEM, 0, ®s->r_bt, ®s->r_bh, &adr,
277 &csc->sc_mapsize) == 0) {
278 RTW_DPRINTF(RTW_DEBUG_ATTACH,
279 ("%s: %s mapped %lu bytes mem space\n",
280 device_xname(sc->sc_dev), __func__,
281 (long)csc->sc_mapsize));
282 #if rbus
283 #else
284 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize);
285 #endif
286 csc->sc_cben = CARDBUS_MEM_ENABLE;
287 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE;
288 csc->sc_bar_reg = RTW_PCI_MMBA;
289 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM;
290 } else if (Cardbus_mapreg_map(ct, RTW_PCI_IOBA,
291 CARDBUS_MAPREG_TYPE_IO, 0, ®s->r_bt, ®s->r_bh, &adr,
292 &csc->sc_mapsize) == 0) {
293 RTW_DPRINTF(RTW_DEBUG_ATTACH,
294 ("%s: %s mapped %lu bytes I/O space\n",
295 device_xname(sc->sc_dev), __func__,
296 (long)csc->sc_mapsize));
297 #if rbus
298 #else
299 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize);
300 #endif
301 csc->sc_cben = CARDBUS_IO_ENABLE;
302 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE;
303 csc->sc_bar_reg = RTW_PCI_IOBA;
304 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO;
305 } else {
306 aprint_error_dev(sc->sc_dev,
307 "unable to map device registers\n");
308 return;
309 }
310
311 /*
312 * Bring the chip out of powersave mode and initialize the
313 * configuration registers.
314 */
315 rtw_cardbus_setup(csc);
316
317 /* Remember which interrupt line. */
318 csc->sc_intrline = ca->ca_intrline;
319
320 aprint_normal_dev(sc->sc_dev, "interrupting at %d\n", csc->sc_intrline);
321 /*
322 * Finish off the attach.
323 */
324 rtw_attach(sc);
325
326 rtw_cardbus_funcregen(regs, 1);
327
328 RTW_WRITE(regs, RTW_FEMR, RTW_FEMR_INTR);
329 RTW_WRITE(regs, RTW_FER, RTW_FER_INTR);
330
331 #if 0
332 cardbus_conf_capture(ct->ct_cc, ct->ct_cf, csc->sc_tag, &csc->sc_conf);
333 #endif
334
335 /*
336 * Power down the socket.
337 */
338 Cardbus_function_disable(csc->sc_ct);
339 }
340
341 int
342 rtw_cardbus_detach(device_t self, int flags)
343 {
344 struct rtw_cardbus_softc *csc = device_private(self);
345 struct rtw_softc *sc = &csc->sc_rtw;
346 struct rtw_regs *regs = &sc->sc_regs;
347 struct cardbus_devfunc *ct = csc->sc_ct;
348 int rc;
349
350 #if defined(DIAGNOSTIC)
351 if (ct == NULL)
352 panic("%s: data structure lacks", device_xname(self));
353 #endif
354
355 if ((rc = rtw_detach(sc)) != 0)
356 return rc;
357
358 rtw_cardbus_funcregen(regs, 0);
359
360 /*
361 * Unhook the interrupt handler.
362 */
363 if (csc->sc_ih != NULL)
364 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih);
365
366 /*
367 * Release bus space and close window.
368 */
369 if (csc->sc_bar_reg != 0)
370 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg,
371 regs->r_bt, regs->r_bh, csc->sc_mapsize);
372
373 return 0;
374 }
375
376 int
377 rtw_cardbus_enable(struct rtw_softc *sc)
378 {
379 struct rtw_cardbus_softc *csc = (void *) sc;
380 cardbus_devfunc_t ct = csc->sc_ct;
381 cardbus_chipset_tag_t cc = ct->ct_cc;
382 cardbus_function_tag_t cf = ct->ct_cf;
383
384 /*
385 * Power on the socket.
386 */
387 Cardbus_function_enable(ct);
388
389 #if 0
390 cardbus_conf_restore(cc, cf, csc->sc_tag, &csc->sc_conf);
391 #endif
392
393 /*
394 * Set up the PCI configuration registers.
395 */
396 rtw_cardbus_setup(csc);
397
398 /*
399 * Map and establish the interrupt.
400 */
401 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET,
402 rtw_intr, sc);
403 if (csc->sc_ih == NULL) {
404 aprint_error_dev(sc->sc_dev,
405 "unable to establish interrupt at %d\n", csc->sc_intrline);
406 Cardbus_function_disable(csc->sc_ct);
407 return 1;
408 }
409
410 rtw_cardbus_funcregen(&sc->sc_regs, 1);
411
412 RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR);
413 RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR);
414
415 return 0;
416 }
417
418 void
419 rtw_cardbus_disable(struct rtw_softc *sc)
420 {
421 struct rtw_cardbus_softc *csc = (void *) sc;
422 cardbus_devfunc_t ct = csc->sc_ct;
423 cardbus_chipset_tag_t cc = ct->ct_cc;
424 cardbus_function_tag_t cf = ct->ct_cf;
425
426 RTW_WRITE(&sc->sc_regs, RTW_FEMR,
427 RTW_READ(&sc->sc_regs, RTW_FEMR) & ~RTW_FEMR_INTR);
428
429 rtw_cardbus_funcregen(&sc->sc_regs, 0);
430
431 /* Unhook the interrupt handler. */
432 cardbus_intr_disestablish(cc, cf, csc->sc_ih);
433 csc->sc_ih = NULL;
434
435 #if 0
436 cardbus_conf_capture(cc, cf, csc->sc_tag, &csc->sc_conf);
437 #endif
438
439 /* Power down the socket. */
440 Cardbus_function_disable(ct);
441 }
442
443 void
444 rtw_cardbus_setup(struct rtw_cardbus_softc *csc)
445 {
446 cardbustag_t tag = csc->sc_tag;
447 cardbus_devfunc_t ct = csc->sc_ct;
448 cardbus_chipset_tag_t cc = ct->ct_cc;
449 cardbusreg_t bhlc, csr, lattimer;
450 cardbus_function_tag_t cf = ct->ct_cf;
451
452 (void)cardbus_set_powerstate(ct, tag, PCI_PWR_D0);
453
454 /* I believe the datasheet tries to warn us that the RTL8180
455 * wants for 16 (0x10) to divide the latency timer.
456 */
457 bhlc = cardbus_conf_read(cc, cf, tag, CARDBUS_BHLC_REG);
458 lattimer = rounddown(PCI_LATTIMER(bhlc), 0x10);
459 if (PCI_LATTIMER(bhlc) != lattimer) {
460 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
461 bhlc |= (lattimer << PCI_LATTIMER_SHIFT);
462 cardbus_conf_write(cc, cf, tag, CARDBUS_BHLC_REG, bhlc);
463 }
464
465 /* Program the BAR. */
466 cardbus_conf_write(cc, cf, tag, csc->sc_bar_reg, csc->sc_bar_val);
467
468 /* Make sure the right access type is on the CardBus bridge. */
469 (*ct->ct_cf->cardbus_ctrl)(cc, csc->sc_cben);
470 (*ct->ct_cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
471
472 /* Enable the appropriate bits in the PCI CSR. */
473 csr = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG);
474 csr &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
475 csr |= csc->sc_csr;
476 csr |= CARDBUS_COMMAND_PARITY_ENABLE | CARDBUS_COMMAND_SERR_ENABLE;
477 cardbus_conf_write(cc, cf, tag, PCI_COMMAND_STATUS_REG, csr);
478 }
479