if_rtw_cardbus.c revision 1.23
1 /* $NetBSD: if_rtw_cardbus.c,v 1.23 2008/03/12 18:02:21 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 2004, 2005 David Young. All rights reserved. 5 * 6 * Adapted for the RTL8180 by David Young. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of David Young may not be used to endorse or promote 17 * products derived from this software without specific prior 18 * written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY 21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 23 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David 24 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 26 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 31 * OF SUCH DAMAGE. 32 */ 33 /*- 34 * Copyright (c) 1999, 2000 The NetBSD Foundation, Inc. 35 * All rights reserved. 36 * 37 * This code is derived from software contributed to The NetBSD Foundation 38 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 39 * NASA Ames Research Center. 40 * 41 * Redistribution and use in source and binary forms, with or without 42 * modification, are permitted provided that the following conditions 43 * are met: 44 * 1. Redistributions of source code must retain the above copyright 45 * notice, this list of conditions and the following disclaimer. 46 * 2. Redistributions in binary form must reproduce the above copyright 47 * notice, this list of conditions and the following disclaimer in the 48 * documentation and/or other materials provided with the distribution. 49 * 3. All advertising materials mentioning features or use of this software 50 * must display the following acknowledgement: 51 * This product includes software developed by the NetBSD 52 * Foundation, Inc. and its contributors. 53 * 4. Neither the name of The NetBSD Foundation nor the names of its 54 * contributors may be used to endorse or promote products derived 55 * from this software without specific prior written permission. 56 * 57 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 58 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 59 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 60 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 61 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 62 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 63 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 64 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 65 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 66 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 67 * POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 /* 71 * Cardbus front-end for the Realtek RTL8180 802.11 MAC/BBP driver. 72 * 73 * TBD factor with atw, tlp Cardbus front-ends? 74 */ 75 76 #include <sys/cdefs.h> 77 __KERNEL_RCSID(0, "$NetBSD: if_rtw_cardbus.c,v 1.23 2008/03/12 18:02:21 dyoung Exp $"); 78 79 #include "opt_inet.h" 80 #include "bpfilter.h" 81 82 #include <sys/param.h> 83 #include <sys/systm.h> 84 #include <sys/mbuf.h> 85 #include <sys/malloc.h> 86 #include <sys/kernel.h> 87 #include <sys/socket.h> 88 #include <sys/ioctl.h> 89 #include <sys/errno.h> 90 #include <sys/device.h> 91 92 #include <machine/endian.h> 93 94 #include <net/if.h> 95 #include <net/if_dl.h> 96 #include <net/if_media.h> 97 #include <net/if_ether.h> 98 99 #include <net80211/ieee80211_netbsd.h> 100 #include <net80211/ieee80211_radiotap.h> 101 #include <net80211/ieee80211_var.h> 102 103 #if NBPFILTER > 0 104 #include <net/bpf.h> 105 #endif 106 107 #ifdef INET 108 #include <netinet/in.h> 109 #include <netinet/if_inarp.h> 110 #endif 111 112 113 #include <sys/bus.h> 114 #include <sys/intr.h> 115 116 #include <dev/ic/rtwreg.h> 117 #include <dev/ic/rtwvar.h> 118 119 #include <dev/pci/pcivar.h> 120 #include <dev/pci/pcireg.h> 121 #include <dev/pci/pcidevs.h> 122 123 #include <dev/cardbus/cardbusvar.h> 124 #include <dev/pci/pcidevs.h> 125 126 /* 127 * PCI configuration space registers used by the RTL8180. 128 */ 129 #define RTW_PCI_IOBA 0x10 /* i/o mapped base */ 130 #define RTW_PCI_MMBA 0x14 /* memory mapped base */ 131 132 struct rtw_cardbus_softc { 133 struct rtw_softc sc_rtw; /* real RTL8180 softc */ 134 135 /* CardBus-specific goo. */ 136 void *sc_ih; /* interrupt handle */ 137 cardbus_devfunc_t sc_ct; /* our CardBus devfuncs */ 138 cardbustag_t sc_tag; /* our CardBus tag */ 139 int sc_csr; /* CSR bits */ 140 bus_size_t sc_mapsize; /* size of the mapped bus space 141 * region 142 */ 143 144 int sc_bar_reg; /* which BAR to use */ 145 pcireg_t sc_bar_val; /* value of the BAR */ 146 147 int sc_intrline; /* interrupt line */ 148 }; 149 150 int rtw_cardbus_match(device_t, struct cfdata *, void *); 151 void rtw_cardbus_attach(device_t, device_t, void *); 152 int rtw_cardbus_detach(device_t, int); 153 154 CFATTACH_DECL_NEW(rtw_cardbus, sizeof(struct rtw_cardbus_softc), 155 rtw_cardbus_match, rtw_cardbus_attach, rtw_cardbus_detach, NULL); 156 157 void rtw_cardbus_setup(struct rtw_cardbus_softc *); 158 159 bool rtw_cardbus_resume(device_t PMF_FN_PROTO); 160 bool rtw_cardbus_suspend(device_t PMF_FN_PROTO); 161 162 const struct rtw_cardbus_product *rtw_cardbus_lookup( 163 const struct cardbus_attach_args *); 164 165 const struct rtw_cardbus_product { 166 u_int32_t rcp_vendor; /* PCI vendor ID */ 167 u_int32_t rcp_product; /* PCI product ID */ 168 const char *rcp_product_name; 169 } rtw_cardbus_products[] = { 170 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180, 171 "Realtek RTL8180 802.11 MAC/BBP" }, 172 173 { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6020V3, 174 "Belkin F5D6020v3 802.11b (RTL8180 MAC/BBP)" }, 175 176 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DWL610, 177 "DWL-610 D-Link Air 802.11b (RTL8180 MAC/BBP)" }, 178 179 { 0, 0, NULL }, 180 }; 181 182 const struct rtw_cardbus_product * 183 rtw_cardbus_lookup(const struct cardbus_attach_args *ca) 184 { 185 const struct rtw_cardbus_product *rcp; 186 187 for (rcp = rtw_cardbus_products; rcp->rcp_product_name != NULL; rcp++) { 188 if (PCI_VENDOR(ca->ca_id) == rcp->rcp_vendor && 189 PCI_PRODUCT(ca->ca_id) == rcp->rcp_product) 190 return rcp; 191 } 192 return NULL; 193 } 194 195 int 196 rtw_cardbus_match(device_t parent, struct cfdata *match, void *aux) 197 { 198 struct cardbus_attach_args *ca = aux; 199 200 if (rtw_cardbus_lookup(ca) != NULL) 201 return 1; 202 203 return 0; 204 } 205 206 static void 207 rtw_cardbus_intr_ack(struct rtw_regs *regs) 208 { 209 RTW_WRITE(regs, RTW_FER, RTW_FER_INTR); 210 } 211 212 static void 213 rtw_cardbus_funcregen(struct rtw_regs *regs, int enable) 214 { 215 u_int32_t reg; 216 rtw_config0123_enable(regs, 1); 217 reg = RTW_READ(regs, RTW_CONFIG3); 218 if (enable) 219 RTW_WRITE(regs, RTW_CONFIG3, reg | RTW_CONFIG3_FUNCREGEN); 220 else 221 RTW_WRITE(regs, RTW_CONFIG3, reg & ~RTW_CONFIG3_FUNCREGEN); 222 rtw_config0123_enable(regs, 0); 223 } 224 225 void 226 rtw_cardbus_attach(device_t parent, device_t self, void *aux) 227 { 228 struct rtw_cardbus_softc *csc = device_private(self); 229 struct rtw_softc *sc = &csc->sc_rtw; 230 struct rtw_regs *regs = &sc->sc_regs; 231 struct cardbus_attach_args *ca = aux; 232 cardbus_devfunc_t ct = ca->ca_ct; 233 const struct rtw_cardbus_product *rcp; 234 bus_addr_t adr; 235 int rev; 236 237 sc->sc_dev = self; 238 sc->sc_dmat = ca->ca_dmat; 239 csc->sc_ct = ct; 240 csc->sc_tag = ca->ca_tag; 241 242 rcp = rtw_cardbus_lookup(ca); 243 if (rcp == NULL) { 244 printf("\n"); 245 panic("rtw_cardbus_attach: impossible"); 246 } 247 248 sc->sc_intr_ack = rtw_cardbus_intr_ack; 249 250 /* Get revision info. */ 251 rev = PCI_REVISION(ca->ca_class); 252 253 printf(": %s\n", rcp->rcp_product_name); 254 255 RTW_DPRINTF(RTW_DEBUG_ATTACH, 256 ("%s: pass %d.%d signature %08x\n", device_xname(self), 257 (rev >> 4) & 0xf, rev & 0xf, 258 cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80))); 259 260 /* 261 * Map the device. 262 */ 263 csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE | 264 CARDBUS_COMMAND_PARITY_ENABLE | 265 CARDBUS_COMMAND_SERR_ENABLE; 266 if (Cardbus_mapreg_map(ct, RTW_PCI_MMBA, CARDBUS_MAPREG_TYPE_MEM, 0, 267 ®s->r_bt, ®s->r_bh, &adr, ®s->r_sz) == 0) { 268 RTW_DPRINTF(RTW_DEBUG_ATTACH, 269 ("%s: %s mapped %" PRIuMAX " bytes mem space\n", 270 device_xname(self), __func__, regs->r_sz)); 271 #if rbus 272 #else 273 (*ct->ct_cf->cardbus_mem_open)(cc, 0, adr, adr+csc->sc_mapsize); 274 #endif 275 csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE; 276 csc->sc_bar_reg = RTW_PCI_MMBA; 277 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM; 278 } else if (Cardbus_mapreg_map(ct, RTW_PCI_IOBA, CARDBUS_MAPREG_TYPE_IO, 279 0, ®s->r_bt, ®s->r_bh, &adr, ®s->r_sz) == 0) { 280 RTW_DPRINTF(RTW_DEBUG_ATTACH, 281 ("%s: %s mapped %" PRIuMAX " bytes I/O space\n", 282 device_xname(self), __func__, regs->r_sz)); 283 #if rbus 284 #else 285 (*ct->ct_cf->cardbus_io_open)(cc, 0, adr, adr+csc->sc_mapsize); 286 #endif 287 csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE; 288 csc->sc_bar_reg = RTW_PCI_IOBA; 289 csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO; 290 } else { 291 aprint_error_dev(self, "unable to map device registers\n"); 292 return; 293 } 294 295 /* 296 * Bring the chip out of powersave mode and initialize the 297 * configuration registers. 298 */ 299 rtw_cardbus_setup(csc); 300 301 /* Remember which interrupt line. */ 302 csc->sc_intrline = ca->ca_intrline; 303 304 aprint_normal_dev(self, "interrupting at %d\n", csc->sc_intrline); 305 /* 306 * Finish off the attach. 307 */ 308 rtw_attach(sc); 309 310 rtw_cardbus_funcregen(regs, 1); 311 312 RTW_WRITE(regs, RTW_FEMR, RTW_FEMR_INTR); 313 RTW_WRITE(regs, RTW_FER, RTW_FER_INTR); 314 315 if (!pmf_device_register(self, rtw_cardbus_suspend, rtw_cardbus_resume)) 316 aprint_error_dev(self, "couldn't establish power handler\n"); 317 else { 318 pmf_class_network_register(self, &sc->sc_if); 319 /* 320 * Power down the socket. 321 */ 322 pmf_device_suspend_self(self); 323 } 324 } 325 326 int 327 rtw_cardbus_detach(device_t self, int flags) 328 { 329 struct rtw_cardbus_softc *csc = device_private(self); 330 struct rtw_softc *sc = &csc->sc_rtw; 331 struct rtw_regs *regs = &sc->sc_regs; 332 struct cardbus_devfunc *ct = csc->sc_ct; 333 int rc; 334 335 #if defined(DIAGNOSTIC) 336 if (ct == NULL) 337 panic("%s: data structure lacks", device_xname(self)); 338 #endif 339 340 if ((rc = rtw_detach(sc)) != 0) 341 return rc; 342 343 /* 344 * Unhook the interrupt handler. 345 */ 346 if (csc->sc_ih != NULL) 347 cardbus_intr_disestablish(ct->ct_cc, ct->ct_cf, csc->sc_ih); 348 349 /* 350 * Release bus space and close window. 351 */ 352 if (csc->sc_bar_reg != 0) 353 Cardbus_mapreg_unmap(ct, csc->sc_bar_reg, 354 regs->r_bt, regs->r_bh, regs->r_sz); 355 356 return 0; 357 } 358 359 bool 360 rtw_cardbus_resume(device_t self PMF_FN_ARGS) 361 { 362 struct rtw_cardbus_softc *csc = device_private(self); 363 struct rtw_softc *sc = &csc->sc_rtw; 364 cardbus_devfunc_t ct = csc->sc_ct; 365 cardbus_chipset_tag_t cc = ct->ct_cc; 366 cardbus_function_tag_t cf = ct->ct_cf; 367 368 /* 369 * Map and establish the interrupt. 370 */ 371 csc->sc_ih = cardbus_intr_establish(cc, cf, csc->sc_intrline, IPL_NET, 372 rtw_intr, sc); 373 if (csc->sc_ih == NULL) { 374 aprint_error_dev(sc->sc_dev, 375 "unable to establish interrupt at %d\n", csc->sc_intrline); 376 return false; 377 } 378 379 rtw_cardbus_funcregen(&sc->sc_regs, 1); 380 381 RTW_WRITE(&sc->sc_regs, RTW_FEMR, RTW_FEMR_INTR); 382 RTW_WRITE(&sc->sc_regs, RTW_FER, RTW_FER_INTR); 383 384 return rtw_resume(self, flags); 385 } 386 387 bool 388 rtw_cardbus_suspend(device_t self PMF_FN_ARGS) 389 { 390 struct rtw_cardbus_softc *csc = device_private(self); 391 struct rtw_softc *sc = &csc->sc_rtw; 392 cardbus_devfunc_t ct = csc->sc_ct; 393 cardbus_chipset_tag_t cc = ct->ct_cc; 394 cardbus_function_tag_t cf = ct->ct_cf; 395 396 if (!rtw_suspend(self, flags)) 397 return false; 398 399 RTW_WRITE(&sc->sc_regs, RTW_FEMR, 400 RTW_READ(&sc->sc_regs, RTW_FEMR) & ~RTW_FEMR_INTR); 401 402 rtw_cardbus_funcregen(&sc->sc_regs, 0); 403 404 /* Unhook the interrupt handler. */ 405 cardbus_intr_disestablish(cc, cf, csc->sc_ih); 406 csc->sc_ih = NULL; 407 return true; 408 } 409 410 void 411 rtw_cardbus_setup(struct rtw_cardbus_softc *csc) 412 { 413 cardbustag_t tag = csc->sc_tag; 414 cardbus_devfunc_t ct = csc->sc_ct; 415 cardbus_chipset_tag_t cc = ct->ct_cc; 416 cardbusreg_t bhlc, csr, lattimer; 417 cardbus_function_tag_t cf = ct->ct_cf; 418 419 (void)cardbus_set_powerstate(ct, tag, PCI_PWR_D0); 420 421 /* I believe the datasheet tries to warn us that the RTL8180 422 * wants for 16 (0x10) to divide the latency timer. 423 */ 424 bhlc = cardbus_conf_read(cc, cf, tag, CARDBUS_BHLC_REG); 425 lattimer = rounddown(PCI_LATTIMER(bhlc), 0x10); 426 if (PCI_LATTIMER(bhlc) != lattimer) { 427 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 428 bhlc |= (lattimer << PCI_LATTIMER_SHIFT); 429 cardbus_conf_write(cc, cf, tag, CARDBUS_BHLC_REG, bhlc); 430 } 431 432 /* Program the BAR. */ 433 cardbus_conf_write(cc, cf, tag, csc->sc_bar_reg, csc->sc_bar_val); 434 435 /* Enable the appropriate bits in the PCI CSR. */ 436 csr = cardbus_conf_read(cc, cf, tag, PCI_COMMAND_STATUS_REG); 437 csr &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE); 438 csr |= csc->sc_csr; 439 cardbus_conf_write(cc, cf, tag, PCI_COMMAND_STATUS_REG, csr); 440 } 441
Indexes created Tue Sep 30 07:10:03 GMT 2025